Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) menu "RAM/ROM/Flash chip drivers"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 	depends on MTD!=n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) config MTD_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 	tristate "Detect flash chips by Common Flash Interface (CFI) probe"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 	select MTD_GEN_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 	select MTD_CFI_UTIL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 	  The Common Flash Interface specification was developed by Intel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 	  AMD and other flash manufactures that provides a universal method
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 	  for probing the capabilities of flash devices. If you wish to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 	  support any device that is CFI-compliant, you need to enable this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	  option. Visit <https://www.amd.com/products/nvd/overview/cfi.html>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	  for more information on CFI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) config MTD_JEDECPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	select MTD_GEN_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	select MTD_CFI_UTIL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	  This option enables JEDEC-style probing of flash chips which are not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	  compatible with the Common Flash Interface, but will use the common
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	  CFI-targeted flash drivers for any chips which are identified which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	  are in fact compatible in all but the probe method. This actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	  covers most AMD/Fujitsu-compatible chips and also non-CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	  Intel chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) config MTD_GEN_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	tristate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) config MTD_CFI_ADV_OPTIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	bool "Flash chip driver advanced configuration options"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	depends on MTD_GEN_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	  If you need to specify a specific endianness for access to flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	  chips, or if you wish to reduce the size of the kernel by including
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	  support for only specific arrangements of flash chips, say 'Y'. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	  option does not directly affect the code, but will enable other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	  configuration options which allow you to do so.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	  If unsure, say 'N'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	prompt "Flash cmd/query data swapping"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	depends on MTD_CFI_ADV_OPTIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	default MTD_CFI_NOSWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	  This option defines the way in which the CPU attempts to arrange
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	  data bits when writing the 'magic' commands to the chips. Saying
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	  'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	  enabled, means that the CPU will not do any swapping; the chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	  are expected to be wired to the CPU in 'host-endian' form.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	  Specific arrangements are possible with the BIG_ENDIAN_BYTE and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	  LITTLE_ENDIAN_BYTE, if the bytes are reversed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) config MTD_CFI_NOSWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	depends on !ARCH_IXP4XX || CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	bool "NO"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) config MTD_CFI_BE_BYTE_SWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	bool "BIG_ENDIAN_BYTE"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) config MTD_CFI_LE_BYTE_SWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	depends on !ARCH_IXP4XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	bool "LITTLE_ENDIAN_BYTE"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) config MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	bool "Specific CFI Flash geometry selection"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	depends on MTD_CFI_ADV_OPTIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	select MTD_MAP_BANK_WIDTH_1 if  !(MTD_MAP_BANK_WIDTH_2 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		 MTD_MAP_BANK_WIDTH_4  || MTD_MAP_BANK_WIDTH_8 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		 MTD_MAP_BANK_WIDTH_16 || MTD_MAP_BANK_WIDTH_32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	select MTD_CFI_I1 if !(MTD_CFI_I2 || MTD_CFI_I4 || MTD_CFI_I8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	  This option does not affect the code directly, but will enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	  some other configuration options which would allow you to reduce
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	  the size of the kernel by including support for only certain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	  arrangements of CFI chips. If unsure, say 'N' and all options
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	  which are supported by the current code will be enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) config MTD_MAP_BANK_WIDTH_1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	bool "Support  8-bit buswidth" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	  If you wish to support CFI devices on a physical bus which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	  8 bits wide, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) config MTD_MAP_BANK_WIDTH_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	  If you wish to support CFI devices on a physical bus which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	  16 bits wide, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) config MTD_MAP_BANK_WIDTH_4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	  If you wish to support CFI devices on a physical bus which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	  32 bits wide, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) config MTD_MAP_BANK_WIDTH_8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	default n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	  If you wish to support CFI devices on a physical bus which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	  64 bits wide, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) config MTD_MAP_BANK_WIDTH_16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	default n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	  If you wish to support CFI devices on a physical bus which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	  128 bits wide, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) config MTD_MAP_BANK_WIDTH_32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	select MTD_COMPLEX_MAPPINGS if HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	default n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	  If you wish to support CFI devices on a physical bus which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	  256 bits wide, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) config MTD_CFI_I1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	  If your flash chips are not interleaved - i.e. you only have one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	  flash chip addressed by each bus cycle, then say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) config MTD_CFI_I2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	  If your flash chips are interleaved in pairs - i.e. you have two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	  flash chips addressed by each bus cycle, then say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) config MTD_CFI_I4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	default n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	  If your flash chips are interleaved in fours - i.e. you have four
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	  flash chips addressed by each bus cycle, then say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) config MTD_CFI_I8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	default n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	  If your flash chips are interleaved in eights - i.e. you have eight
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	  flash chips addressed by each bus cycle, then say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) config MTD_OTP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	bool "Protection Registers aka one-time programmable (OTP) bits"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	depends on MTD_CFI_ADV_OPTIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	default n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	  This enables support for reading, writing and locking so called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	  "Protection Registers" present on some flash chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	  A subset of them are pre-programmed at the factory with a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	  unique set of values. The rest is user-programmable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	  The user-programmable Protection Registers contain one-time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	  programmable (OTP) bits; when programmed, register bits cannot be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	  erased. Each Protection Register can be accessed multiple times to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	  program individual bits, as long as the register remains unlocked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	  Each Protection Register has an associated Lock Register bit. When a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	  Lock Register bit is programmed, the associated Protection Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	  can only be read; it can no longer be programmed. Additionally,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	  because the Lock Register bits themselves are OTP, when programmed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	  Lock Register bits cannot be erased. Therefore, when a Protection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	  Register is locked, it cannot be unlocked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	  This feature should therefore be used with extreme care. Any mistake
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	  in the programming of OTP bits will waste them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) config MTD_CFI_INTELEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	tristate "Support for CFI command set 0001 (Intel/Sharp chips)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	depends on MTD_GEN_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	select MTD_CFI_UTIL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	  The Common Flash Interface defines a number of different command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	  sets which a CFI-compliant chip may claim to implement. This code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	  provides support for command set 0001, used on Intel StrataFlash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	  and other parts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) config MTD_CFI_AMDSTD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	tristate "Support for CFI command set 0002 (AMD/Fujitsu/Spansion chips)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	depends on MTD_GEN_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	select MTD_CFI_UTIL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	  The Common Flash Interface defines a number of different command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	  sets which a CFI-compliant chip may claim to implement. This code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	  provides support for command set 0002, used on chips including
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	  the AMD Am29LV320.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) config MTD_CFI_STAA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	tristate "Support for CFI command set 0020 (ST (Advanced Architecture) chips)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	depends on MTD_GEN_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	select MTD_CFI_UTIL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	  The Common Flash Interface defines a number of different command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	  sets which a CFI-compliant chip may claim to implement. This code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	  provides support for command set 0020.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) config MTD_CFI_UTIL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	tristate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) config MTD_RAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	tristate "Support for RAM chips in bus mapping"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	  This option enables basic support for RAM chips accessed through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	  a bus mapping driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) config MTD_ROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	tristate "Support for ROM chips in bus mapping"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	  This option enables basic support for ROM chips accessed through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	  a bus mapping driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) config MTD_ABSENT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	tristate "Support for absent chips in bus mapping"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	  This option enables support for a dummy probing driver used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	  allocated placeholder MTD devices on systems that have socketed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	  or removable media.  Use of this driver as a fallback chip probe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	  preserves the expected registration order of MTD device nodes on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	  the system regardless of media presence.  Device nodes created
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	  with this driver will return -ENODEV upon access.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) config MTD_XIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	bool "XIP aware MTD support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && ARCH_MTD_XIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	default y if XIP_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	  This allows MTD support to work with flash memory which is also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	  used for XIP purposes.  If you're not sure what this is all about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	  then say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) endmenu