^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/uacce.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) static struct class *uacce_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) static dev_t uacce_devt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) static DEFINE_MUTEX(uacce_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static DEFINE_XARRAY_ALLOC(uacce_xa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static int uacce_start_queue(struct uacce_queue *q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) mutex_lock(&uacce_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) if (q->state != UACCE_Q_INIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) goto out_with_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) if (q->uacce->ops->start_queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) ret = q->uacce->ops->start_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) goto out_with_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) q->state = UACCE_Q_STARTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) out_with_lock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) mutex_unlock(&uacce_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static int uacce_put_queue(struct uacce_queue *q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct uacce_device *uacce = q->uacce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) mutex_lock(&uacce_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (q->state == UACCE_Q_ZOMBIE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if ((q->state == UACCE_Q_STARTED) && uacce->ops->stop_queue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) uacce->ops->stop_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if ((q->state == UACCE_Q_INIT || q->state == UACCE_Q_STARTED) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) uacce->ops->put_queue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) uacce->ops->put_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) q->state = UACCE_Q_ZOMBIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) mutex_unlock(&uacce_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static long uacce_fops_unl_ioctl(struct file *filep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct uacce_queue *q = filep->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct uacce_device *uacce = q->uacce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) case UACCE_CMD_START_Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return uacce_start_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) case UACCE_CMD_PUT_Q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return uacce_put_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!uacce->ops->ioctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return uacce->ops->ioctl(q, cmd, arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static long uacce_fops_compat_ioctl(struct file *filep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) arg = (unsigned long)compat_ptr(arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return uacce_fops_unl_ioctl(filep, cmd, arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static int uacce_bind_queue(struct uacce_device *uacce, struct uacce_queue *q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u32 pasid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct iommu_sva *handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (!(uacce->flags & UACCE_DEV_SVA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) handle = iommu_sva_bind_device(uacce->parent, current->mm, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (IS_ERR(handle))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return PTR_ERR(handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) pasid = iommu_sva_get_pasid(handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (pasid == IOMMU_PASID_INVALID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) iommu_sva_unbind_device(handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) q->handle = handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) q->pasid = pasid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static void uacce_unbind_queue(struct uacce_queue *q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (!q->handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) iommu_sva_unbind_device(q->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) q->handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int uacce_fops_open(struct inode *inode, struct file *filep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct uacce_device *uacce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct uacce_queue *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) uacce = xa_load(&uacce_xa, iminor(inode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (!uacce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) q = kzalloc(sizeof(struct uacce_queue), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (!q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ret = uacce_bind_queue(uacce, q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) goto out_with_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) q->uacce = uacce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (uacce->ops->get_queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ret = uacce->ops->get_queue(uacce, q->pasid, q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) goto out_with_bond;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) init_waitqueue_head(&q->wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) filep->private_data = q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) uacce->inode = inode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) q->state = UACCE_Q_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) mutex_lock(&uacce->queues_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) list_add(&q->list, &uacce->queues);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) mutex_unlock(&uacce->queues_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) out_with_bond:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) uacce_unbind_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) out_with_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) kfree(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static int uacce_fops_release(struct inode *inode, struct file *filep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct uacce_queue *q = filep->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) mutex_lock(&q->uacce->queues_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) list_del(&q->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) mutex_unlock(&q->uacce->queues_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) uacce_put_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) uacce_unbind_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) kfree(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static void uacce_vma_close(struct vm_area_struct *vma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct uacce_queue *q = vma->vm_private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct uacce_qfile_region *qfr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (vma->vm_pgoff < UACCE_MAX_REGION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) qfr = q->qfrs[vma->vm_pgoff];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) kfree(qfr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static const struct vm_operations_struct uacce_vm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .close = uacce_vma_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static int uacce_fops_mmap(struct file *filep, struct vm_area_struct *vma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct uacce_queue *q = filep->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct uacce_device *uacce = q->uacce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct uacce_qfile_region *qfr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) enum uacce_qfrt type = UACCE_MAX_REGION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (vma->vm_pgoff < UACCE_MAX_REGION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) type = vma->vm_pgoff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) qfr = kzalloc(sizeof(*qfr), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (!qfr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND | VM_WIPEONFORK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) vma->vm_ops = &uacce_vm_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) vma->vm_private_data = q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) qfr->type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) mutex_lock(&uacce_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (q->state != UACCE_Q_INIT && q->state != UACCE_Q_STARTED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) goto out_with_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (q->qfrs[type]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret = -EEXIST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) goto out_with_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) case UACCE_QFRT_MMIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (!uacce->ops->mmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) goto out_with_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ret = uacce->ops->mmap(q, vma, qfr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) goto out_with_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) case UACCE_QFRT_DUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (!uacce->ops->mmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) goto out_with_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ret = uacce->ops->mmap(q, vma, qfr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) goto out_with_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) goto out_with_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) q->qfrs[type] = qfr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) mutex_unlock(&uacce_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) out_with_lock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) mutex_unlock(&uacce_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) kfree(qfr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static __poll_t uacce_fops_poll(struct file *file, poll_table *wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) struct uacce_queue *q = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) struct uacce_device *uacce = q->uacce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) poll_wait(file, &q->wait, wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (uacce->ops->is_q_updated && uacce->ops->is_q_updated(q))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return EPOLLIN | EPOLLRDNORM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static const struct file_operations uacce_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .open = uacce_fops_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .release = uacce_fops_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .unlocked_ioctl = uacce_fops_unl_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .compat_ioctl = uacce_fops_compat_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .mmap = uacce_fops_mmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .poll = uacce_fops_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define to_uacce_device(dev) container_of(dev, struct uacce_device, dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static ssize_t api_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) struct uacce_device *uacce = to_uacce_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return sprintf(buf, "%s\n", uacce->api_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static ssize_t flags_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct uacce_device *uacce = to_uacce_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return sprintf(buf, "%u\n", uacce->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static ssize_t available_instances_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct uacce_device *uacce = to_uacce_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (!uacce->ops->get_available_instances)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) uacce->ops->get_available_instances(uacce));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static ssize_t algorithms_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) struct uacce_device *uacce = to_uacce_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return sprintf(buf, "%s\n", uacce->algs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static ssize_t region_mmio_size_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) struct uacce_device *uacce = to_uacce_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return sprintf(buf, "%lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) uacce->qf_pg_num[UACCE_QFRT_MMIO] << PAGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static ssize_t region_dus_size_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) struct uacce_device *uacce = to_uacce_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return sprintf(buf, "%lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) uacce->qf_pg_num[UACCE_QFRT_DUS] << PAGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static DEVICE_ATTR_RO(api);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static DEVICE_ATTR_RO(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static DEVICE_ATTR_RO(available_instances);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static DEVICE_ATTR_RO(algorithms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static DEVICE_ATTR_RO(region_mmio_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static DEVICE_ATTR_RO(region_dus_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static struct attribute *uacce_dev_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) &dev_attr_api.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) &dev_attr_flags.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) &dev_attr_available_instances.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) &dev_attr_algorithms.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) &dev_attr_region_mmio_size.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) &dev_attr_region_dus_size.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static umode_t uacce_dev_is_visible(struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) struct attribute *attr, int n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct device *dev = kobj_to_dev(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) struct uacce_device *uacce = to_uacce_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (((attr == &dev_attr_region_mmio_size.attr) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) (!uacce->qf_pg_num[UACCE_QFRT_MMIO])) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ((attr == &dev_attr_region_dus_size.attr) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) (!uacce->qf_pg_num[UACCE_QFRT_DUS])))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) return attr->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) static struct attribute_group uacce_dev_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .is_visible = uacce_dev_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .attrs = uacce_dev_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) __ATTRIBUTE_GROUPS(uacce_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static void uacce_release(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) struct uacce_device *uacce = to_uacce_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) kfree(uacce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * uacce_alloc() - alloc an accelerator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * @parent: pointer of uacce parent device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * @interface: pointer of uacce_interface for register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * Returns uacce pointer if success and ERR_PTR if not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * Need check returned negotiated uacce->flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) struct uacce_device *uacce_alloc(struct device *parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct uacce_interface *interface)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) unsigned int flags = interface->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct uacce_device *uacce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) uacce = kzalloc(sizeof(struct uacce_device), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (!uacce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (flags & UACCE_DEV_SVA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) ret = iommu_dev_enable_feature(parent, IOMMU_DEV_FEAT_SVA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) flags &= ~UACCE_DEV_SVA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) uacce->parent = parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) uacce->flags = flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) uacce->ops = interface->ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) ret = xa_alloc(&uacce_xa, &uacce->dev_id, uacce, xa_limit_32b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) goto err_with_uacce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) INIT_LIST_HEAD(&uacce->queues);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) mutex_init(&uacce->queues_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) device_initialize(&uacce->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) uacce->dev.devt = MKDEV(MAJOR(uacce_devt), uacce->dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) uacce->dev.class = uacce_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) uacce->dev.groups = uacce_dev_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) uacce->dev.parent = uacce->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) uacce->dev.release = uacce_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) dev_set_name(&uacce->dev, "%s-%d", interface->name, uacce->dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return uacce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) err_with_uacce:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (flags & UACCE_DEV_SVA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_SVA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) kfree(uacce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) EXPORT_SYMBOL_GPL(uacce_alloc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) * uacce_register() - add the accelerator to cdev and export to user space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * @uacce: The initialized uacce device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * Return 0 if register succeeded, or an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) int uacce_register(struct uacce_device *uacce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (!uacce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) uacce->cdev = cdev_alloc();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (!uacce->cdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) uacce->cdev->ops = &uacce_fops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) uacce->cdev->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) return cdev_device_add(uacce->cdev, &uacce->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) EXPORT_SYMBOL_GPL(uacce_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) * uacce_remove() - remove the accelerator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * @uacce: the accelerator to remove
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) void uacce_remove(struct uacce_device *uacce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) struct uacce_queue *q, *next_q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (!uacce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) * unmap remaining mapping from user space, preventing user still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) * access the mmaped area while parent device is already removed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (uacce->inode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) unmap_mapping_range(uacce->inode->i_mapping, 0, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* ensure no open queue remains */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) mutex_lock(&uacce->queues_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) list_for_each_entry_safe(q, next_q, &uacce->queues, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) uacce_put_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) uacce_unbind_queue(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) mutex_unlock(&uacce->queues_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* disable sva now since no opened queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (uacce->flags & UACCE_DEV_SVA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_SVA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (uacce->cdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) cdev_device_del(uacce->cdev, &uacce->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) xa_erase(&uacce_xa, uacce->dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) put_device(&uacce->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) EXPORT_SYMBOL_GPL(uacce_remove);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static int __init uacce_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) uacce_class = class_create(THIS_MODULE, UACCE_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) if (IS_ERR(uacce_class))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return PTR_ERR(uacce_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ret = alloc_chrdev_region(&uacce_devt, 0, MINORMASK, UACCE_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) class_destroy(uacce_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) static __exit void uacce_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) unregister_chrdev_region(uacce_devt, MINORMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) class_destroy(uacce_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) subsys_initcall(uacce_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) module_exit(uacce_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) MODULE_AUTHOR("Hisilicon Tech. Co., Ltd.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) MODULE_DESCRIPTION("Accelerator interface for Userland applications");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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