^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Generic on-chip SRAM allocation driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2012 Philipp Zabel, Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/genalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/list_sort.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <soc/at91/atmel-secumod.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "sram.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SRAM_GRANULARITY 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static ssize_t sram_read(struct file *filp, struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct bin_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) char *buf, loff_t pos, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct sram_partition *part;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) part = container_of(attr, struct sram_partition, battr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) mutex_lock(&part->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) memcpy_fromio(buf, part->base + pos, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) mutex_unlock(&part->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static ssize_t sram_write(struct file *filp, struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct bin_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) char *buf, loff_t pos, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct sram_partition *part;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) part = container_of(attr, struct sram_partition, battr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) mutex_lock(&part->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) memcpy_toio(part->base + pos, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) mutex_unlock(&part->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int sram_add_pool(struct sram_dev *sram, struct sram_reserve *block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) phys_addr_t start, struct sram_partition *part)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) part->pool = devm_gen_pool_create(sram->dev, ilog2(SRAM_GRANULARITY),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) NUMA_NO_NODE, block->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (IS_ERR(part->pool))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return PTR_ERR(part->pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ret = gen_pool_add_virt(part->pool, (unsigned long)part->base, start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) block->size, NUMA_NO_NODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) dev_err(sram->dev, "failed to register subpool: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static int sram_add_export(struct sram_dev *sram, struct sram_reserve *block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) phys_addr_t start, struct sram_partition *part)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) sysfs_bin_attr_init(&part->battr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) part->battr.attr.name = devm_kasprintf(sram->dev, GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) "%llx.sram",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) (unsigned long long)start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (!part->battr.attr.name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) part->battr.attr.mode = S_IRUSR | S_IWUSR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) part->battr.read = sram_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) part->battr.write = sram_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) part->battr.size = block->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return device_create_bin_file(sram->dev, &part->battr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static int sram_add_partition(struct sram_dev *sram, struct sram_reserve *block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) phys_addr_t start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct sram_partition *part = &sram->partition[sram->partitions];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) mutex_init(&part->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) part->base = sram->virt_base + block->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (block->pool) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ret = sram_add_pool(sram, block, start, part);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (block->export) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ret = sram_add_export(sram, block, start, part);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (block->protect_exec) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ret = sram_check_protect_exec(sram, block, part);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ret = sram_add_pool(sram, block, start, part);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) sram_add_protect_exec(part);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) sram->partitions++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static void sram_free_partitions(struct sram_dev *sram)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct sram_partition *part;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (!sram->partitions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) part = &sram->partition[sram->partitions - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) for (; sram->partitions; sram->partitions--, part--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (part->battr.size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) device_remove_bin_file(sram->dev, &part->battr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (part->pool &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) gen_pool_avail(part->pool) < gen_pool_size(part->pool))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) dev_err(sram->dev, "removed pool while SRAM allocated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int sram_reserve_cmp(void *priv, struct list_head *a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct list_head *b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct sram_reserve *ra = list_entry(a, struct sram_reserve, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct sram_reserve *rb = list_entry(b, struct sram_reserve, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return ra->start - rb->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int sram_reserve_regions(struct sram_dev *sram, struct resource *res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct device_node *np = sram->dev->of_node, *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) unsigned long size, cur_start, cur_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct sram_reserve *rblocks, *block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct list_head reserve_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned int nblocks, exports = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) const char *label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) INIT_LIST_HEAD(&reserve_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) size = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * We need an additional block to mark the end of the memory region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * after the reserved blocks from the dt are processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) nblocks = (np) ? of_get_available_child_count(np) + 1 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) rblocks = kcalloc(nblocks, sizeof(*rblocks), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (!rblocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) block = &rblocks[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) for_each_available_child_of_node(np, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct resource child_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) ret = of_address_to_resource(child, 0, &child_res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) dev_err(sram->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) "could not get address for node %pOF\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) goto err_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (child_res.start < res->start || child_res.end > res->end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) dev_err(sram->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) "reserved block %pOF outside the sram area\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) goto err_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) block->start = child_res.start - res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) block->size = resource_size(&child_res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) list_add_tail(&block->list, &reserve_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) if (of_find_property(child, "export", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) block->export = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (of_find_property(child, "pool", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) block->pool = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (of_find_property(child, "protect-exec", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) block->protect_exec = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if ((block->export || block->pool || block->protect_exec) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) block->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) exports++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) label = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ret = of_property_read_string(child, "label", &label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (ret && ret != -EINVAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) dev_err(sram->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) "%pOF has invalid label name\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) goto err_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (!label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) label = child->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) block->label = devm_kstrdup(sram->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) label, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (!block->label) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) goto err_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) dev_dbg(sram->dev, "found %sblock '%s' 0x%x-0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) block->export ? "exported " : "", block->label,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) block->start, block->start + block->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) dev_dbg(sram->dev, "found reserved block 0x%x-0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) block->start, block->start + block->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) block++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) child = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* the last chunk marks the end of the region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) rblocks[nblocks - 1].start = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) rblocks[nblocks - 1].size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) list_add_tail(&rblocks[nblocks - 1].list, &reserve_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) list_sort(NULL, &reserve_list, sram_reserve_cmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (exports) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) sram->partition = devm_kcalloc(sram->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) exports, sizeof(*sram->partition),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (!sram->partition) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) goto err_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) cur_start = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) list_for_each_entry(block, &reserve_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) /* can only happen if sections overlap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (block->start < cur_start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) dev_err(sram->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) "block at 0x%x starts after current offset 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) block->start, cur_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) sram_free_partitions(sram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) goto err_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if ((block->export || block->pool || block->protect_exec) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) block->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ret = sram_add_partition(sram, block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) res->start + block->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) sram_free_partitions(sram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) goto err_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* current start is in a reserved block, so continue after it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (block->start == cur_start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) cur_start = block->start + block->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * allocate the space between the current starting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * address and the following reserved block, or the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * end of the region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) cur_size = block->start - cur_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) dev_dbg(sram->dev, "adding chunk 0x%lx-0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) cur_start, cur_start + cur_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) ret = gen_pool_add_virt(sram->pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) (unsigned long)sram->virt_base + cur_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) res->start + cur_start, cur_size, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) sram_free_partitions(sram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) goto err_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /* next allocation after this reserved block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) cur_start = block->start + block->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) err_chunks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) kfree(rblocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static int atmel_securam_wait(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) regmap = syscon_regmap_lookup_by_compatible("atmel,sama5d2-secumod");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) if (IS_ERR(regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return regmap_read_poll_timeout(regmap, AT91_SECUMOD_RAMRDY, val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) val & AT91_SECUMOD_RAMRDY_READY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 10000, 500000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static const struct of_device_id sram_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) { .compatible = "mmio-sram" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) { .compatible = "atmel,sama5d2-securam", .data = atmel_securam_wait },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static int sram_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct sram_dev *sram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) int (*init_func)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) sram = devm_kzalloc(&pdev->dev, sizeof(*sram), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (!sram)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) sram->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (of_property_read_bool(pdev->dev.of_node, "no-memory-wc"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) sram->virt_base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) sram->virt_base = devm_platform_ioremap_resource_wc(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (IS_ERR(sram->virt_base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) dev_err(&pdev->dev, "could not map SRAM registers\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return PTR_ERR(sram->virt_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) sram->pool = devm_gen_pool_create(sram->dev, ilog2(SRAM_GRANULARITY),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) NUMA_NO_NODE, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (IS_ERR(sram->pool))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return PTR_ERR(sram->pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) sram->clk = devm_clk_get(sram->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (IS_ERR(sram->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) sram->clk = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) clk_prepare_enable(sram->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) ret = sram_reserve_regions(sram,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) platform_get_resource(pdev, IORESOURCE_MEM, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) goto err_disable_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) platform_set_drvdata(pdev, sram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) init_func = of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (init_func) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ret = init_func();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) goto err_free_partitions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) dev_dbg(sram->dev, "SRAM pool: %zu KiB @ 0x%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) gen_pool_size(sram->pool) / 1024, sram->virt_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) err_free_partitions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) sram_free_partitions(sram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) err_disable_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (sram->clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) clk_disable_unprepare(sram->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static int sram_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) struct sram_dev *sram = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) sram_free_partitions(sram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (gen_pool_avail(sram->pool) < gen_pool_size(sram->pool))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) dev_err(sram->dev, "removed while SRAM allocated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (sram->clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) clk_disable_unprepare(sram->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static struct platform_driver sram_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .name = "sram",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .of_match_table = sram_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .probe = sram_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .remove = sram_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static int __init sram_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return platform_driver_register(&sram_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) postcore_initcall(sram_init);