^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SN Platform GRU Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * MMUOPS callbacks + TLB flushing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file handles emu notifier callbacks from the core kernel. The callbacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * are used to update the TLB in the GRU as a result of changes in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * state of a process address space. This file also handles TLB invalidates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * from the GRU driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/hugetlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/timex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/srcu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "gru.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "grutables.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/uv/uv_hub.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define gru_random() get_cycles()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* ---------------------------------- TLB Invalidation functions --------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * get_tgh_handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Find a TGH to use for issuing a TLB invalidate. For GRUs that are on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * local blade, use a fixed TGH that is a function of the blade-local cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * number. Normally, this TGH is private to the cpu & no contention occurs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * the TGH. For offblade GRUs, select a random TGH in the range above the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * private TGHs. A spinlock is required to access this TGH & the lock must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * released when the invalidate is completes. This sucks, but it is the best we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * can do.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * Note that the spinlock is IN the TGH handle so locking does not involve
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * additional cache lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static inline int get_off_blade_tgh(struct gru_state *gru)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) n = GRU_NUM_TGH - gru->gs_tgh_first_remote;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) n = gru_random() % n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) n += gru->gs_tgh_first_remote;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static inline int get_on_blade_tgh(struct gru_state *gru)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return uv_blade_processor_id() >> gru->gs_tgh_local_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static struct gru_tlb_global_handle *get_lock_tgh_handle(struct gru_state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) *gru)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct gru_tlb_global_handle *tgh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (uv_numa_blade_id() == gru->gs_blade_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) n = get_on_blade_tgh(gru);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) n = get_off_blade_tgh(gru);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) tgh = get_tgh_by_index(gru, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) lock_tgh_handle(tgh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return tgh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static void get_unlock_tgh_handle(struct gru_tlb_global_handle *tgh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unlock_tgh_handle(tgh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * gru_flush_tlb_range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * General purpose TLB invalidation function. This function scans every GRU in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * the ENTIRE system (partition) looking for GRUs where the specified MM has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * been accessed by the GRU. For each GRU found, the TLB must be invalidated OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * the ASID invalidated. Invalidating an ASID causes a new ASID to be assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * on the next fault. This effectively flushes the ENTIRE TLB for the MM at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * cost of (possibly) a large number of future TLBmisses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * The current algorithm is optimized based on the following (somewhat true)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * assumptions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * - GRU contexts are not loaded into a GRU unless a reference is made to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * the data segment or control block (this is true, not an assumption).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * If a DS/CB is referenced, the user will also issue instructions that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * cause TLBmisses. It is not necessary to optimize for the case where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * contexts are loaded but no instructions cause TLB misses. (I know
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * this will happen but I'm not optimizing for it).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * - GRU instructions to invalidate TLB entries are SLOOOOWWW - normally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * a few usec but in unusual cases, it could be longer. Avoid if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * possible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * - intrablade process migration between cpus is not frequent but is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * common.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * - a GRU context is not typically migrated to a different GRU on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * blade because of intrablade migration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * - interblade migration is rare. Processes migrate their GRU context to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * the new blade.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * - if interblade migration occurs, migration back to the original blade
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * is very very rare (ie., no optimization for this case)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * - most GRU instruction operate on a subset of the user REGIONS. Code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * & shared library regions are not likely targets of GRU instructions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * To help improve the efficiency of TLB invalidation, the GMS data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * structure is maintained for EACH address space (MM struct). The GMS is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * also the structure that contains the pointer to the mmu callout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * functions. This structure is linked to the mm_struct for the address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * using the mmu "register" function. The mmu interfaces are used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * provide the callbacks for TLB invalidation. The GMS contains:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * - asid[maxgrus] array. ASIDs are assigned to a GRU when a context is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * loaded into the GRU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * - asidmap[maxgrus]. bitmap to make it easier to find non-zero asids in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * the above array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * - ctxbitmap[maxgrus]. Indicates the contexts that are currently active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * in the GRU for the address space. This bitmap must be passed to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * GRU to do an invalidate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * The current algorithm for invalidating TLBs is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * - scan the asidmap for GRUs where the context has been loaded, ie,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * asid is non-zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * - for each gru found:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * - if the ctxtmap is non-zero, there are active contexts in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * GRU. TLB invalidate instructions must be issued to the GRU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * - if the ctxtmap is zero, no context is active. Set the ASID to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * zero to force a full TLB invalidation. This is fast but will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * cause a lot of TLB misses if the context is reloaded onto the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * GRU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) void gru_flush_tlb_range(struct gru_mm_struct *gms, unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) unsigned long len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct gru_state *gru;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct gru_mm_tracker *asids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct gru_tlb_global_handle *tgh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) unsigned long num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int grupagesize, pagesize, pageshift, gid, asid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* ZZZ TODO - handle huge pages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) pageshift = PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pagesize = (1UL << pageshift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) grupagesize = GRU_PAGESIZE(pageshift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) num = min(((len + pagesize - 1) >> pageshift), GRUMAXINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) STAT(flush_tlb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) gru_dbg(grudev, "gms %p, start 0x%lx, len 0x%lx, asidmap 0x%lx\n", gms,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) start, len, gms->ms_asidmap[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) spin_lock(&gms->ms_asid_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) for_each_gru_in_bitmap(gid, gms->ms_asidmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) STAT(flush_tlb_gru);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) gru = GID_TO_GRU(gid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) asids = gms->ms_asids + gid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) asid = asids->mt_asid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (asids->mt_ctxbitmap && asid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) STAT(flush_tlb_gru_tgh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) asid = GRUASID(asid, start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) gru_dbg(grudev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) " FLUSH gruid %d, asid 0x%x, vaddr 0x%lx, vamask 0x%x, num %ld, cbmap 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) gid, asid, start, grupagesize, num, asids->mt_ctxbitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) tgh = get_lock_tgh_handle(gru);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) tgh_invalidate(tgh, start, ~0, asid, grupagesize, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) num - 1, asids->mt_ctxbitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) get_unlock_tgh_handle(tgh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) STAT(flush_tlb_gru_zero_asid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) asids->mt_asid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) __clear_bit(gru->gs_gid, gms->ms_asidmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) gru_dbg(grudev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) " CLEARASID gruid %d, asid 0x%x, cbtmap 0x%x, asidmap 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) gid, asid, asids->mt_ctxbitmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) gms->ms_asidmap[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) spin_unlock(&gms->ms_asid_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * Flush the entire TLB on a chiplet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) void gru_flush_all_tlb(struct gru_state *gru)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct gru_tlb_global_handle *tgh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) gru_dbg(grudev, "gid %d\n", gru->gs_gid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) tgh = get_lock_tgh_handle(gru);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) tgh_invalidate(tgh, 0, ~0, 0, 1, 1, GRUMAXINVAL - 1, 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) get_unlock_tgh_handle(tgh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * MMUOPS notifier callout functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int gru_invalidate_range_start(struct mmu_notifier *mn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) const struct mmu_notifier_range *range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) struct gru_mm_struct *gms = container_of(mn, struct gru_mm_struct,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ms_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) STAT(mmu_invalidate_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) atomic_inc(&gms->ms_range_active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) gru_dbg(grudev, "gms %p, start 0x%lx, end 0x%lx, act %d\n", gms,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) range->start, range->end, atomic_read(&gms->ms_range_active));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) gru_flush_tlb_range(gms, range->start, range->end - range->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static void gru_invalidate_range_end(struct mmu_notifier *mn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) const struct mmu_notifier_range *range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct gru_mm_struct *gms = container_of(mn, struct gru_mm_struct,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ms_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* ..._and_test() provides needed barrier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) (void)atomic_dec_and_test(&gms->ms_range_active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) wake_up_all(&gms->ms_wait_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) gru_dbg(grudev, "gms %p, start 0x%lx, end 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) gms, range->start, range->end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static struct mmu_notifier *gru_alloc_notifier(struct mm_struct *mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct gru_mm_struct *gms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) gms = kzalloc(sizeof(*gms), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (!gms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) STAT(gms_alloc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) spin_lock_init(&gms->ms_asid_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) init_waitqueue_head(&gms->ms_wait_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return &gms->ms_notifier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static void gru_free_notifier(struct mmu_notifier *mn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) kfree(container_of(mn, struct gru_mm_struct, ms_notifier));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) STAT(gms_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static const struct mmu_notifier_ops gru_mmuops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .invalidate_range_start = gru_invalidate_range_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .invalidate_range_end = gru_invalidate_range_end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .alloc_notifier = gru_alloc_notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .free_notifier = gru_free_notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct gru_mm_struct *gru_register_mmu_notifier(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct mmu_notifier *mn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) mn = mmu_notifier_get_locked(&gru_mmuops, current->mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (IS_ERR(mn))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return ERR_CAST(mn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return container_of(mn, struct gru_mm_struct, ms_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) void gru_drop_mmu_notifier(struct gru_mm_struct *gms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) mmu_notifier_put(&gms->ms_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * Setup TGH parameters. There are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * - 24 TGH handles per GRU chiplet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * - a portion (MAX_LOCAL_TGH) of the handles are reserved for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * use by blade-local cpus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * - the rest are used by off-blade cpus. This usage is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * less frequent than blade-local usage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * For now, use 16 handles for local flushes, 8 for remote flushes. If the blade
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * has less tan or equal to 16 cpus, each cpu has a unique handle that it can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define MAX_LOCAL_TGH 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) void gru_tgh_flush_init(struct gru_state *gru)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) int cpus, shift = 0, n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) cpus = uv_blade_nr_possible_cpus(gru->gs_blade_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /* n = cpus rounded up to next power of 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (cpus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) n = 1 << fls(cpus - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * shift count for converting local cpu# to TGH index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * 0 if cpus <= MAX_LOCAL_TGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * 1 if cpus <= 2*MAX_LOCAL_TGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * etc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) shift = max(0, fls(n - 1) - fls(MAX_LOCAL_TGH - 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) gru->gs_tgh_local_shift = shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* first starting TGH index to use for remote purges */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) gru->gs_tgh_first_remote = (cpus + (1 << shift) - 1) >> shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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