Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Rockchip RK803 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <uapi/linux/rk803.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define RK803_CHIPID1	0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define RK803_CHIPID2	0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define IR_LED_DEFAULT_CURRENT	LED_500MA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define PRO_LED_DEFAULT_CURRENT	LED_600MA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define RK803_TIMEOUT		1000 /* usec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) enum SL_LED_CURRENT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	LED_100MA = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	LED_200MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	LED_300MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	LED_400MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	LED_500MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	LED_600MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	LED_700MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	LED_800MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	LED_900MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	LED_1000MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	LED_1100MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	LED_1200MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	LED_1300MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	LED_1400MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	LED_1500MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	LED_1600MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	LED_1700MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	LED_1800MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	LED_1900MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	LED_2000MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	LED_2100MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	LED_2200MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	LED_2300MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	LED_2400MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	LED_2500MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	LED_2600MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	LED_2700MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	LED_2800MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	LED_2900MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	LED_3000MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	LED_3100MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	LED_3200MA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static const char * const rk803_supply_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	"dvdd",     /* Digital power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define RK803_NUM_SUPPLIES ARRAY_SIZE(rk803_supply_names)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) struct rk803_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	unsigned short chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	unsigned char current1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	unsigned char current2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct gpio_desc *gpio_encc1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct gpio_desc *gpio_encc2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	struct miscdevice misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct regulator_bulk_data supplies[RK803_NUM_SUPPLIES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static const struct of_device_id rk803_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	{ .compatible = "rockchip,rk803" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static int rk803_power_on(struct rk803_data *rk803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	struct device *dev = &rk803->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	ret = regulator_bulk_enable(RK803_NUM_SUPPLIES, rk803->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		dev_err(dev, "Failed to enable regulators\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static void rk803_power_off(struct rk803_data *rk803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	regulator_bulk_disable(RK803_NUM_SUPPLIES, rk803->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) rk803_i2c_write_reg(struct rk803_data *rk803, uint8_t reg, uint8_t val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	unsigned long timeout, write_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	regmap = rk803->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	client = rk803->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	timeout = jiffies + msecs_to_jiffies(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		 * The timestamp shall be taken before the actual operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		 * to avoid a premature timeout in case of high CPU load.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		write_time = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		ret = regmap_write(regmap, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		dev_dbg(&client->dev, "write %xu@%d --> %d (%ld)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			 val, reg, ret, jiffies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		usleep_range(1000, 1500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	} while (time_before(write_time, timeout));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static long rk803_dev_ioctl(struct file *file, unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			    unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct rk803_data *rk803 =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		container_of(file->private_data, struct rk803_data, misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	case RK803_SET_GPIO1: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		int val = (int)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		gpiod_set_value(rk803->gpio_encc1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	case RK803_SET_GPIO2: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		int val = (int)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		gpiod_set_value(rk803->gpio_encc2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	case RK803_SET_CURENT1: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		int val = (int)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		rk803->current1 = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		rk803_i2c_write_reg(rk803, 0, rk803->current1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	case RK803_SET_CURENT2: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		int val = (int)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		rk803->current2 = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		rk803_i2c_write_reg(rk803, 1, rk803->current2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static const struct file_operations rk803_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	.unlocked_ioctl = rk803_dev_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.compat_ioctl = rk803_dev_ioctl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static int rk803_configure_regulators(struct rk803_data *rk803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	for (i = 0; i < RK803_NUM_SUPPLIES; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		rk803->supplies[i].supply = rk803_supply_names[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	return devm_regulator_bulk_get(&rk803->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 				       RK803_NUM_SUPPLIES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 				       rk803->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) rk803_probe(struct i2c_client *client, const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	//struct device_node *np = client->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	int msb, lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	unsigned short chipid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	struct rk803_data *rk803;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	struct regmap_config regmap_config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	rk803 = devm_kzalloc(dev, sizeof(*rk803), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	if (!rk803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	rk803->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	ret = rk803_configure_regulators(rk803);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		dev_err(dev, "Failed to get power regulators\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	rk803_power_on(rk803);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	/* check chip id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	msb = i2c_smbus_read_byte_data(client, RK803_CHIPID1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (msb < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		dev_err(dev, "failed to read the chip1 id at 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 			RK803_CHIPID1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		ret = -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	lsb = i2c_smbus_read_byte_data(client, RK803_CHIPID2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	if (lsb < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		dev_err(dev, "failed to read the chip2 id at 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			RK803_CHIPID2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		ret = lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	chipid = ((msb << 8) | lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	dev_info(dev, "chip id: 0x%x\n", (unsigned int)chipid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	regmap_config.val_bits = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	regmap_config.reg_bits = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	regmap_config.disable_locking = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	regmap = devm_regmap_init_i2c(client, &regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		ret = PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	rk803->chip_id = chipid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	rk803->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	rk803->current1 = IR_LED_DEFAULT_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	rk803->current2 = PRO_LED_DEFAULT_CURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	rk803->gpio_encc1 = devm_gpiod_get(dev, "gpio-encc1", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	if (IS_ERR(rk803->gpio_encc1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		dev_err(dev, "can not find gpio_encc1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		ret = PTR_ERR(rk803->gpio_encc1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	rk803->gpio_encc2 = devm_gpiod_get(dev, "gpio-encc2", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	if (IS_ERR(rk803->gpio_encc2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		dev_err(dev, "can not find gpio_encc2\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		ret = PTR_ERR(rk803->gpio_encc2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	/* OVP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	rk803_i2c_write_reg(rk803, 4, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	/* Control time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	rk803_i2c_write_reg(rk803, 2, 0xe3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	/* Control CV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	rk803_i2c_write_reg(rk803, 3, 0xa7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	/* PRO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	rk803_i2c_write_reg(rk803, 0, PRO_LED_DEFAULT_CURRENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	/* IR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	rk803_i2c_write_reg(rk803, 1, IR_LED_DEFAULT_CURRENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	i2c_set_clientdata(client, rk803);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	rk803->misc.minor = MISC_DYNAMIC_MINOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	rk803->misc.name = "rk803";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	rk803->misc.fops = &rk803_fops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	ret = misc_register(&rk803->misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		dev_err(&client->dev, "Error: misc_register returned %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 			ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	dev_info(dev, "rk803 probe ok!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	rk803_power_off(rk803);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static int rk803_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	struct rk803_data *rk803;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	rk803 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	misc_deregister(&rk803->misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	rk803_power_off(rk803);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static struct i2c_driver rk803_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		.name = "rk803",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		.of_match_table = rk803_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	.probe = rk803_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	.remove = rk803_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static int __init rk803_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	return i2c_add_driver(&rk803_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) subsys_initcall(rk803_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static void __exit rk803_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	i2c_del_driver(&rk803_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) module_exit(rk803_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) MODULE_DESCRIPTION("Driver for RK803");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) MODULE_AUTHOR("Rockchip");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) MODULE_LICENSE("GPL");