^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct aschip_pir_drv_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct gpio_desc *pulse_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct proc_dir_entry *procfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static int pir_aschip_set_sensibility(struct aschip_pir_drv_data *drv_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) uint32_t sensibility)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) if (sensibility > 100 || sensibility < 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) dev_err(drv_data->dev, "sensibilit should be [4, 100]\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) gpiod_set_value(drv_data->pulse_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) gpiod_set_value(drv_data->pulse_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) usleep_range(50000, 51000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) gpiod_set_value(drv_data->pulse_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) usleep_range(sensibility * 1000, sensibility * 1000 + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) gpiod_set_value(drv_data->pulse_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) usleep_range(50000, 51000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) gpiod_set_value(drv_data->pulse_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #ifdef CONFIG_PROC_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int pir_aschip_sensibility_show(struct seq_file *s, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) seq_puts(s, "set sensibility [4, 100] for PIR :\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) seq_puts(s, " echo [nr] > /proc/pir/sensibility\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int pir_aschip_sensibility_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return single_open(file, pir_aschip_sensibility_show, PDE_DATA(inode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static ssize_t pir_aschip_sensibility_write(struct file *filp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) size_t cnt, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct aschip_pir_drv_data *drv_data = ((struct seq_file *)filp->private_data)->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) ret = kstrtouint_from_user(buf, cnt, 0, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ret = pir_aschip_set_sensibility(drv_data, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return ret ? ret : cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static const struct file_operations pir_aschip_sensibility_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .open = pir_aschip_sensibility_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .read = seq_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .llseek = seq_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .release = single_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .write = pir_aschip_sensibility_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int pir_aschip_create_procfs(struct aschip_pir_drv_data *drv_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct proc_dir_entry *ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) drv_data->procfs = proc_mkdir("pir", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (!drv_data->procfs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ent = proc_create_data("sensibility", 0644, drv_data->procfs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) &pir_aschip_sensibility_fops, drv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (!ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) proc_remove(drv_data->procfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static void pir_aschip_proc_release(struct aschip_pir_drv_data *drv_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) remove_proc_entry("sensibility", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) proc_remove(drv_data->procfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static int pir_aschip_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct aschip_pir_drv_data *drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (!drv_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) drv_data->pulse_gpio = devm_gpiod_get(dev, "pulse", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (IS_ERR(drv_data->pulse_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) dev_err(dev, "Failed to get pwdn-gpios\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return PTR_ERR(drv_data->pulse_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #ifdef CONFIG_PROC_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) pir_aschip_create_procfs(drv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) drv_data->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) dev_set_drvdata(dev, drv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static int pir_aschip_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #ifdef CONFIG_PROC_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct aschip_pir_drv_data *drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) drv_data = dev_get_drvdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) pir_aschip_proc_release(drv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static const struct of_device_id pir_aschip_rockchip_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { .compatible = "aschip,pir" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MODULE_DEVICE_TABLE(of, pir_aschip_rockchip_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static struct platform_driver pir_aschip_pltfm_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .probe = pir_aschip_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .remove = pir_aschip_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .name = "pir_aschip_aschip",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .of_match_table = pir_aschip_rockchip_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) module_platform_driver(pir_aschip_pltfm_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MODULE_AUTHOR("Ziyuan Xu");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MODULE_DESCRIPTION("Aschip PIR sensibility control driver");