^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // Copyright 2017 IBM Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef _OCXL_INTERNAL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define _OCXL_INTERNAL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/cdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <misc/ocxl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define MAX_IRQ_PER_LINK 2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define MAX_IRQ_PER_CONTEXT MAX_IRQ_PER_LINK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) extern struct pci_driver ocxl_pci_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct ocxl_fn {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct device dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int bar_used[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct ocxl_fn_config config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct list_head afu_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) int pasid_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int actag_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int actag_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int actag_supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct list_head pasid_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct list_head actag_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) void *link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct ocxl_file_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct ocxl_afu *afu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct device dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct cdev cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct bin_attribute attr_global_mmio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct ocxl_afu {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct kref kref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct ocxl_fn *fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct ocxl_afu_config config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int pasid_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int pasid_count; /* opened contexts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int pasid_max; /* maximum number of contexts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int actag_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int actag_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct mutex contexts_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct idr contexts_idr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct mutex afu_control_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u64 global_mmio_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u64 irq_base_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) void __iomem *global_mmio_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u64 pp_mmio_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) void *private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) enum ocxl_context_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) CLOSED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) OPENED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ATTACHED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) // Contains metadata about a translation fault
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct ocxl_xsl_error {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u64 addr; // The address that triggered the fault
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u64 dsisr; // the value of the dsisr register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u64 count; // The number of times this fault has been triggered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct ocxl_context {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct ocxl_afu *afu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int pasid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct mutex status_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) enum ocxl_context_status status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct address_space *mapping;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct mutex mapping_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) wait_queue_head_t events_wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct mutex xsl_error_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct ocxl_xsl_error xsl_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct mutex irq_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct idr irq_idr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) u16 tidr; // Thread ID used for P9 wait implementation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct ocxl_process_element {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) __be64 config_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) __be32 reserved1[11];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) __be32 lpid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) __be32 tid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) __be32 pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) __be32 reserved2[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) __be64 amr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) __be32 reserved3[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) __be32 software_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int ocxl_create_cdev(struct ocxl_afu *afu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) void ocxl_destroy_cdev(struct ocxl_afu *afu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) int ocxl_file_register_afu(struct ocxl_afu *afu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) void ocxl_file_unregister_afu(struct ocxl_afu *afu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int ocxl_file_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) void ocxl_file_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int ocxl_pasid_afu_alloc(struct ocxl_fn *fn, u32 size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) void ocxl_pasid_afu_free(struct ocxl_fn *fn, u32 start, u32 size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int ocxl_actag_afu_alloc(struct ocxl_fn *fn, u32 size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) void ocxl_actag_afu_free(struct ocxl_fn *fn, u32 start, u32 size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Get the max PASID value that can be used by the function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int ocxl_config_get_pasid_info(struct pci_dev *dev, int *count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * Control whether the FPGA is reloaded on a link reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int ocxl_config_get_reset_reload(struct pci_dev *dev, int *val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int ocxl_config_set_reset_reload(struct pci_dev *dev, int val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * Check if an AFU index is valid for the given function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * AFU indexes can be sparse, so a driver should check all indexes up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * to the maximum found in the function description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int ocxl_config_check_afu_index(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct ocxl_fn_config *fn, int afu_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * ocxl_link_update_pe() - Update values within a Process Element
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * @link_handle: the link handle associated with the process element
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * @pasid: the PASID for the AFU context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * @tid: the new thread id for the process element
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * Returns 0 on success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) int ocxl_link_update_pe(void *link_handle, int pasid, __u16 tid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int ocxl_context_mmap(struct ocxl_context *ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct vm_area_struct *vma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) void ocxl_context_detach_all(struct ocxl_afu *afu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int ocxl_sysfs_register_afu(struct ocxl_file_info *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) void ocxl_sysfs_unregister_afu(struct ocxl_file_info *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) int ocxl_irq_offset_to_id(struct ocxl_context *ctx, u64 offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u64 ocxl_irq_id_to_offset(struct ocxl_context *ctx, int irq_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) void ocxl_afu_irq_free_all(struct ocxl_context *ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #endif /* _OCXL_INTERNAL_H_ */