Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2013-2020, Intel Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Intel Management Engine Interface (Intel MEI) Linux driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/pm_domain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/mei.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include "mei_dev.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include "hw-txe.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static const struct pci_device_id mei_txe_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	{PCI_VDEVICE(INTEL, 0x0F18)}, /* Baytrail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	{PCI_VDEVICE(INTEL, 0x2298)}, /* Cherrytrail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	{0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) MODULE_DEVICE_TABLE(pci, mei_txe_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static inline void mei_txe_set_pm_domain(struct mei_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) static inline void mei_txe_unset_pm_domain(struct mei_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static inline void mei_txe_set_pm_domain(struct mei_device *dev) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static inline void mei_txe_unset_pm_domain(struct mei_device *dev) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #endif /* CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * mei_txe_probe - Device Initialization Routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * @pdev: PCI device structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * @ent: entry in mei_txe_pci_tbl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * Return: 0 on success, <0 on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static int mei_txe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct mei_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct mei_txe_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	const int mask = BIT(SEC_BAR) | BIT(BRIDGE_BAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	/* enable pci dev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	err = pcim_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		dev_err(&pdev->dev, "failed to enable pci device.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	/* set PCI host mastering  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	/* pci request regions and mapping IO device memory for mei driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	err = pcim_iomap_regions(pdev, mask, KBUILD_MODNAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		dev_err(&pdev->dev, "failed to get pci regions.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			dev_err(&pdev->dev, "No suitable DMA available.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 			goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* allocates and initializes the mei dev structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	dev = mei_txe_dev_init(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	hw = to_txe_hw(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	hw->mem_addr = pcim_iomap_table(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	pci_enable_msi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	/* clear spurious interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	mei_clear_interrupts(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	/* request and enable interrupt  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (pci_dev_msi_enabled(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		err = request_threaded_irq(pdev->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			mei_txe_irq_thread_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			IRQF_ONESHOT, KBUILD_MODNAME, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		err = request_threaded_irq(pdev->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			mei_txe_irq_quick_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			mei_txe_irq_thread_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			IRQF_SHARED, KBUILD_MODNAME, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		dev_err(&pdev->dev, "mei: request_threaded_irq failure. irq = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			pdev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		goto end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (mei_start(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		dev_err(&pdev->dev, "init hw failure.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		goto release_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_TXI_RPM_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	pm_runtime_use_autosuspend(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	err = mei_register(dev, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		goto stop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	pci_set_drvdata(pdev, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	 * MEI requires to resume from runtime suspend mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	 * in order to perform link reset flow upon system suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	 * TXE maps runtime suspend/resume to own power gating states,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	 * hence we need to go around native PCI runtime service which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	 * eventually brings the device into D3cold/hot state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	 * But the TXE device cannot wake up from D3 unlike from own
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	 * power gating. To get around PCI device native runtime pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	 * TXE uses runtime pm domain handlers which take precedence.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	mei_txe_set_pm_domain(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	pm_runtime_put_noidle(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) stop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	mei_stop(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) release_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	mei_cancel_work(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	mei_disable_interrupts(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	free_irq(pdev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	dev_err(&pdev->dev, "initialization failed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)  * mei_txe_remove - Device Shutdown Routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)  * @pdev: PCI device structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)  *  mei_txe_shutdown is called from the reboot notifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)  *  it's a simplified version of remove so we go down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)  *  faster.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static void mei_txe_shutdown(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	struct mei_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	dev = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	dev_dbg(&pdev->dev, "shutdown\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	mei_stop(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	mei_txe_unset_pm_domain(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	mei_disable_interrupts(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	free_irq(pdev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)  * mei_txe_remove - Device Removal Routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)  * @pdev: PCI device structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)  * mei_remove is called by the PCI subsystem to alert the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)  * that it should release a PCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static void mei_txe_remove(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct mei_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	dev = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		dev_err(&pdev->dev, "mei: dev == NULL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	pm_runtime_get_noresume(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	mei_stop(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	mei_txe_unset_pm_domain(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	mei_disable_interrupts(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	free_irq(pdev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	mei_deregister(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static int mei_txe_pci_suspend(struct device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct pci_dev *pdev = to_pci_dev(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	struct mei_device *dev = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	dev_dbg(&pdev->dev, "suspend\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	mei_stop(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	mei_disable_interrupts(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	free_irq(pdev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	pci_disable_msi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static int mei_txe_pci_resume(struct device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	struct pci_dev *pdev = to_pci_dev(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	struct mei_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	dev = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	pci_enable_msi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	mei_clear_interrupts(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	/* request and enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	if (pci_dev_msi_enabled(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		err = request_threaded_irq(pdev->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 			NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			mei_txe_irq_thread_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 			IRQF_ONESHOT, KBUILD_MODNAME, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		err = request_threaded_irq(pdev->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			mei_txe_irq_quick_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 			mei_txe_irq_thread_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 			IRQF_SHARED, KBUILD_MODNAME, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 				pdev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	err = mei_restart(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #endif /* CONFIG_PM_SLEEP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static int mei_txe_pm_runtime_idle(struct device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	struct mei_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	dev_dbg(device, "rpm: txe: runtime_idle\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	dev = dev_get_drvdata(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	if (mei_write_is_idle(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		pm_runtime_autosuspend(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static int mei_txe_pm_runtime_suspend(struct device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct mei_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	dev_dbg(device, "rpm: txe: runtime suspend\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	dev = dev_get_drvdata(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	mutex_lock(&dev->device_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	if (mei_write_is_idle(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		ret = mei_txe_aliveness_set_sync(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		ret = -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	/* keep irq on we are staying in D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	dev_dbg(device, "rpm: txe: runtime suspend ret=%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	mutex_unlock(&dev->device_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	if (ret && ret != -EAGAIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		schedule_work(&dev->reset_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static int mei_txe_pm_runtime_resume(struct device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	struct mei_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	dev_dbg(device, "rpm: txe: runtime resume\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	dev = dev_get_drvdata(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	mutex_lock(&dev->device_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	mei_enable_interrupts(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	ret = mei_txe_aliveness_set_sync(dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	mutex_unlock(&dev->device_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	dev_dbg(device, "rpm: txe: runtime resume ret = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		schedule_work(&dev->reset_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)  * mei_txe_set_pm_domain - fill and set pm domain structure for device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)  * @dev: mei_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static inline void mei_txe_set_pm_domain(struct mei_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	struct pci_dev *pdev  = to_pci_dev(dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	if (pdev->dev.bus && pdev->dev.bus->pm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		dev->pg_domain.ops = *pdev->dev.bus->pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		dev->pg_domain.ops.runtime_suspend = mei_txe_pm_runtime_suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		dev->pg_domain.ops.runtime_resume = mei_txe_pm_runtime_resume;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		dev->pg_domain.ops.runtime_idle = mei_txe_pm_runtime_idle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		dev_pm_domain_set(&pdev->dev, &dev->pg_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)  * mei_txe_unset_pm_domain - clean pm domain structure for device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)  * @dev: mei_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static inline void mei_txe_unset_pm_domain(struct mei_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	/* stop using pm callbacks if any */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	dev_pm_domain_set(dev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static const struct dev_pm_ops mei_txe_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	SET_SYSTEM_SLEEP_PM_OPS(mei_txe_pci_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 				mei_txe_pci_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	SET_RUNTIME_PM_OPS(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		mei_txe_pm_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		mei_txe_pm_runtime_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		mei_txe_pm_runtime_idle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #define MEI_TXE_PM_OPS	(&mei_txe_pm_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #define MEI_TXE_PM_OPS	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) #endif /* CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)  *  PCI driver structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static struct pci_driver mei_txe_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	.name = KBUILD_MODNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	.id_table = mei_txe_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	.probe = mei_txe_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	.remove = mei_txe_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	.shutdown = mei_txe_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	.driver.pm = MEI_TXE_PM_OPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) module_pci_driver(mei_txe_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) MODULE_AUTHOR("Intel Corporation");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) MODULE_DESCRIPTION("Intel(R) Trusted Execution Environment Interface");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) MODULE_LICENSE("GPL v2");