^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for the HP iLO management processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 Hewlett-Packard Development Company, L.P.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * David Altobelli <david.altobelli@hpe.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/cdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "hpilo.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static struct class *ilo_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static unsigned int ilo_major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static unsigned int max_ccb = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static char ilo_hwdev[MAX_ILO_DEV];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static const struct pci_device_id ilo_blacklist[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* auxiliary iLO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3307, PCI_VENDOR_ID_HP, 0x1979)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* CL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3307, PCI_VENDOR_ID_HP_3PAR, 0x0289)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static inline int get_entry_id(int entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return (entry & ENTRY_MASK_DESCRIPTOR) >> ENTRY_BITPOS_DESCRIPTOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static inline int get_entry_len(int entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return ((entry & ENTRY_MASK_QWORDS) >> ENTRY_BITPOS_QWORDS) << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static inline int mk_entry(int id, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int qlen = len & 7 ? (len >> 3) + 1 : len >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return id << ENTRY_BITPOS_DESCRIPTOR | qlen << ENTRY_BITPOS_QWORDS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static inline int desc_mem_sz(int nr_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return nr_entry << L2_QENTRY_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * FIFO queues, shared with hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * If a queue has empty slots, an entry is added to the queue tail,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * and that entry is marked as occupied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * Entries can be dequeued from the head of the list, when the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * has marked the entry as consumed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * Returns true on successful queue/dequeue, false on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int fifo_enqueue(struct ilo_hwinfo *hw, char *fifobar, int entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct fifo *fifo_q = FIFOBARTOHANDLE(fifobar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) spin_lock_irqsave(&hw->fifo_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (!(fifo_q->fifobar[(fifo_q->tail + 1) & fifo_q->imask]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) & ENTRY_MASK_O)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) fifo_q->fifobar[fifo_q->tail & fifo_q->imask] |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) (entry & ENTRY_MASK_NOSTATE) | fifo_q->merge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) fifo_q->tail += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) spin_unlock_irqrestore(&hw->fifo_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int fifo_dequeue(struct ilo_hwinfo *hw, char *fifobar, int *entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct fifo *fifo_q = FIFOBARTOHANDLE(fifobar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) u64 c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) spin_lock_irqsave(&hw->fifo_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) c = fifo_q->fifobar[fifo_q->head & fifo_q->imask];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (c & ENTRY_MASK_C) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) *entry = c & ENTRY_MASK_NOSTATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) fifo_q->fifobar[fifo_q->head & fifo_q->imask] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) (c | ENTRY_MASK) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) fifo_q->head += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) spin_unlock_irqrestore(&hw->fifo_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static int fifo_check_recv(struct ilo_hwinfo *hw, char *fifobar)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct fifo *fifo_q = FIFOBARTOHANDLE(fifobar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u64 c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) spin_lock_irqsave(&hw->fifo_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) c = fifo_q->fifobar[fifo_q->head & fifo_q->imask];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (c & ENTRY_MASK_C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) spin_unlock_irqrestore(&hw->fifo_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static int ilo_pkt_enqueue(struct ilo_hwinfo *hw, struct ccb *ccb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int dir, int id, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) char *fifobar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (dir == SENDQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) fifobar = ccb->ccb_u1.send_fifobar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) fifobar = ccb->ccb_u3.recv_fifobar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) entry = mk_entry(id, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return fifo_enqueue(hw, fifobar, entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int ilo_pkt_dequeue(struct ilo_hwinfo *hw, struct ccb *ccb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int dir, int *id, int *len, void **pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) char *fifobar, *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int entry = 0, pkt_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (dir == SENDQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) fifobar = ccb->ccb_u1.send_fifobar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) desc = ccb->ccb_u2.send_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) fifobar = ccb->ccb_u3.recv_fifobar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) desc = ccb->ccb_u4.recv_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) ret = fifo_dequeue(hw, fifobar, &entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) pkt_id = get_entry_id(entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) *id = pkt_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) *len = get_entry_len(entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) *pkt = (void *)(desc + desc_mem_sz(pkt_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static int ilo_pkt_recv(struct ilo_hwinfo *hw, struct ccb *ccb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) char *fifobar = ccb->ccb_u3.recv_fifobar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return fifo_check_recv(hw, fifobar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static inline void doorbell_set(struct ccb *ccb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) iowrite8(1, ccb->ccb_u5.db_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static inline void doorbell_clr(struct ccb *ccb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) iowrite8(2, ccb->ccb_u5.db_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static inline int ctrl_set(int l2sz, int idxmask, int desclim)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int active = 0, go = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return l2sz << CTRL_BITPOS_L2SZ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) idxmask << CTRL_BITPOS_FIFOINDEXMASK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) desclim << CTRL_BITPOS_DESCLIMIT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) active << CTRL_BITPOS_A |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) go << CTRL_BITPOS_G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static void ctrl_setup(struct ccb *ccb, int nr_desc, int l2desc_sz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* for simplicity, use the same parameters for send and recv ctrls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ccb->send_ctrl = ctrl_set(l2desc_sz, nr_desc-1, nr_desc-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ccb->recv_ctrl = ctrl_set(l2desc_sz, nr_desc-1, nr_desc-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static inline int fifo_sz(int nr_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* size of a fifo is determined by the number of entries it contains */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return nr_entry * sizeof(u64) + FIFOHANDLESIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static void fifo_setup(void *base_addr, int nr_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct fifo *fifo_q = base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* set up an empty fifo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) fifo_q->head = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) fifo_q->tail = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) fifo_q->reset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) fifo_q->nrents = nr_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) fifo_q->imask = nr_entry - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) fifo_q->merge = ENTRY_MASK_O;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) for (i = 0; i < nr_entry; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) fifo_q->fifobar[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static void ilo_ccb_close(struct pci_dev *pdev, struct ccb_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct ccb *driver_ccb = &data->driver_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct ccb __iomem *device_ccb = data->mapped_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) int retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* complicated dance to tell the hw we are stopping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) doorbell_clr(driver_ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) iowrite32(ioread32(&device_ccb->send_ctrl) & ~(1 << CTRL_BITPOS_G),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) &device_ccb->send_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) iowrite32(ioread32(&device_ccb->recv_ctrl) & ~(1 << CTRL_BITPOS_G),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) &device_ccb->recv_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* give iLO some time to process stop request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) for (retries = MAX_WAIT; retries > 0; retries--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) doorbell_set(driver_ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) udelay(WAIT_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (!(ioread32(&device_ccb->send_ctrl) & (1 << CTRL_BITPOS_A))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) !(ioread32(&device_ccb->recv_ctrl) & (1 << CTRL_BITPOS_A)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (retries == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) dev_err(&pdev->dev, "Closing, but controller still active\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* clear the hw ccb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) memset_io(device_ccb, 0, sizeof(struct ccb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* free resources used to back send/recv queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) dma_free_coherent(&pdev->dev, data->dma_size, data->dma_va,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) data->dma_pa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int ilo_ccb_setup(struct ilo_hwinfo *hw, struct ccb_data *data, int slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) char *dma_va;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) dma_addr_t dma_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct ccb *driver_ccb, *ilo_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) driver_ccb = &data->driver_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ilo_ccb = &data->ilo_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) data->dma_size = 2 * fifo_sz(NR_QENTRY) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 2 * desc_mem_sz(NR_QENTRY) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ILO_START_ALIGN + ILO_CACHE_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) data->dma_va = dma_alloc_coherent(&hw->ilo_dev->dev, data->dma_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) &data->dma_pa, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (!data->dma_va)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) dma_va = (char *)data->dma_va;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) dma_pa = data->dma_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) dma_va = (char *)roundup((unsigned long)dma_va, ILO_START_ALIGN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) dma_pa = roundup(dma_pa, ILO_START_ALIGN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * Create two ccb's, one with virt addrs, one with phys addrs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * Copy the phys addr ccb to device shared mem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) ctrl_setup(driver_ccb, NR_QENTRY, L2_QENTRY_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ctrl_setup(ilo_ccb, NR_QENTRY, L2_QENTRY_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) fifo_setup(dma_va, NR_QENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) driver_ccb->ccb_u1.send_fifobar = dma_va + FIFOHANDLESIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ilo_ccb->ccb_u1.send_fifobar_pa = dma_pa + FIFOHANDLESIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) dma_va += fifo_sz(NR_QENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) dma_pa += fifo_sz(NR_QENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) dma_va = (char *)roundup((unsigned long)dma_va, ILO_CACHE_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) dma_pa = roundup(dma_pa, ILO_CACHE_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) fifo_setup(dma_va, NR_QENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) driver_ccb->ccb_u3.recv_fifobar = dma_va + FIFOHANDLESIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ilo_ccb->ccb_u3.recv_fifobar_pa = dma_pa + FIFOHANDLESIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) dma_va += fifo_sz(NR_QENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) dma_pa += fifo_sz(NR_QENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) driver_ccb->ccb_u2.send_desc = dma_va;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ilo_ccb->ccb_u2.send_desc_pa = dma_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) dma_pa += desc_mem_sz(NR_QENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) dma_va += desc_mem_sz(NR_QENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) driver_ccb->ccb_u4.recv_desc = dma_va;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ilo_ccb->ccb_u4.recv_desc_pa = dma_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) driver_ccb->channel = slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) ilo_ccb->channel = slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) driver_ccb->ccb_u5.db_base = hw->db_vaddr + (slot << L2_DB_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) ilo_ccb->ccb_u5.db_base = NULL; /* hw ccb's doorbell is not used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static void ilo_ccb_open(struct ilo_hwinfo *hw, struct ccb_data *data, int slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) int pkt_id, pkt_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct ccb *driver_ccb = &data->driver_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* copy the ccb with physical addrs to device memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) data->mapped_ccb = (struct ccb __iomem *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) (hw->ram_vaddr + (slot * ILOHW_CCB_SZ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) memcpy_toio(data->mapped_ccb, &data->ilo_ccb, sizeof(struct ccb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* put packets on the send and receive queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) pkt_sz = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) for (pkt_id = 0; pkt_id < NR_QENTRY; pkt_id++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) ilo_pkt_enqueue(hw, driver_ccb, SENDQ, pkt_id, pkt_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) doorbell_set(driver_ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) pkt_sz = desc_mem_sz(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) for (pkt_id = 0; pkt_id < NR_QENTRY; pkt_id++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) ilo_pkt_enqueue(hw, driver_ccb, RECVQ, pkt_id, pkt_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* the ccb is ready to use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) doorbell_clr(driver_ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static int ilo_ccb_verify(struct ilo_hwinfo *hw, struct ccb_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) int pkt_id, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) struct ccb *driver_ccb = &data->driver_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* make sure iLO is really handling requests */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) for (i = MAX_WAIT; i > 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (ilo_pkt_dequeue(hw, driver_ccb, SENDQ, &pkt_id, NULL, NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) udelay(WAIT_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (i == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) dev_err(&hw->ilo_dev->dev, "Open could not dequeue a packet\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) ilo_pkt_enqueue(hw, driver_ccb, SENDQ, pkt_id, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) doorbell_set(driver_ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static inline int is_channel_reset(struct ccb *ccb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /* check for this particular channel needing a reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) return FIFOBARTOHANDLE(ccb->ccb_u1.send_fifobar)->reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static inline void set_channel_reset(struct ccb *ccb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* set a flag indicating this channel needs a reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) FIFOBARTOHANDLE(ccb->ccb_u1.send_fifobar)->reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) static inline int get_device_outbound(struct ilo_hwinfo *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return ioread32(&hw->mmio_vaddr[DB_OUT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static inline int is_db_reset(int db_out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return db_out & (1 << DB_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static inline int is_device_reset(struct ilo_hwinfo *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* check for global reset condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return is_db_reset(get_device_outbound(hw));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static inline void clear_pending_db(struct ilo_hwinfo *hw, int clr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) iowrite32(clr, &hw->mmio_vaddr[DB_OUT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static inline void clear_device(struct ilo_hwinfo *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) /* clear the device (reset bits, pending channel entries) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) clear_pending_db(hw, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static inline void ilo_enable_interrupts(struct ilo_hwinfo *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) iowrite8(ioread8(&hw->mmio_vaddr[DB_IRQ]) | 1, &hw->mmio_vaddr[DB_IRQ]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static inline void ilo_disable_interrupts(struct ilo_hwinfo *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) iowrite8(ioread8(&hw->mmio_vaddr[DB_IRQ]) & ~1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) &hw->mmio_vaddr[DB_IRQ]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static void ilo_set_reset(struct ilo_hwinfo *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) int slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) * Mapped memory is zeroed on ilo reset, so set a per ccb flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) * to indicate that this ccb needs to be closed and reopened.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) for (slot = 0; slot < max_ccb; slot++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (!hw->ccb_alloc[slot])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) set_channel_reset(&hw->ccb_alloc[slot]->driver_ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static ssize_t ilo_read(struct file *fp, char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) size_t len, loff_t *off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) int err, found, cnt, pkt_id, pkt_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct ccb_data *data = fp->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct ccb *driver_ccb = &data->driver_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) struct ilo_hwinfo *hw = data->ilo_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) void *pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) if (is_channel_reset(driver_ccb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * If the device has been reset, applications
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * need to close and reopen all ccbs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * This function is to be called when data is expected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * in the channel, and will return an error if no packet is found
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * during the loop below. The sleep/retry logic is to allow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * applications to call read() immediately post write(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) * and give iLO some time to process the sent packet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) cnt = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /* look for a received packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) found = ilo_pkt_dequeue(hw, driver_ccb, RECVQ, &pkt_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) &pkt_len, &pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (found)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) } while (!found && cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (!found)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /* only copy the length of the received packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (pkt_len < len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) len = pkt_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) err = copy_to_user(buf, pkt, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /* return the received packet to the queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) ilo_pkt_enqueue(hw, driver_ccb, RECVQ, pkt_id, desc_mem_sz(1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return err ? -EFAULT : len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static ssize_t ilo_write(struct file *fp, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) size_t len, loff_t *off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) int err, pkt_id, pkt_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) struct ccb_data *data = fp->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) struct ccb *driver_ccb = &data->driver_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct ilo_hwinfo *hw = data->ilo_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) void *pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (is_channel_reset(driver_ccb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* get a packet to send the user command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (!ilo_pkt_dequeue(hw, driver_ccb, SENDQ, &pkt_id, &pkt_len, &pkt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /* limit the length to the length of the packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (pkt_len < len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) len = pkt_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /* on failure, set the len to 0 to return empty packet to the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) err = copy_from_user(pkt, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /* send the packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) ilo_pkt_enqueue(hw, driver_ccb, SENDQ, pkt_id, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) doorbell_set(driver_ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return err ? -EFAULT : len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static __poll_t ilo_poll(struct file *fp, poll_table *wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) struct ccb_data *data = fp->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) struct ccb *driver_ccb = &data->driver_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) poll_wait(fp, &data->ccb_waitq, wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) if (is_channel_reset(driver_ccb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) return EPOLLERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) else if (ilo_pkt_recv(data->ilo_hw, driver_ccb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) return EPOLLIN | EPOLLRDNORM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static int ilo_close(struct inode *ip, struct file *fp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) int slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) struct ccb_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) struct ilo_hwinfo *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) slot = iminor(ip) % max_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) hw = container_of(ip->i_cdev, struct ilo_hwinfo, cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) spin_lock(&hw->open_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (hw->ccb_alloc[slot]->ccb_cnt == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) data = fp->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) spin_lock_irqsave(&hw->alloc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) hw->ccb_alloc[slot] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) spin_unlock_irqrestore(&hw->alloc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) ilo_ccb_close(hw->ilo_dev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) kfree(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) hw->ccb_alloc[slot]->ccb_cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) spin_unlock(&hw->open_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static int ilo_open(struct inode *ip, struct file *fp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) int slot, error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) struct ccb_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) struct ilo_hwinfo *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) slot = iminor(ip) % max_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) hw = container_of(ip->i_cdev, struct ilo_hwinfo, cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) /* new ccb allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) data = kzalloc(sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) spin_lock(&hw->open_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /* each fd private_data holds sw/hw view of ccb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (hw->ccb_alloc[slot] == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /* create a channel control block for this minor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) error = ilo_ccb_setup(hw, data, slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) kfree(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) data->ccb_cnt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) data->ccb_excl = fp->f_flags & O_EXCL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) data->ilo_hw = hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) init_waitqueue_head(&data->ccb_waitq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) /* write the ccb to hw */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) spin_lock_irqsave(&hw->alloc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) ilo_ccb_open(hw, data, slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) hw->ccb_alloc[slot] = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) spin_unlock_irqrestore(&hw->alloc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) /* make sure the channel is functional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) error = ilo_ccb_verify(hw, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) spin_lock_irqsave(&hw->alloc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) hw->ccb_alloc[slot] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) spin_unlock_irqrestore(&hw->alloc_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ilo_ccb_close(hw->ilo_dev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) kfree(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) kfree(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if (fp->f_flags & O_EXCL || hw->ccb_alloc[slot]->ccb_excl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * The channel exists, and either this open
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) * or a previous open of this channel wants
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * exclusive access.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) error = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) hw->ccb_alloc[slot]->ccb_cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) spin_unlock(&hw->open_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (!error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) fp->private_data = hw->ccb_alloc[slot];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) static const struct file_operations ilo_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .read = ilo_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .write = ilo_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) .poll = ilo_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .open = ilo_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .release = ilo_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .llseek = noop_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) static irqreturn_t ilo_isr(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) struct ilo_hwinfo *hw = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) int pending, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) spin_lock(&hw->alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) /* check for ccbs which have data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) pending = get_device_outbound(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (!pending) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) spin_unlock(&hw->alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) if (is_db_reset(pending)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) /* wake up all ccbs if the device was reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) pending = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) ilo_set_reset(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) for (i = 0; i < max_ccb; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (!hw->ccb_alloc[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) if (pending & (1 << i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) wake_up_interruptible(&hw->ccb_alloc[i]->ccb_waitq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) /* clear the device of the channels that have been handled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) clear_pending_db(hw, pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) spin_unlock(&hw->alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) static void ilo_unmap_device(struct pci_dev *pdev, struct ilo_hwinfo *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) pci_iounmap(pdev, hw->db_vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) pci_iounmap(pdev, hw->ram_vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) pci_iounmap(pdev, hw->mmio_vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) static int ilo_map_device(struct pci_dev *pdev, struct ilo_hwinfo *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) int bar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) unsigned long off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) /* map the memory mapped i/o registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) hw->mmio_vaddr = pci_iomap(pdev, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) if (hw->mmio_vaddr == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) dev_err(&pdev->dev, "Error mapping mmio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /* map the adapter shared memory region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (pdev->subsystem_device == 0x00E4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) bar = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) /* Last 8k is reserved for CCBs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) off = pci_resource_len(pdev, bar) - 0x2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) bar = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) off = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) hw->ram_vaddr = pci_iomap_range(pdev, bar, off, max_ccb * ILOHW_CCB_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (hw->ram_vaddr == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) dev_err(&pdev->dev, "Error mapping shared mem\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) goto mmio_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) /* map the doorbell aperture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) hw->db_vaddr = pci_iomap(pdev, 3, max_ccb * ONE_DB_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (hw->db_vaddr == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) dev_err(&pdev->dev, "Error mapping doorbell\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) goto ram_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) ram_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) pci_iounmap(pdev, hw->ram_vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) mmio_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) pci_iounmap(pdev, hw->mmio_vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static void ilo_remove(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) int i, minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) struct ilo_hwinfo *ilo_hw = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) if (!ilo_hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) clear_device(ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) minor = MINOR(ilo_hw->cdev.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) for (i = minor; i < minor + max_ccb; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) device_destroy(ilo_class, MKDEV(ilo_major, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) cdev_del(&ilo_hw->cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) ilo_disable_interrupts(ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) free_irq(pdev->irq, ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) ilo_unmap_device(pdev, ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) pci_release_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * pci_disable_device(pdev) used to be here. But this PCI device has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) * two functions with interrupt lines connected to a single pin. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * other one is a USB host controller. So when we disable the PIN here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) * e.g. by rmmod hpilo, the controller stops working. It is because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * the interrupt link is disabled in ACPI since it is not refcounted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) * yet. See acpi_pci_link_free_irq called from acpi_pci_irq_disable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) kfree(ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) ilo_hwdev[(minor / max_ccb)] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) static int ilo_probe(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) const struct pci_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) int devnum, minor, start, error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) struct ilo_hwinfo *ilo_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (pci_match_id(ilo_blacklist, pdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) dev_dbg(&pdev->dev, "Not supported on this device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (max_ccb > MAX_CCB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) max_ccb = MAX_CCB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) else if (max_ccb < MIN_CCB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) max_ccb = MIN_CCB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) /* find a free range for device files */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) for (devnum = 0; devnum < MAX_ILO_DEV; devnum++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) if (ilo_hwdev[devnum] == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) ilo_hwdev[devnum] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) if (devnum == MAX_ILO_DEV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) dev_err(&pdev->dev, "Error finding free device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) /* track global allocations for this device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) ilo_hw = kzalloc(sizeof(*ilo_hw), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (!ilo_hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) ilo_hw->ilo_dev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) spin_lock_init(&ilo_hw->alloc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) spin_lock_init(&ilo_hw->fifo_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) spin_lock_init(&ilo_hw->open_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) error = pci_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) error = pci_request_regions(pdev, ILO_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) goto disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) error = ilo_map_device(pdev, ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) goto free_regions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) pci_set_drvdata(pdev, ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) clear_device(ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) error = request_irq(pdev->irq, ilo_isr, IRQF_SHARED, "hpilo", ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) goto unmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) ilo_enable_interrupts(ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) cdev_init(&ilo_hw->cdev, &ilo_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) ilo_hw->cdev.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) start = devnum * max_ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) error = cdev_add(&ilo_hw->cdev, MKDEV(ilo_major, start), max_ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) dev_err(&pdev->dev, "Could not add cdev\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) goto remove_isr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) for (minor = 0 ; minor < max_ccb; minor++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) dev = device_create(ilo_class, &pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) MKDEV(ilo_major, minor), NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) "hpilo!d%dccb%d", devnum, minor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) if (IS_ERR(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) dev_err(&pdev->dev, "Could not create files\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) remove_isr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) ilo_disable_interrupts(ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) free_irq(pdev->irq, ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) unmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) ilo_unmap_device(pdev, ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) free_regions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) pci_release_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) /* pci_disable_device(pdev); see comment in ilo_remove */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) kfree(ilo_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) ilo_hwdev[devnum] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static const struct pci_device_id ilo_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB204) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3307) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) MODULE_DEVICE_TABLE(pci, ilo_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) static struct pci_driver ilo_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) .name = ILO_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .id_table = ilo_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) .probe = ilo_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .remove = ilo_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) static int __init ilo_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) dev_t dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) ilo_class = class_create(THIS_MODULE, "iLO");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) if (IS_ERR(ilo_class)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) error = PTR_ERR(ilo_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) error = alloc_chrdev_region(&dev, 0, MAX_OPEN, ILO_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) goto class_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) ilo_major = MAJOR(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) error = pci_register_driver(&ilo_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) goto chr_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) chr_remove:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) unregister_chrdev_region(dev, MAX_OPEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) class_destroy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) class_destroy(ilo_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) static void __exit ilo_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) pci_unregister_driver(&ilo_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) unregister_chrdev_region(MKDEV(ilo_major, 0), MAX_OPEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) class_destroy(ilo_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) MODULE_VERSION("1.5.0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) MODULE_ALIAS(ILO_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) MODULE_DESCRIPTION(ILO_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) MODULE_AUTHOR("David Altobelli <david.altobelli@hpe.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) module_param(max_ccb, uint, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) MODULE_PARM_DESC(max_ccb, "Maximum number of HP iLO channels to attach (8-24)(default=16)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) module_init(ilo_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) module_exit(ilo_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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