^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2016-2019 HabanaLabs, Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include "habanalabs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) long hl_get_frequency(struct hl_device *hdev, u32 pll_index, bool curr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct cpucp_packet pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) long result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) memset(&pkt, 0, sizeof(pkt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) if (curr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) pkt.ctl = cpu_to_le32(CPUCP_PACKET_FREQUENCY_CURR_GET <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) CPUCP_PKT_CTL_OPCODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) pkt.ctl = cpu_to_le32(CPUCP_PACKET_FREQUENCY_GET <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) CPUCP_PKT_CTL_OPCODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) pkt.pll_index = cpu_to_le32(pll_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 0, &result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) dev_err(hdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) "Failed to get frequency of PLL %d, error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) pll_index, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) result = rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) void hl_set_frequency(struct hl_device *hdev, u32 pll_index, u64 freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct cpucp_packet pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) memset(&pkt, 0, sizeof(pkt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) pkt.ctl = cpu_to_le32(CPUCP_PACKET_FREQUENCY_SET <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) CPUCP_PKT_CTL_OPCODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) pkt.pll_index = cpu_to_le32(pll_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) pkt.value = cpu_to_le64(freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) dev_err(hdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) "Failed to set frequency to PLL %d, error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) pll_index, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u64 hl_get_max_power(struct hl_device *hdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct cpucp_packet pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) long result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) memset(&pkt, 0, sizeof(pkt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) pkt.ctl = cpu_to_le32(CPUCP_PACKET_MAX_POWER_GET <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) CPUCP_PKT_CTL_OPCODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 0, &result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) dev_err(hdev->dev, "Failed to get max power, error %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) result = rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) void hl_set_max_power(struct hl_device *hdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct cpucp_packet pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) memset(&pkt, 0, sizeof(pkt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) pkt.ctl = cpu_to_le32(CPUCP_PACKET_MAX_POWER_SET <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) CPUCP_PKT_CTL_OPCODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) pkt.value = cpu_to_le64(hdev->max_power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) dev_err(hdev->dev, "Failed to set max power, error %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static ssize_t uboot_ver_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return sprintf(buf, "%s\n", hdev->asic_prop.uboot_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static ssize_t armcp_kernel_ver_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return sprintf(buf, "%s", hdev->asic_prop.cpucp_info.kernel_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static ssize_t armcp_ver_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return sprintf(buf, "%s\n", hdev->asic_prop.cpucp_info.cpucp_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static ssize_t cpld_ver_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return sprintf(buf, "0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) hdev->asic_prop.cpucp_info.cpld_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static ssize_t cpucp_kernel_ver_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return sprintf(buf, "%s", hdev->asic_prop.cpucp_info.kernel_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static ssize_t cpucp_ver_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return sprintf(buf, "%s\n", hdev->asic_prop.cpucp_info.cpucp_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static ssize_t infineon_ver_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return sprintf(buf, "0x%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) hdev->asic_prop.cpucp_info.infineon_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static ssize_t fuse_ver_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return sprintf(buf, "%s\n", hdev->asic_prop.cpucp_info.fuse_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static ssize_t thermal_ver_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return sprintf(buf, "%s", hdev->asic_prop.cpucp_info.thermal_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static ssize_t preboot_btl_ver_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return sprintf(buf, "%s\n", hdev->asic_prop.preboot_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static ssize_t soft_reset_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) long value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) rc = kstrtoul(buf, 0, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) count = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (!hdev->supports_soft_reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) dev_err(hdev->dev, "Device does not support soft-reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) dev_warn(hdev->dev, "Soft-Reset requested through sysfs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) hl_device_reset(hdev, false, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static ssize_t hard_reset_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) long value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) rc = kstrtoul(buf, 0, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) count = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) dev_warn(hdev->dev, "Hard-Reset requested through sysfs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) hl_device_reset(hdev, true, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static ssize_t device_type_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) char *str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) switch (hdev->asic_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) case ASIC_GOYA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) str = "GOYA";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) case ASIC_GAUDI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) str = "GAUDI";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) dev_err(hdev->dev, "Unrecognized ASIC type %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) hdev->asic_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return sprintf(buf, "%s\n", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static ssize_t pci_addr_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return sprintf(buf, "%04x:%02x:%02x.%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) pci_domain_nr(hdev->pdev->bus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) hdev->pdev->bus->number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) PCI_SLOT(hdev->pdev->devfn),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) PCI_FUNC(hdev->pdev->devfn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static ssize_t status_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) char *str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (atomic_read(&hdev->in_reset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) str = "In reset";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) else if (hdev->disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) str = "Malfunction";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) str = "Operational";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return sprintf(buf, "%s\n", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static ssize_t soft_reset_cnt_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return sprintf(buf, "%d\n", hdev->soft_reset_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static ssize_t hard_reset_cnt_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return sprintf(buf, "%d\n", hdev->hard_reset_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static ssize_t max_power_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (hl_device_disabled_or_in_reset(hdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) val = hl_get_max_power(hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) return sprintf(buf, "%lu\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static ssize_t max_power_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct device_attribute *attr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) unsigned long value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (hl_device_disabled_or_in_reset(hdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) count = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) rc = kstrtoul(buf, 0, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) count = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) hdev->max_power = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) hl_set_max_power(hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static ssize_t eeprom_read_handler(struct file *filp, struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct bin_attribute *attr, char *buf, loff_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) size_t max_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) struct hl_device *hdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) char *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (hl_device_disabled_or_in_reset(hdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (!max_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) data = kzalloc(max_size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) rc = hdev->asic_funcs->get_eeprom_data(hdev, data, max_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) memcpy(buf, data, max_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) kfree(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return max_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static DEVICE_ATTR_RO(armcp_kernel_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static DEVICE_ATTR_RO(armcp_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static DEVICE_ATTR_RO(cpld_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static DEVICE_ATTR_RO(cpucp_kernel_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static DEVICE_ATTR_RO(cpucp_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static DEVICE_ATTR_RO(device_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static DEVICE_ATTR_RO(fuse_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static DEVICE_ATTR_WO(hard_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) static DEVICE_ATTR_RO(hard_reset_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static DEVICE_ATTR_RO(infineon_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static DEVICE_ATTR_RW(max_power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static DEVICE_ATTR_RO(pci_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static DEVICE_ATTR_RO(preboot_btl_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) static DEVICE_ATTR_WO(soft_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) static DEVICE_ATTR_RO(soft_reset_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static DEVICE_ATTR_RO(status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static DEVICE_ATTR_RO(thermal_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) static DEVICE_ATTR_RO(uboot_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static struct bin_attribute bin_attr_eeprom = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .attr = {.name = "eeprom", .mode = (0444)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .size = PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .read = eeprom_read_handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static struct attribute *hl_dev_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) &dev_attr_armcp_kernel_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) &dev_attr_armcp_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) &dev_attr_cpld_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) &dev_attr_cpucp_kernel_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) &dev_attr_cpucp_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) &dev_attr_device_type.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) &dev_attr_fuse_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) &dev_attr_hard_reset.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) &dev_attr_hard_reset_cnt.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) &dev_attr_infineon_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) &dev_attr_max_power.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) &dev_attr_pci_addr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) &dev_attr_preboot_btl_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) &dev_attr_soft_reset.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) &dev_attr_soft_reset_cnt.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) &dev_attr_status.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) &dev_attr_thermal_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) &dev_attr_uboot_ver.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static struct bin_attribute *hl_dev_bin_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) &bin_attr_eeprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static struct attribute_group hl_dev_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .attrs = hl_dev_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .bin_attrs = hl_dev_bin_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static struct attribute_group hl_dev_clks_attr_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static const struct attribute_group *hl_dev_attr_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) &hl_dev_attr_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) &hl_dev_clks_attr_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) int hl_sysfs_init(struct hl_device *hdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (hdev->asic_type == ASIC_GOYA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) hdev->pm_mng_profile = PM_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) hdev->pm_mng_profile = PM_MANUAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) hdev->max_power = hdev->asic_prop.max_power_default;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) hdev->asic_funcs->add_device_attr(hdev, &hl_dev_clks_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) rc = device_add_groups(hdev->dev, hl_dev_attr_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) dev_err(hdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) "Failed to add groups to device, error %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) void hl_sysfs_fini(struct hl_device *hdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) device_remove_groups(hdev->dev, hl_dev_attr_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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