^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2004 - 2006 rt2x00 SourceForge Project
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * <http://rt2x00.serialmonkey.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Module: eeprom_93cx6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Abstract: EEPROM reader routines for 93cx6 chipsets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Supported chipsets: 93c46 & 93c66.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/eeprom_93cx6.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MODULE_AUTHOR("http://rt2x00.serialmonkey.com");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) MODULE_VERSION("1.0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MODULE_DESCRIPTION("EEPROM 93cx6 chip driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static inline void eeprom_93cx6_pulse_high(struct eeprom_93cx6 *eeprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) eeprom->reg_data_clock = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) eeprom->register_write(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Add a short delay for the pulse to work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * According to the specifications the "maximum minimum"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * time should be 450ns.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ndelay(450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static inline void eeprom_93cx6_pulse_low(struct eeprom_93cx6 *eeprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) eeprom->reg_data_clock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) eeprom->register_write(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * Add a short delay for the pulse to work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * According to the specifications the "maximum minimum"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * time should be 450ns.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ndelay(450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static void eeprom_93cx6_startup(struct eeprom_93cx6 *eeprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * Clear all flags, and enable chip select.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) eeprom->register_read(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) eeprom->reg_data_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) eeprom->reg_data_out = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) eeprom->reg_data_clock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) eeprom->reg_chip_select = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) eeprom->drive_data = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) eeprom->register_write(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * kick a pulse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) eeprom_93cx6_pulse_high(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) eeprom_93cx6_pulse_low(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static void eeprom_93cx6_cleanup(struct eeprom_93cx6 *eeprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Clear chip_select and data_in flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) eeprom->register_read(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) eeprom->reg_data_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) eeprom->reg_chip_select = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) eeprom->register_write(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * kick a pulse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) eeprom_93cx6_pulse_high(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) eeprom_93cx6_pulse_low(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static void eeprom_93cx6_write_bits(struct eeprom_93cx6 *eeprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) const u16 data, const u16 count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) eeprom->register_read(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * Clear data flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) eeprom->reg_data_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) eeprom->reg_data_out = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) eeprom->drive_data = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * Start writing all bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) for (i = count; i > 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * Check if this bit needs to be set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) eeprom->reg_data_in = !!(data & (1 << (i - 1)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * Write the bit to the eeprom register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) eeprom->register_write(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * Kick a pulse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) eeprom_93cx6_pulse_high(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) eeprom_93cx6_pulse_low(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) eeprom->reg_data_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) eeprom->register_write(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static void eeprom_93cx6_read_bits(struct eeprom_93cx6 *eeprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u16 *data, const u16 count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) u16 buf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) eeprom->register_read(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * Clear data flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) eeprom->reg_data_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) eeprom->reg_data_out = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) eeprom->drive_data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * Start reading all bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) for (i = count; i > 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) eeprom_93cx6_pulse_high(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) eeprom->register_read(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * Clear data_in flag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) eeprom->reg_data_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * Read if the bit has been set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (eeprom->reg_data_out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) buf |= (1 << (i - 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) eeprom_93cx6_pulse_low(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) *data = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * eeprom_93cx6_read - Read a word from eeprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * @eeprom: Pointer to eeprom structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * @word: Word index from where we should start reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * @data: target pointer where the information will have to be stored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * This function will read the eeprom data as host-endian word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * into the given data pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom, const u8 word,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) u16 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) u16 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * Initialize the eeprom register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) eeprom_93cx6_startup(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * Select the read opcode and the word to be read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) command = (PCI_EEPROM_READ_OPCODE << eeprom->width) | word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) eeprom_93cx6_write_bits(eeprom, command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * Read the requested 16 bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) eeprom_93cx6_read_bits(eeprom, data, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * Cleanup eeprom register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) eeprom_93cx6_cleanup(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) EXPORT_SYMBOL_GPL(eeprom_93cx6_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * eeprom_93cx6_multiread - Read multiple words from eeprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * @eeprom: Pointer to eeprom structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * @word: Word index from where we should start reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * @data: target pointer where the information will have to be stored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * @words: Number of words that should be read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * This function will read all requested words from the eeprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * this is done by calling eeprom_93cx6_read() multiple times.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * But with the additional change that while the eeprom_93cx6_read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * will return host ordered bytes, this method will return little
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * endian words.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) void eeprom_93cx6_multiread(struct eeprom_93cx6 *eeprom, const u8 word,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) __le16 *data, const u16 words)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) u16 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) for (i = 0; i < words; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) eeprom_93cx6_read(eeprom, word + i, &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) data[i] = cpu_to_le16(tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) EXPORT_SYMBOL_GPL(eeprom_93cx6_multiread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * eeprom_93cx6_readb - Read a byte from eeprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * @eeprom: Pointer to eeprom structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * @byte: Byte index from where we should start reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * @data: target pointer where the information will have to be stored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * This function will read a byte of the eeprom data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * into the given data pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) void eeprom_93cx6_readb(struct eeprom_93cx6 *eeprom, const u8 byte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) u16 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) u16 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) * Initialize the eeprom register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) eeprom_93cx6_startup(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * Select the read opcode and the byte to be read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) command = (PCI_EEPROM_READ_OPCODE << (eeprom->width + 1)) | byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) eeprom_93cx6_write_bits(eeprom, command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) PCI_EEPROM_WIDTH_OPCODE + eeprom->width + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * Read the requested 8 bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) eeprom_93cx6_read_bits(eeprom, &tmp, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) *data = tmp & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * Cleanup eeprom register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) eeprom_93cx6_cleanup(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) EXPORT_SYMBOL_GPL(eeprom_93cx6_readb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * eeprom_93cx6_multireadb - Read multiple bytes from eeprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * @eeprom: Pointer to eeprom structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * @byte: Index from where we should start reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * @data: target pointer where the information will have to be stored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * @bytes: Number of bytes that should be read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * This function will read all requested bytes from the eeprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * this is done by calling eeprom_93cx6_readb() multiple times.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) void eeprom_93cx6_multireadb(struct eeprom_93cx6 *eeprom, const u8 byte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) u8 *data, const u16 bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) for (i = 0; i < bytes; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) eeprom_93cx6_readb(eeprom, byte + i, &data[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) EXPORT_SYMBOL_GPL(eeprom_93cx6_multireadb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * eeprom_93cx6_wren - set the write enable state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * @eeprom: Pointer to eeprom structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * @enable: true to enable writes, otherwise disable writes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * Set the EEPROM write enable state to either allow or deny
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * writes depending on the @enable value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) u16 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /* start the command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) eeprom_93cx6_startup(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /* create command to enable/disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) command = enable ? PCI_EEPROM_EWEN_OPCODE : PCI_EEPROM_EWDS_OPCODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) command <<= (eeprom->width - 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) eeprom_93cx6_write_bits(eeprom, command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) eeprom_93cx6_cleanup(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) EXPORT_SYMBOL_GPL(eeprom_93cx6_wren);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * eeprom_93cx6_write - write data to the EEPROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * @eeprom: Pointer to eeprom structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * @addr: Address to write data to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * @data: The data to write to address @addr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * Write the @data to the specified @addr in the EEPROM and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * waiting for the device to finish writing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) * Note, since we do not expect large number of write operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) * we delay in between parts of the operation to avoid using excessive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * amounts of CPU time busy waiting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom, u8 addr, u16 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) int timeout = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) u16 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* start the command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) eeprom_93cx6_startup(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) command = PCI_EEPROM_WRITE_OPCODE << eeprom->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) command |= addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* send write command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) eeprom_93cx6_write_bits(eeprom, command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* send data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) eeprom_93cx6_write_bits(eeprom, data, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) /* get ready to check for busy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) eeprom->drive_data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) eeprom->reg_chip_select = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) eeprom->register_write(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /* wait at-least 250ns to get DO to be the busy signal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /* wait for DO to go high to signify finish */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) while (true) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) eeprom->register_read(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (eeprom->reg_data_out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (--timeout <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) printk(KERN_ERR "%s: timeout\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) eeprom_93cx6_cleanup(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) EXPORT_SYMBOL_GPL(eeprom_93cx6_write);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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