^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * cb710/debug.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright by Michał Mirosław, 2008-2009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/cb710.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define CB710_REG_COUNT 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static const u16 allow[CB710_REG_COUNT/16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 0xFFF0, 0xFFFF, 0xFFFF, 0xFFFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 0xFFF0, 0xFFFF, 0xFFFF, 0xFFFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static const char *const prefix[ARRAY_SIZE(allow)] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) "MMC", "MMC", "MMC", "MMC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) "MS?", "MS?", "SM?", "SM?"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static inline int allow_reg_read(unsigned block, unsigned offset, unsigned bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned mask = (1 << bits/8) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) offset *= bits/8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) return ((allow[block] >> offset) & mask) == mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define CB710_READ_REGS_TEMPLATE(t) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static void cb710_read_regs_##t(void __iomem *iobase, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u##t *reg, unsigned select) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned i, j; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) for (i = 0; i < ARRAY_SIZE(allow); ++i, reg += 16/(t/8)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) if (!(select & (1 << i))) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) continue; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) for (j = 0; j < 0x10/(t/8); ++j) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (!allow_reg_read(i, j, t)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) continue; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) reg[j] = ioread##t(iobase \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) + (i << 4) + (j * (t/8))); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static const char cb710_regf_8[] = "%02X";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static const char cb710_regf_16[] = "%04X";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static const char cb710_regf_32[] = "%08X";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static const char cb710_xes[] = "xxxxxxxx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define CB710_DUMP_REGS_TEMPLATE(t) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static void cb710_dump_regs_##t(struct device *dev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) const u##t *reg, unsigned select) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) const char *const xp = &cb710_xes[8 - t/4]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) const char *const format = cb710_regf_##t; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) char msg[100], *p; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned i, j; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) for (i = 0; i < ARRAY_SIZE(allow); ++i, reg += 16/(t/8)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (!(select & (1 << i))) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) continue; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) p = msg; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) for (j = 0; j < 0x10/(t/8); ++j) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) *p++ = ' '; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (j == 8/(t/8)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) *p++ = ' '; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (allow_reg_read(i, j, t)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) p += sprintf(p, format, reg[j]); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) p += sprintf(p, "%s", xp); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) dev_dbg(dev, "%s 0x%02X %s\n", prefix[i], i << 4, msg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define CB710_READ_AND_DUMP_REGS_TEMPLATE(t) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static void cb710_read_and_dump_regs_##t(struct cb710_chip *chip, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned select) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u##t regs[CB710_REG_COUNT/sizeof(u##t)]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) memset(®s, 0, sizeof(regs)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) cb710_read_regs_##t(chip->iobase, regs, select); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) cb710_dump_regs_##t(cb710_chip_dev(chip), regs, select); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define CB710_REG_ACCESS_TEMPLATES(t) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) CB710_READ_REGS_TEMPLATE(t) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) CB710_DUMP_REGS_TEMPLATE(t) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) CB710_READ_AND_DUMP_REGS_TEMPLATE(t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) CB710_REG_ACCESS_TEMPLATES(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) CB710_REG_ACCESS_TEMPLATES(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) CB710_REG_ACCESS_TEMPLATES(32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) void cb710_dump_regs(struct cb710_chip *chip, unsigned select)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (!(select & CB710_DUMP_REGS_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) select = CB710_DUMP_REGS_ALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (!(select & CB710_DUMP_ACCESS_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) select |= CB710_DUMP_ACCESS_8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (select & CB710_DUMP_ACCESS_32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) cb710_read_and_dump_regs_32(chip, select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (select & CB710_DUMP_ACCESS_16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) cb710_read_and_dump_regs_16(chip, select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (select & CB710_DUMP_ACCESS_8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) cb710_read_and_dump_regs_8(chip, select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) EXPORT_SYMBOL_GPL(cb710_dump_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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