^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* Driver for Realtek USB card reader
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Roger Tseng <rogerable@realtek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/rtsx_usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static int polling_pipe = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) module_param(polling_pipe, int, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MODULE_PARM_DESC(polling_pipe, "polling pipe (0: ctl, 1: bulk)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static const struct mfd_cell rtsx_usb_cells[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) [RTSX_USB_SD_CARD] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .name = "rtsx_usb_sdmmc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .pdata_size = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) [RTSX_USB_MS_CARD] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .name = "rtsx_usb_ms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .pdata_size = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static void rtsx_usb_sg_timed_out(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct rtsx_ucr *ucr = from_timer(ucr, t, sg_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) dev_dbg(&ucr->pusb_intf->dev, "%s: sg transfer timed out", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) usb_sg_cancel(&ucr->current_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static int rtsx_usb_bulk_transfer_sglist(struct rtsx_ucr *ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) unsigned int pipe, struct scatterlist *sg, int num_sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) unsigned int length, unsigned int *act_len, int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) dev_dbg(&ucr->pusb_intf->dev, "%s: xfer %u bytes, %d entries\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) __func__, length, num_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ret = usb_sg_init(&ucr->current_sg, ucr->pusb_dev, pipe, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) sg, num_sg, length, GFP_NOIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ucr->sg_timer.expires = jiffies + msecs_to_jiffies(timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) add_timer(&ucr->sg_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) usb_sg_wait(&ucr->current_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (!del_timer_sync(&ucr->sg_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ret = -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ret = ucr->current_sg.status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (act_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) *act_len = ucr->current_sg.bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int rtsx_usb_transfer_data(struct rtsx_ucr *ucr, unsigned int pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) void *buf, unsigned int len, int num_sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) unsigned int *act_len, int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (timeout < 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) timeout = 600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (num_sg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return rtsx_usb_bulk_transfer_sglist(ucr, pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) (struct scatterlist *)buf, num_sg, len, act_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return usb_bulk_msg(ucr->pusb_dev, pipe, buf, len, act_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) EXPORT_SYMBOL_GPL(rtsx_usb_transfer_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static inline void rtsx_usb_seq_cmd_hdr(struct rtsx_ucr *ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u16 addr, u16 len, u8 seq_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) rtsx_usb_cmd_hdr_tag(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ucr->cmd_buf[PACKET_TYPE] = seq_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ucr->cmd_buf[5] = (u8)(len >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ucr->cmd_buf[6] = (u8)len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ucr->cmd_buf[8] = (u8)(addr >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ucr->cmd_buf[9] = (u8)addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (seq_type == SEQ_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ucr->cmd_buf[STAGE_FLAG] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ucr->cmd_buf[STAGE_FLAG] = STAGE_R;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int rtsx_usb_seq_write_register(struct rtsx_ucr *ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u16 addr, u16 len, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u16 cmd_len = ALIGN(SEQ_WRITE_DATA_OFFSET + len, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (cmd_len > IOBUF_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) rtsx_usb_seq_cmd_hdr(ucr, addr, len, SEQ_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) memcpy(ucr->cmd_buf + SEQ_WRITE_DATA_OFFSET, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return rtsx_usb_transfer_data(ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ucr->cmd_buf, cmd_len, 0, NULL, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int rtsx_usb_seq_read_register(struct rtsx_ucr *ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u16 addr, u16 len, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u16 rsp_len = round_down(len, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u16 res_len = len - rsp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* 4-byte aligned part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (rsp_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) rtsx_usb_seq_cmd_hdr(ucr, addr, len, SEQ_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ret = rtsx_usb_transfer_data(ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ucr->cmd_buf, 12, 0, NULL, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ret = rtsx_usb_transfer_data(ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) data, rsp_len, 0, NULL, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* unaligned part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) for (i = 0; i < res_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ret = rtsx_usb_read_register(ucr, addr + rsp_len + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) data + rsp_len + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) int rtsx_usb_read_ppbuf(struct rtsx_ucr *ucr, u8 *buf, int buf_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return rtsx_usb_seq_read_register(ucr, PPBUF_BASE2, (u16)buf_len, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) EXPORT_SYMBOL_GPL(rtsx_usb_read_ppbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int rtsx_usb_write_ppbuf(struct rtsx_ucr *ucr, u8 *buf, int buf_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return rtsx_usb_seq_write_register(ucr, PPBUF_BASE2, (u16)buf_len, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) EXPORT_SYMBOL_GPL(rtsx_usb_write_ppbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int rtsx_usb_ep0_write_register(struct rtsx_ucr *ucr, u16 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) u8 mask, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) u16 value, index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) addr |= EP0_WRITE_REG_CMD << EP0_OP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) value = swab16(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) index = mask | data << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return usb_control_msg(ucr->pusb_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) usb_sndctrlpipe(ucr->pusb_dev, 0), RTSX_USB_REQ_REG_OP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) value, index, NULL, 0, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) EXPORT_SYMBOL_GPL(rtsx_usb_ep0_write_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int rtsx_usb_ep0_read_register(struct rtsx_ucr *ucr, u16 addr, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) u16 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) buf = kzalloc(sizeof(u8), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) addr |= EP0_READ_REG_CMD << EP0_OP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) value = swab16(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) ret = usb_control_msg(ucr->pusb_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) usb_rcvctrlpipe(ucr->pusb_dev, 0), RTSX_USB_REQ_REG_OP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) value, 0, buf, 1, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) *data = *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) EXPORT_SYMBOL_GPL(rtsx_usb_ep0_read_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) void rtsx_usb_add_cmd(struct rtsx_ucr *ucr, u8 cmd_type, u16 reg_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) u8 mask, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (ucr->cmd_idx < (IOBUF_SIZE - CMD_OFFSET) / 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) i = CMD_OFFSET + ucr->cmd_idx * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ucr->cmd_buf[i++] = ((cmd_type & 0x03) << 6) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) (u8)((reg_addr >> 8) & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ucr->cmd_buf[i++] = (u8)reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ucr->cmd_buf[i++] = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ucr->cmd_buf[i++] = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ucr->cmd_idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) EXPORT_SYMBOL_GPL(rtsx_usb_add_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) int rtsx_usb_send_cmd(struct rtsx_ucr *ucr, u8 flag, int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ucr->cmd_buf[CNT_H] = (u8)(ucr->cmd_idx >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) ucr->cmd_buf[CNT_L] = (u8)(ucr->cmd_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ucr->cmd_buf[STAGE_FLAG] = flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ret = rtsx_usb_transfer_data(ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ucr->cmd_buf, ucr->cmd_idx * 4 + CMD_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 0, NULL, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) rtsx_usb_clear_fsm_err(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) EXPORT_SYMBOL_GPL(rtsx_usb_send_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) int rtsx_usb_get_rsp(struct rtsx_ucr *ucr, int rsp_len, int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (rsp_len <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) rsp_len = ALIGN(rsp_len, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return rtsx_usb_transfer_data(ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ucr->rsp_buf, rsp_len, 0, NULL, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) EXPORT_SYMBOL_GPL(rtsx_usb_get_rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int rtsx_usb_get_status_with_bulk(struct rtsx_ucr *ucr, u16 *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) rtsx_usb_init_cmd(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) rtsx_usb_add_cmd(ucr, READ_REG_CMD, CARD_EXIST, 0x00, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) rtsx_usb_add_cmd(ucr, READ_REG_CMD, OCPSTAT, 0x00, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ret = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ret = rtsx_usb_get_rsp(ucr, 2, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) *status = ((ucr->rsp_buf[0] >> 2) & 0x0f) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ((ucr->rsp_buf[1] & 0x03) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) int rtsx_usb_get_card_status(struct rtsx_ucr *ucr, u16 *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) u16 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (!status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (polling_pipe == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) buf = kzalloc(sizeof(u16), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ret = usb_control_msg(ucr->pusb_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) usb_rcvctrlpipe(ucr->pusb_dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) RTSX_USB_REQ_POLL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 0, 0, buf, 2, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) *status = *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) ret = rtsx_usb_get_status_with_bulk(ucr, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) /* usb_control_msg may return positive when success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) EXPORT_SYMBOL_GPL(rtsx_usb_get_card_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int rtsx_usb_write_phy_register(struct rtsx_ucr *ucr, u8 addr, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) dev_dbg(&ucr->pusb_intf->dev, "Write 0x%x to phy register 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) val, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) rtsx_usb_init_cmd(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VSTAIN, 0xFF, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VCONTROL, 0xFF, addr & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VCONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 0xFF, (addr >> 4) & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, HS_VLOADM, 0xFF, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return rtsx_usb_send_cmd(ucr, MODE_C, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) int rtsx_usb_write_register(struct rtsx_ucr *ucr, u16 addr, u8 mask, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) rtsx_usb_init_cmd(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, addr, mask, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return rtsx_usb_send_cmd(ucr, MODE_C, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) EXPORT_SYMBOL_GPL(rtsx_usb_write_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int rtsx_usb_read_register(struct rtsx_ucr *ucr, u16 addr, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (data != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) *data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) rtsx_usb_init_cmd(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) rtsx_usb_add_cmd(ucr, READ_REG_CMD, addr, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ret = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) ret = rtsx_usb_get_rsp(ucr, 1, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (data != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) *data = ucr->rsp_buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) EXPORT_SYMBOL_GPL(rtsx_usb_read_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static inline u8 double_ssc_depth(u8 depth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return (depth > 1) ? (depth - 1) : depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static u8 revise_ssc_depth(u8 ssc_depth, u8 div)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (div > CLK_DIV_1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (ssc_depth > div - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ssc_depth -= (div - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ssc_depth = SSC_DEPTH_2M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return ssc_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) int rtsx_usb_switch_clock(struct rtsx_ucr *ucr, unsigned int card_clock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) u8 ssc_depth, bool initial_mode, bool double_clk, bool vpclk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) u8 n, clk_divider, mcu_cnt, div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (!card_clock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) ucr->cur_clk = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (initial_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) /* We use 250k(around) here, in initial stage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) clk_divider = SD_CLK_DIVIDE_128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) card_clock = 30000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) clk_divider = SD_CLK_DIVIDE_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) ret = rtsx_usb_write_register(ucr, SD_CFG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) SD_CLK_DIVIDE_MASK, clk_divider);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) card_clock /= 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) dev_dbg(&ucr->pusb_intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) "Switch card clock to %dMHz\n", card_clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (!initial_mode && double_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) card_clock *= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) dev_dbg(&ucr->pusb_intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) "Internal SSC clock: %dMHz (cur_clk = %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) card_clock, ucr->cur_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) if (card_clock == ucr->cur_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) /* Converting clock value into internal settings: n and div */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) n = card_clock - 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if ((card_clock <= 2) || (n > MAX_DIV_N))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) mcu_cnt = 60/card_clock + 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (mcu_cnt > 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) mcu_cnt = 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /* Make sure that the SSC clock div_n is not less than MIN_DIV_N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) div = CLK_DIV_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) while (n < MIN_DIV_N && div < CLK_DIV_4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) n = (n + 2) * 2 - 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) div++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) dev_dbg(&ucr->pusb_intf->dev, "n = %d, div = %d\n", n, div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (double_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) ssc_depth = double_ssc_depth(ssc_depth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) ssc_depth = revise_ssc_depth(ssc_depth, div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) dev_dbg(&ucr->pusb_intf->dev, "ssc_depth = %d\n", ssc_depth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) rtsx_usb_init_cmd(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 0x3F, (div << 4) | mcu_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SSC_CTL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) SSC_DEPTH_MASK, ssc_depth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (vpclk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) PHASE_NOT_RESET, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) PHASE_NOT_RESET, PHASE_NOT_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) ret = rtsx_usb_send_cmd(ucr, MODE_C, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) ret = rtsx_usb_write_register(ucr, SSC_CTL1, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) SSC_RSTB | SSC_8X_EN | SSC_SEL_4M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /* Wait SSC clock stable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) usleep_range(100, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) ret = rtsx_usb_write_register(ucr, CLK_DIV, CLK_CHANGE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) ucr->cur_clk = card_clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) EXPORT_SYMBOL_GPL(rtsx_usb_switch_clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) int rtsx_usb_card_exclusive_check(struct rtsx_ucr *ucr, int card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) u16 cd_mask[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) [RTSX_USB_SD_CARD] = (CD_MASK & ~SD_CD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) [RTSX_USB_MS_CARD] = (CD_MASK & ~MS_CD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) ret = rtsx_usb_get_card_status(ucr, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) * If get status fails, return 0 (ok) for the exclusive check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) * and let the flow fail at somewhere else.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (val & cd_mask[card])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) EXPORT_SYMBOL_GPL(rtsx_usb_card_exclusive_check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static int rtsx_usb_reset_chip(struct rtsx_ucr *ucr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) rtsx_usb_init_cmd(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (CHECK_PKG(ucr, LQFP48)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) LDO3318_PWR_MASK, LDO_SUSPEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) FORCE_LDO_POWERB, FORCE_LDO_POWERB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 0x30, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 0x03, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 0x0C, 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SYS_DUMMY0, NYET_MSAK, NYET_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CD_DEGLITCH_WIDTH, 0xFF, 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) CD_DEGLITCH_EN, XD_CD_DEGLITCH_EN, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD30_DRIVE_SEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) SD30_DRIVE_MASK, DRIVER_TYPE_D);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) CARD_DRIVE_SEL, SD20_DRIVE_MASK, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG, 0xE0, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (ucr->is_rts5179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) CARD_PULL_CTL5, 0x03, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DMA1_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) EXTEND_DMA1_ASYNC_SIGNAL, EXTEND_DMA1_ASYNC_SIGNAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_INT_PEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) XD_INT | MS_INT | SD_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) XD_INT | MS_INT | SD_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) ret = rtsx_usb_send_cmd(ucr, MODE_C, 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) /* config non-crystal mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) rtsx_usb_read_register(ucr, CFG_MODE, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if ((val & XTAL_FREE) || ((val & CLK_MODE_MASK) == CLK_MODE_NON_XTAL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) ret = rtsx_usb_write_phy_register(ucr, 0xC2, 0x7C);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) static int rtsx_usb_init_chip(struct rtsx_ucr *ucr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) rtsx_usb_clear_fsm_err(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) /* power on SSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) ret = rtsx_usb_write_register(ucr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) FPDCTL, SSC_POWER_MASK, SSC_POWER_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) usleep_range(100, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) ret = rtsx_usb_write_register(ucr, CLK_DIV, CLK_CHANGE, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /* determine IC version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) ret = rtsx_usb_read_register(ucr, HW_VERSION, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ucr->ic_version = val & HW_VER_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) /* determine package */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) ret = rtsx_usb_read_register(ucr, CARD_SHARE_MODE, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (val & CARD_SHARE_LQFP_SEL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) ucr->package = LQFP48;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) dev_dbg(&ucr->pusb_intf->dev, "Package: LQFP48\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) ucr->package = QFN24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) dev_dbg(&ucr->pusb_intf->dev, "Package: QFN24\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) /* determine IC variations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) rtsx_usb_read_register(ucr, CFG_MODE_1, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (val & RTS5179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) ucr->is_rts5179 = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) dev_dbg(&ucr->pusb_intf->dev, "Device is rts5179\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ucr->is_rts5179 = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return rtsx_usb_reset_chip(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static int rtsx_usb_probe(struct usb_interface *intf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct usb_device *usb_dev = interface_to_usbdev(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct rtsx_ucr *ucr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) dev_dbg(&intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) ": Realtek USB Card Reader found at bus %03d address %03d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) usb_dev->bus->busnum, usb_dev->devnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) ucr = devm_kzalloc(&intf->dev, sizeof(*ucr), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (!ucr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) ucr->pusb_dev = usb_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) ucr->iobuf = usb_alloc_coherent(ucr->pusb_dev, IOBUF_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) GFP_KERNEL, &ucr->iobuf_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (!ucr->iobuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) usb_set_intfdata(intf, ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) ucr->vendor_id = id->idVendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) ucr->product_id = id->idProduct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) ucr->cmd_buf = ucr->rsp_buf = ucr->iobuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) mutex_init(&ucr->dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) ucr->pusb_intf = intf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) /* initialize */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) ret = rtsx_usb_init_chip(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) goto out_init_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) /* initialize USB SG transfer timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) timer_setup(&ucr->sg_timer, rtsx_usb_sg_timed_out, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) ret = mfd_add_hotplug_devices(&intf->dev, rtsx_usb_cells,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) ARRAY_SIZE(rtsx_usb_cells));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) goto out_init_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) intf->needs_remote_wakeup = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) usb_enable_autosuspend(usb_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) out_init_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) usb_free_coherent(ucr->pusb_dev, IOBUF_SIZE, ucr->iobuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) ucr->iobuf_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static void rtsx_usb_disconnect(struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) struct rtsx_ucr *ucr = (struct rtsx_ucr *)usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) dev_dbg(&intf->dev, "%s called\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) mfd_remove_devices(&intf->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) usb_set_intfdata(ucr->pusb_intf, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) usb_free_coherent(ucr->pusb_dev, IOBUF_SIZE, ucr->iobuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) ucr->iobuf_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) static int rtsx_usb_suspend(struct usb_interface *intf, pm_message_t message)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) struct rtsx_ucr *ucr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) (struct rtsx_ucr *)usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) u16 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) dev_dbg(&intf->dev, "%s called with pm message 0x%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) __func__, message.event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (PMSG_IS_AUTO(message)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) if (mutex_trylock(&ucr->dev_mutex)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) rtsx_usb_get_card_status(ucr, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) mutex_unlock(&ucr->dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) /* Defer the autosuspend if card exists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (val & (SD_CD | MS_CD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) /* There is an ongoing operation*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) static int rtsx_usb_resume_child(struct device *dev, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) pm_request_resume(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) static int rtsx_usb_resume(struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) device_for_each_child(&intf->dev, NULL, rtsx_usb_resume_child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static int rtsx_usb_reset_resume(struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) struct rtsx_ucr *ucr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) (struct rtsx_ucr *)usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) rtsx_usb_reset_chip(ucr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) device_for_each_child(&intf->dev, NULL, rtsx_usb_resume_child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) #else /* CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) #define rtsx_usb_suspend NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) #define rtsx_usb_resume NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) #define rtsx_usb_reset_resume NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) #endif /* CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) static int rtsx_usb_pre_reset(struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) struct rtsx_ucr *ucr = (struct rtsx_ucr *)usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) mutex_lock(&ucr->dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) static int rtsx_usb_post_reset(struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) struct rtsx_ucr *ucr = (struct rtsx_ucr *)usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) mutex_unlock(&ucr->dev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) static const struct usb_device_id rtsx_usb_usb_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) { USB_DEVICE(0x0BDA, 0x0129) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) { USB_DEVICE(0x0BDA, 0x0139) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) { USB_DEVICE(0x0BDA, 0x0140) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) MODULE_DEVICE_TABLE(usb, rtsx_usb_usb_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) static struct usb_driver rtsx_usb_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) .name = "rtsx_usb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) .probe = rtsx_usb_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .disconnect = rtsx_usb_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) .suspend = rtsx_usb_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) .resume = rtsx_usb_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) .reset_resume = rtsx_usb_reset_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) .pre_reset = rtsx_usb_pre_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) .post_reset = rtsx_usb_post_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) .id_table = rtsx_usb_usb_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .supports_autosuspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .soft_unbind = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) module_usb_driver(rtsx_usb_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) MODULE_DESCRIPTION("Realtek USB Card Reader Driver");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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