Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <soc/at91/atmel_tcb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * This is a thin library to solve the problem of how to portably allocate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * one of the TC blocks.  For simplicity, it doesn't currently expect to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * share individual timers between different drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #if defined(CONFIG_AVR32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /* AVR32 has these divide PBB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) const u8 atmel_tc_divisors[5] = { 0, 4, 8, 16, 32, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) EXPORT_SYMBOL(atmel_tc_divisors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #elif defined(CONFIG_ARCH_AT91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) /* AT91 has these divide MCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) const u8 atmel_tc_divisors[5] = { 2, 8, 32, 128, 0, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) EXPORT_SYMBOL(atmel_tc_divisors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) static DEFINE_SPINLOCK(tc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static LIST_HEAD(tc_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * atmel_tc_alloc - allocate a specified TC block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * @block: which block to allocate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * Caller allocates a block.  If it is available, a pointer to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * pre-initialized struct atmel_tc is returned. The caller can access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * the registers directly through the "regs" field.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) struct atmel_tc *atmel_tc_alloc(unsigned block)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct atmel_tc		*tc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct platform_device	*pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	spin_lock(&tc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	list_for_each_entry(tc, &tc_list, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		if (tc->allocated)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		if ((tc->pdev->dev.of_node && tc->id == block) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		    (tc->pdev->id == block)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 			pdev = tc->pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			tc->allocated = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	spin_unlock(&tc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	return pdev ? tc : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) EXPORT_SYMBOL_GPL(atmel_tc_alloc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)  * atmel_tc_free - release a specified TC block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * @tc: Timer/counter block that was returned by atmel_tc_alloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  * This reverses the effect of atmel_tc_alloc(), invalidating the resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)  * returned by that routine and making the TC available to other drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) void atmel_tc_free(struct atmel_tc *tc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	spin_lock(&tc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	if (tc->allocated)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		tc->allocated = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	spin_unlock(&tc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) EXPORT_SYMBOL_GPL(atmel_tc_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #if defined(CONFIG_OF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static struct atmel_tcb_config tcb_rm9200_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	.counter_width = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static struct atmel_tcb_config tcb_sam9x5_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	.counter_width = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) static const struct of_device_id atmel_tcb_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		.compatible = "atmel,at91rm9200-tcb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		.data = &tcb_rm9200_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		.compatible = "atmel,at91sam9x5-tcb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		.data = &tcb_sam9x5_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		/* sentinel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MODULE_DEVICE_TABLE(of, atmel_tcb_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int __init tc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct atmel_tc *tc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	struct clk	*clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	int		irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	unsigned int	i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (of_get_child_count(pdev->dev.of_node))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	tc = devm_kzalloc(&pdev->dev, sizeof(struct atmel_tc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	if (!tc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	tc->pdev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	clk = devm_clk_get(&pdev->dev, "t0_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	tc->slow_clk = devm_clk_get(&pdev->dev, "slow_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	if (IS_ERR(tc->slow_clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		return PTR_ERR(tc->slow_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	tc->regs = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (IS_ERR(tc->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		return PTR_ERR(tc->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	/* Now take SoC information if available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	if (pdev->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		match = of_match_node(atmel_tcb_dt_ids, pdev->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		if (match)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			tc->tcb_config = match->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		tc->id = of_alias_get_id(tc->pdev->dev.of_node, "tcb");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		tc->id = pdev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	tc->clk[0] = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	tc->clk[1] = devm_clk_get(&pdev->dev, "t1_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (IS_ERR(tc->clk[1]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		tc->clk[1] = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	tc->clk[2] = devm_clk_get(&pdev->dev, "t2_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (IS_ERR(tc->clk[2]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		tc->clk[2] = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	tc->irq[0] = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	tc->irq[1] = platform_get_irq(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (tc->irq[1] < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		tc->irq[1] = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	tc->irq[2] = platform_get_irq(pdev, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	if (tc->irq[2] < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		tc->irq[2] = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	for (i = 0; i < 3; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		writel(ATMEL_TC_ALL_IRQ, tc->regs + ATMEL_TC_REG(i, IDR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	spin_lock(&tc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	list_add_tail(&tc->node, &tc_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	spin_unlock(&tc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	platform_set_drvdata(pdev, tc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static void tc_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct atmel_tc *tc = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	for (i = 0; i < 3; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		writel(ATMEL_TC_ALL_IRQ, tc->regs + ATMEL_TC_REG(i, IDR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static struct platform_driver tc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		.name	= "atmel_tcb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		.of_match_table	= of_match_ptr(atmel_tcb_dt_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	.shutdown = tc_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int __init tc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	return platform_driver_probe(&tc_driver, tc_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) arch_initcall(tc_init);