^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for the Analog Devices digital potentiometers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Michael Hennerich, Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef _AD_DPOT_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define _AD_DPOT_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define DPOT_CONF(features, wipers, max_pos, uid) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) (((features) << 18) | (((wipers) & 0xFF) << 10) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) ((max_pos & 0xF) << 6) | (uid & 0x3F))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define DPOT_UID(conf) (conf & 0x3F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define DPOT_MAX_POS(conf) ((conf >> 6) & 0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define DPOT_WIPERS(conf) ((conf >> 10) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define DPOT_FEAT(conf) (conf >> 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define BRDAC0 (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define BRDAC1 (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define BRDAC2 (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BRDAC3 (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define BRDAC4 (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define BRDAC5 (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define MAX_RDACS 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define F_CMD_INC (1 << 0) /* Features INC/DEC ALL, 6dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define F_CMD_EEP (1 << 1) /* Features EEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define F_CMD_OTP (1 << 2) /* Features OTP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define F_CMD_TOL (1 << 3) /* RDACS feature Tolerance REG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define F_RDACS_RW (1 << 4) /* RDACS are Read/Write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define F_RDACS_WONLY (1 << 5) /* RDACS are Write only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define F_AD_APPDATA (1 << 6) /* RDAC Address append to data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define F_SPI_8BIT (1 << 7) /* All SPI XFERS are 8-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define F_SPI_16BIT (1 << 8) /* All SPI XFERS are 16-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define F_SPI_24BIT (1 << 9) /* All SPI XFERS are 24-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define F_RDACS_RW_TOL (F_RDACS_RW | F_CMD_EEP | F_CMD_TOL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define F_RDACS_RW_EEP (F_RDACS_RW | F_CMD_EEP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define F_SPI (F_SPI_8BIT | F_SPI_16BIT | F_SPI_24BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) enum dpot_devid {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) AD5258_ID = DPOT_CONF(F_RDACS_RW_TOL, BRDAC0, 6, 0), /* I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) AD5259_ID = DPOT_CONF(F_RDACS_RW_TOL, BRDAC0, 8, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) AD5251_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) BRDAC1 | BRDAC3, 6, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) AD5252_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) BRDAC1 | BRDAC3, 8, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) AD5253_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 6, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) AD5254_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 8, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) AD5255_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) BRDAC0 | BRDAC1 | BRDAC2, 9, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) AD5160_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) BRDAC0, 8, 7), /* SPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) AD5161_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) BRDAC0, 8, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) AD5162_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) BRDAC0 | BRDAC1, 8, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) AD5165_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) BRDAC0, 8, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) AD5200_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) BRDAC0, 8, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) AD5201_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) BRDAC0, 5, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) AD5203_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 6, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) AD5204_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 8, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) AD5206_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3 | BRDAC4 | BRDAC5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 8, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) AD5207_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) BRDAC0 | BRDAC1, 8, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) AD5231_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_24BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) BRDAC0, 10, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) AD5232_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) BRDAC0 | BRDAC1, 8, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) AD5233_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 6, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) AD5235_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_24BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) BRDAC0 | BRDAC1, 10, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) AD5260_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) BRDAC0, 8, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) AD5262_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) BRDAC0 | BRDAC1, 8, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) AD5263_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 8, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) AD5290_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) BRDAC0, 8, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) AD5291_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT | F_CMD_OTP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) BRDAC0, 8, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) AD5292_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT | F_CMD_OTP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) BRDAC0, 10, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) AD5293_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT, BRDAC0, 10, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) AD7376_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) BRDAC0, 7, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) AD8400_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) BRDAC0, 8, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) AD8402_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) BRDAC0 | BRDAC1, 8, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) AD8403_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) BRDAC0 | BRDAC1 | BRDAC2, 8, 31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ADN2850_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_24BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) BRDAC0 | BRDAC1, 10, 32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) AD5241_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 8, 33),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) AD5242_ID = DPOT_CONF(F_RDACS_RW, BRDAC0 | BRDAC1, 8, 34),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) AD5243_ID = DPOT_CONF(F_RDACS_RW, BRDAC0 | BRDAC1, 8, 35),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) AD5245_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 8, 36),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) AD5246_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 7, 37),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) AD5247_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 7, 38),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) AD5248_ID = DPOT_CONF(F_RDACS_RW, BRDAC0 | BRDAC1, 8, 39),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) AD5280_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 8, 40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) AD5282_ID = DPOT_CONF(F_RDACS_RW, BRDAC0 | BRDAC1, 8, 41),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ADN2860_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) BRDAC0 | BRDAC1 | BRDAC2, 9, 42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) AD5273_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 6, 43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) AD5171_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 6, 44),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) AD5170_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 8, 45),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) AD5172_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 46),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) AD5173_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 47),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) AD5270_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) BRDAC0, 10, 48),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) AD5271_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP | F_SPI_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) BRDAC0, 8, 49),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) AD5272_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 10, 50),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) AD5274_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 8, 51),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define DPOT_RDAC0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define DPOT_RDAC1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define DPOT_RDAC2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define DPOT_RDAC3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define DPOT_RDAC4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define DPOT_RDAC5 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define DPOT_RDAC_MASK 0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define DPOT_REG_TOL 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define DPOT_TOL_RDAC0 (DPOT_REG_TOL | DPOT_RDAC0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define DPOT_TOL_RDAC1 (DPOT_REG_TOL | DPOT_RDAC1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define DPOT_TOL_RDAC2 (DPOT_REG_TOL | DPOT_RDAC2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define DPOT_TOL_RDAC3 (DPOT_REG_TOL | DPOT_RDAC3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define DPOT_TOL_RDAC4 (DPOT_REG_TOL | DPOT_RDAC4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define DPOT_TOL_RDAC5 (DPOT_REG_TOL | DPOT_RDAC5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* RDAC-to-EEPROM Interface Commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define DPOT_ADDR_RDAC (0x0 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define DPOT_ADDR_EEPROM (0x1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define DPOT_ADDR_OTP (0x1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define DPOT_ADDR_CMD (0x1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define DPOT_ADDR_OTP_EN (0x1 << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define DPOT_DEC_ALL_6DB (DPOT_ADDR_CMD | (0x4 << 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define DPOT_INC_ALL_6DB (DPOT_ADDR_CMD | (0x9 << 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define DPOT_DEC_ALL (DPOT_ADDR_CMD | (0x6 << 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define DPOT_INC_ALL (DPOT_ADDR_CMD | (0xB << 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define DPOT_SPI_RDAC 0xB0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define DPOT_SPI_EEPROM 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define DPOT_SPI_READ_RDAC 0xA0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define DPOT_SPI_READ_EEPROM 0x90
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define DPOT_SPI_DEC_ALL_6DB 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define DPOT_SPI_INC_ALL_6DB 0xD0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define DPOT_SPI_DEC_ALL 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define DPOT_SPI_INC_ALL 0xF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* AD5291/2/3 use special commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define DPOT_AD5291_RDAC 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define DPOT_AD5291_READ_RDAC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define DPOT_AD5291_STORE_XTPM 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define DPOT_AD5291_CTRLREG 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define DPOT_AD5291_UNLOCK_CMD 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* AD5270/1/2/4 use special commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define DPOT_AD5270_1_2_4_RDAC 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define DPOT_AD5270_1_2_4_READ_RDAC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define DPOT_AD5270_1_2_4_STORE_XTPM 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define DPOT_AD5270_1_2_4_CTRLREG 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define DPOT_AD5270_1_2_4_UNLOCK_CMD 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define DPOT_AD5282_RDAC_AB 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define DPOT_AD5273_FUSE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define DPOT_AD5170_2_3_FUSE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define DPOT_AD5170_2_3_OW 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define DPOT_AD5172_3_A0 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define DPOT_AD5170_2FUSE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct dpot_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct ad_dpot_bus_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int (*read_d8)(void *client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) int (*read_r8d8)(void *client, u8 reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) int (*read_r8d16)(void *client, u8 reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) int (*write_d8)(void *client, u8 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int (*write_r8d8)(void *client, u8 reg, u8 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int (*write_r8d16)(void *client, u8 reg, u16 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct ad_dpot_bus_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) void *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) const struct ad_dpot_bus_ops *bops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) int ad_dpot_probe(struct device *dev, struct ad_dpot_bus_data *bdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) unsigned long devid, const char *name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int ad_dpot_remove(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #endif