^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * wm8350-core.c -- Device access for Wolfson WM8350
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2007, 2008 Wolfson Microelectronics PLC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Liam Girdwood
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mfd/wm8350/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/wm8350/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mfd/wm8350/pmic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static int gpio_set_dir(struct wm8350 *wm8350, int gpio, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) wm8350_reg_unlock(wm8350);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) if (dir == WM8350_GPIO_DIR_OUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) ret = wm8350_clear_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) WM8350_GPIO_CONFIGURATION_I_O,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) ret = wm8350_set_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) WM8350_GPIO_CONFIGURATION_I_O,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) wm8350_reg_lock(wm8350);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static int wm8350_gpio_set_debounce(struct wm8350 *wm8350, int gpio, int db)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (db == WM8350_GPIO_DEBOUNCE_ON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return wm8350_set_bits(wm8350, WM8350_GPIO_DEBOUNCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) return wm8350_clear_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) WM8350_GPIO_DEBOUNCE, 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int gpio_set_func(struct wm8350 *wm8350, int gpio, int func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u16 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) wm8350_reg_unlock(wm8350);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) switch (gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) & ~WM8350_GP0_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) reg | ((func & 0xf) << 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) & ~WM8350_GP1_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) reg | ((func & 0xf) << 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) & ~WM8350_GP2_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) reg | ((func & 0xf) << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) & ~WM8350_GP3_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) reg | ((func & 0xf) << 12));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) & ~WM8350_GP4_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) reg | ((func & 0xf) << 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) & ~WM8350_GP5_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) reg | ((func & 0xf) << 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) & ~WM8350_GP6_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) reg | ((func & 0xf) << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) & ~WM8350_GP7_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) reg | ((func & 0xf) << 12));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) & ~WM8350_GP8_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) reg | ((func & 0xf) << 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) case 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) & ~WM8350_GP9_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) reg | ((func & 0xf) << 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) case 10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) & ~WM8350_GP10_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) reg | ((func & 0xf) << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) case 11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) & ~WM8350_GP11_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) reg | ((func & 0xf) << 12));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) case 12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) & ~WM8350_GP12_FN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) reg | ((func & 0xf) << 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) wm8350_reg_lock(wm8350);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) wm8350_reg_lock(wm8350);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int gpio_set_pull_up(struct wm8350 *wm8350, int gpio, int up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return wm8350_set_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) WM8350_GPIO_PIN_PULL_UP_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return wm8350_clear_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) WM8350_GPIO_PIN_PULL_UP_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static int gpio_set_pull_down(struct wm8350 *wm8350, int gpio, int down)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (down)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return wm8350_set_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) WM8350_GPIO_PULL_DOWN_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return wm8350_clear_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) WM8350_GPIO_PULL_DOWN_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int gpio_set_polarity(struct wm8350 *wm8350, int gpio, int pol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (pol == WM8350_GPIO_ACTIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return wm8350_set_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) WM8350_GPIO_PIN_POLARITY_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return wm8350_clear_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) WM8350_GPIO_PIN_POLARITY_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int gpio_set_invert(struct wm8350 *wm8350, int gpio, int invert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (invert == WM8350_GPIO_INVERT_ON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return wm8350_set_bits(wm8350, WM8350_GPIO_INT_MODE, 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return wm8350_clear_bits(wm8350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) WM8350_GPIO_INT_MODE, 1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) int wm8350_gpio_config(struct wm8350 *wm8350, int gpio, int dir, int func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) int pol, int pull, int invert, int debounce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* make sure we never pull up and down at the same time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (pull == WM8350_GPIO_PULL_NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (gpio_set_pull_up(wm8350, gpio, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (gpio_set_pull_down(wm8350, gpio, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) } else if (pull == WM8350_GPIO_PULL_UP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (gpio_set_pull_down(wm8350, gpio, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (gpio_set_pull_up(wm8350, gpio, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) } else if (pull == WM8350_GPIO_PULL_DOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (gpio_set_pull_up(wm8350, gpio, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (gpio_set_pull_down(wm8350, gpio, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (gpio_set_invert(wm8350, gpio, invert))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (gpio_set_polarity(wm8350, gpio, pol))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (wm8350_gpio_set_debounce(wm8350, gpio, debounce))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (gpio_set_dir(wm8350, gpio, dir))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return gpio_set_func(wm8350, gpio, func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) EXPORT_SYMBOL_GPL(wm8350_gpio_config);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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