Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) // Copyright (c) 2019, Linaro Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/mfd/wcd934x/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/mfd/wcd934x/wcd934x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/slimbus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) static const struct mfd_cell wcd934x_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 		.name = "wcd934x-codec",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 		.name = "wcd934x-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 		.of_compatible = "qcom,wcd9340-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 		.name = "wcd934x-soundwire",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 		.of_compatible = "qcom,soundwire-v1.3.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) static const struct regmap_irq wcd934x_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	[WCD934X_IRQ_SLIMBUS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		.reg_offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		.mask = BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		.type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 			.type_reg_offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 			.types_supported = IRQ_TYPE_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 			.type_reg_mask  = BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 			.type_level_low_val = BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 			.type_level_high_val = BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 			.type_falling_val = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 			.type_rising_val = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	[WCD934X_IRQ_SOUNDWIRE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		.reg_offset = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		.mask = BIT(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		.type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 			.type_reg_offset = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 			.types_supported = IRQ_TYPE_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 			.type_reg_mask  = BIT(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 			.type_level_low_val = BIT(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 			.type_level_high_val = BIT(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 			.type_falling_val = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 			.type_rising_val = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static const struct regmap_irq_chip wcd934x_regmap_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	.name = "wcd934x_irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	.status_base = WCD934X_INTR_PIN1_STATUS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	.mask_base = WCD934X_INTR_PIN1_MASK0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	.ack_base = WCD934X_INTR_PIN1_CLEAR0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.type_base = WCD934X_INTR_LEVEL0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.num_type_reg = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.type_in_mask = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	.num_regs = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	.irqs = wcd934x_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	.num_irqs = ARRAY_SIZE(wcd934x_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) static bool wcd934x_is_volatile_register(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	case WCD934X_INTR_PIN1_STATUS0...WCD934X_INTR_PIN2_CLEAR3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	case WCD934X_SWR_AHB_BRIDGE_RD_DATA_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	case WCD934X_SWR_AHB_BRIDGE_RD_DATA_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	case WCD934X_SWR_AHB_BRIDGE_RD_DATA_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	case WCD934X_SWR_AHB_BRIDGE_RD_DATA_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	case WCD934X_SWR_AHB_BRIDGE_ACCESS_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	case WCD934X_ANA_MBHC_RESULT_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	case WCD934X_ANA_MBHC_RESULT_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	case WCD934X_ANA_MBHC_RESULT_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	case WCD934X_ANA_MBHC_MECH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	case WCD934X_ANA_MBHC_ELECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	case WCD934X_ANA_MBHC_ZDET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	case WCD934X_ANA_MICB2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	case WCD934X_ANA_RCO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	case WCD934X_ANA_BIAS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static const struct regmap_range_cfg wcd934x_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	{	.name = "WCD934X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		.range_min =  0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		.range_max =  WCD934X_MAX_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		.selector_reg = WCD934X_SEL_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		.selector_mask = WCD934X_SEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		.selector_shift = WCD934X_SEL_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		.window_start = WCD934X_WINDOW_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		.window_len = WCD934X_WINDOW_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static struct regmap_config wcd934x_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	.reg_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	.cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	.max_register = 0xffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	.can_multi_write = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	.ranges = wcd934x_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	.num_ranges = ARRAY_SIZE(wcd934x_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	.volatile_reg = wcd934x_is_volatile_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int wcd934x_bring_up(struct wcd934x_ddata *ddata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	struct regmap *regmap = ddata->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	u16 id_minor, id_major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	ret = regmap_bulk_read(regmap, WCD934X_CHIP_TIER_CTRL_CHIP_ID_BYTE0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			       (u8 *)&id_minor, sizeof(u16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	ret = regmap_bulk_read(regmap, WCD934X_CHIP_TIER_CTRL_CHIP_ID_BYTE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			       (u8 *)&id_major, sizeof(u16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	dev_info(ddata->dev, "WCD934x chip id major 0x%x, minor 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		 id_major, id_minor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	regmap_write(regmap, WCD934X_CODEC_RPM_RST_CTL, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	regmap_write(regmap, WCD934X_SIDO_NEW_VOUT_A_STARTUP, 0x19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	regmap_write(regmap, WCD934X_SIDO_NEW_VOUT_D_STARTUP, 0x15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	/* Add 1msec delay for VOUT to settle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	usleep_range(1000, 1100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	regmap_write(regmap, WCD934X_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	regmap_write(regmap, WCD934X_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	regmap_write(regmap, WCD934X_CODEC_RPM_RST_CTL, 0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	regmap_write(regmap, WCD934X_CODEC_RPM_RST_CTL, 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	regmap_write(regmap, WCD934X_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int wcd934x_slim_status_up(struct slim_device *sdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	struct device *dev = &sdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	struct wcd934x_ddata *ddata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	ddata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	ddata->regmap = regmap_init_slimbus(sdev, &wcd934x_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	if (IS_ERR(ddata->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		dev_err(dev, "Error allocating slim regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		return PTR_ERR(ddata->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	ret = wcd934x_bring_up(ddata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		dev_err(dev, "Failed to bring up WCD934X: err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	ret = devm_regmap_add_irq_chip(dev, ddata->regmap, ddata->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 				       IRQF_TRIGGER_HIGH, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 				       &wcd934x_regmap_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 				       &ddata->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		dev_err(dev, "Failed to add IRQ chip: err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	ret = mfd_add_devices(dev, PLATFORM_DEVID_AUTO, wcd934x_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			      ARRAY_SIZE(wcd934x_devices), NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		dev_err(dev, "Failed to add child devices: err = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int wcd934x_slim_status(struct slim_device *sdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			       enum slim_device_status status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	switch (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	case SLIM_DEVICE_STATUS_UP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		return wcd934x_slim_status_up(sdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	case SLIM_DEVICE_STATUS_DOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		mfd_remove_devices(&sdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static int wcd934x_slim_probe(struct slim_device *sdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	struct device *dev = &sdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	struct wcd934x_ddata *ddata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	int reset_gpio, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (!ddata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		return	-ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	ddata->irq = of_irq_get(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (ddata->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		return dev_err_probe(ddata->dev, ddata->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 				     "Failed to get IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	reset_gpio = of_get_named_gpio(np, "reset-gpios", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (reset_gpio < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		dev_err(dev, "Failed to get reset gpio: err = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 			reset_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		return reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	ddata->extclk = devm_clk_get(dev, "extclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	if (IS_ERR(ddata->extclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		dev_err(dev, "Failed to get extclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		return PTR_ERR(ddata->extclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	ddata->supplies[0].supply = "vdd-buck";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	ddata->supplies[1].supply = "vdd-buck-sido";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	ddata->supplies[2].supply = "vdd-tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	ddata->supplies[3].supply = "vdd-rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	ddata->supplies[4].supply = "vdd-io";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	ret = regulator_bulk_get(dev, WCD934X_MAX_SUPPLY, ddata->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		dev_err(dev, "Failed to get supplies: err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	ret = regulator_bulk_enable(WCD934X_MAX_SUPPLY, ddata->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		dev_err(dev, "Failed to enable supplies: err = %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	 * For WCD934X, it takes about 600us for the Vout_A and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	 * Vout_D to be ready after BUCK_SIDO is powered up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	 * SYS_RST_N shouldn't be pulled high during this time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	usleep_range(600, 650);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	gpio_direction_output(reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	gpio_set_value(reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	ddata->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	dev_set_drvdata(dev, ddata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static void wcd934x_slim_remove(struct slim_device *sdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	struct wcd934x_ddata *ddata = dev_get_drvdata(&sdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	regulator_bulk_disable(WCD934X_MAX_SUPPLY, ddata->supplies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	mfd_remove_devices(&sdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static const struct slim_device_id wcd934x_slim_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	{ SLIM_MANF_ID_QCOM, SLIM_PROD_CODE_WCD9340,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	  SLIM_DEV_IDX_WCD9340, SLIM_DEV_INSTANCE_ID_WCD9340 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static struct slim_driver wcd934x_slim_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		.name = "wcd934x-slim",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	.probe = wcd934x_slim_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	.remove = wcd934x_slim_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	.device_status = wcd934x_slim_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	.id_table = wcd934x_slim_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) module_slim_driver(wcd934x_slim_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) MODULE_DESCRIPTION("WCD934X slim driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) MODULE_ALIAS("slim:217:250:*");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MODULE_AUTHOR("Srinivas Kandagatla <srinivas.kandagatla@linaro.org>");