Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  Touchscreen driver for UCB1x00-based touchscreens
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  Copyright (C) 2001 Russell King, All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *  Copyright (C) 2005 Pavel Machek
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * 21-Jan-2002 <jco@ict.es> :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Added support for synchronous A/D mode. This mode is useful to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * avoid noise induced in the touchpanel by the LCD, provided that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * the UCB1x00 has a valid LCD sync signal routed to its ADCSYNC pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * It is important to note that the signal connected to the ADCSYNC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * pin should provide pulses even when the LCD is blanked, otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * a pen touch needed to unblank the LCD will never be read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/freezer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/kthread.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/mfd/ucb1x00.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <mach/collie.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) struct ucb1x00_ts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct input_dev	*idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct ucb1x00		*ucb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	spinlock_t		irq_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	unsigned		irq_disabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	wait_queue_head_t	irq_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct task_struct	*rtask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	u16			x_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	u16			y_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	unsigned int		adcsync:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static int adcsync;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static inline void ucb1x00_ts_evt_add(struct ucb1x00_ts *ts, u16 pressure, u16 x, u16 y)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	struct input_dev *idev = ts->idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	input_report_abs(idev, ABS_X, x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	input_report_abs(idev, ABS_Y, y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	input_report_abs(idev, ABS_PRESSURE, pressure);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	input_report_key(idev, BTN_TOUCH, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	input_sync(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static inline void ucb1x00_ts_event_release(struct ucb1x00_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct input_dev *idev = ts->idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	input_report_abs(idev, ABS_PRESSURE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	input_report_key(idev, BTN_TOUCH, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	input_sync(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  * Switch to interrupt mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static inline void ucb1x00_ts_mode_int(struct ucb1x00_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 			UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			UCB_TS_CR_MODE_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  * Switch to pressure mode, and read pressure.  We don't need to wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * here, since both plates are being driven.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static inline unsigned int ucb1x00_ts_read_pressure(struct ucb1x00_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	if (machine_is_collie()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		ucb1x00_io_write(ts->ucb, COLLIE_TC35143_GPIO_TBL_CHK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				  UCB_TS_CR_TSPX_POW | UCB_TS_CR_TSMX_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 				  UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		udelay(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_AD2, ts->adcsync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				  UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				  UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				  UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  * Switch to X position mode and measure Y plate.  We switch the plate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  * configuration in pressure mode, then switch to position mode.  This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  * gives a faster response time.  Even so, we need to wait about 55us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  * for things to stabilise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static inline unsigned int ucb1x00_ts_read_xpos(struct ucb1x00_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (machine_is_collie())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 				  UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 				  UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 				  UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 				  UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	udelay(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)  * Switch to Y position mode and measure X plate.  We switch the plate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)  * configuration in pressure mode, then switch to position mode.  This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)  * gives a faster response time.  Even so, we need to wait about 55us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)  * for things to stabilise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static inline unsigned int ucb1x00_ts_read_ypos(struct ucb1x00_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	if (machine_is_collie())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 				  UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 				  UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 				  UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 				  UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	udelay(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPX, ts->adcsync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)  * Switch to X plate resistance mode.  Set MX to ground, PX to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)  * supply.  Measure current.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static inline unsigned int ucb1x00_ts_read_xres(struct ucb1x00_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)  * Switch to Y plate resistance mode.  Set MY to ground, PY to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)  * supply.  Measure current.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static inline unsigned int ucb1x00_ts_read_yres(struct ucb1x00_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 			UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static inline int ucb1x00_ts_pen_down(struct ucb1x00_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	unsigned int val = ucb1x00_reg_read(ts->ucb, UCB_TS_CR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (machine_is_collie())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		return (!(val & (UCB_TS_CR_TSPX_LOW)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)  * This is a RT kernel thread that handles the ADC accesses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)  * (mainly so we can use semaphores in the UCB1200 core code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)  * to serialise accesses to the ADC).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static int ucb1x00_thread(void *_ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	struct ucb1x00_ts *ts = _ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	DECLARE_WAITQUEUE(wait, current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	bool frozen, ignore = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	int valid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	set_freezable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	add_wait_queue(&ts->irq_wait, &wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	while (!kthread_freezable_should_stop(&frozen)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		unsigned int x, y, p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		signed long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		if (frozen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 			ignore = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		ucb1x00_adc_enable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		x = ucb1x00_ts_read_xpos(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		y = ucb1x00_ts_read_ypos(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		p = ucb1x00_ts_read_pressure(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		 * Switch back to interrupt mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		ucb1x00_ts_mode_int(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		ucb1x00_adc_disable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		ucb1x00_enable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		if (ucb1x00_ts_pen_down(ts)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			set_current_state(TASK_INTERRUPTIBLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			spin_lock_irq(&ts->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			if (ts->irq_disabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 				ts->irq_disabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 				enable_irq(ts->ucb->irq_base + UCB_IRQ_TSPX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			spin_unlock_irq(&ts->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 			ucb1x00_disable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			 * If we spat out a valid sample set last time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 			 * spit out a "pen off" sample here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 			if (valid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 				ucb1x00_ts_event_release(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 				valid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			timeout = MAX_SCHEDULE_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 			ucb1x00_disable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			 * Filtering is policy.  Policy belongs in user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 			 * space.  We therefore leave it to user space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			 * to do any filtering they please.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			if (!ignore) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 				ucb1x00_ts_evt_add(ts, p, x, y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 				valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 			set_current_state(TASK_INTERRUPTIBLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 			timeout = HZ / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		schedule_timeout(timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	remove_wait_queue(&ts->irq_wait, &wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	ts->rtask = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)  * We only detect touch screen _touches_ with this interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)  * handler, and even then we just schedule our task.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static irqreturn_t ucb1x00_ts_irq(int irq, void *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct ucb1x00_ts *ts = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	spin_lock(&ts->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	ts->irq_disabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	disable_irq_nosync(ts->ucb->irq_base + UCB_IRQ_TSPX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	spin_unlock(&ts->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	wake_up(&ts->irq_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int ucb1x00_ts_open(struct input_dev *idev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	struct ucb1x00_ts *ts = input_get_drvdata(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	BUG_ON(ts->rtask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	if (machine_is_collie())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		flags = IRQF_TRIGGER_RISING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		flags = IRQF_TRIGGER_FALLING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	ts->irq_disabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	init_waitqueue_head(&ts->irq_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	ret = request_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ucb1x00_ts_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 			  flags, "ucb1x00-ts", ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	 * If we do this at all, we should allow the user to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	 * measure and read the X and Y resistance at any time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	ucb1x00_adc_enable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	ts->x_res = ucb1x00_ts_read_xres(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	ts->y_res = ucb1x00_ts_read_yres(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	ucb1x00_adc_disable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	ts->rtask = kthread_run(ucb1x00_thread, ts, "ktsd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	if (!IS_ERR(ts->rtask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		ts->rtask = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)  out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)  * Release touchscreen resources.  Disable IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static void ucb1x00_ts_close(struct input_dev *idev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	struct ucb1x00_ts *ts = input_get_drvdata(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	if (ts->rtask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		kthread_stop(ts->rtask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	ucb1x00_enable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	ucb1x00_reg_write(ts->ucb, UCB_TS_CR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	ucb1x00_disable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)  * Initialisation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) static int ucb1x00_ts_add(struct ucb1x00_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	struct ucb1x00_ts *ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	struct input_dev *idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	ts = kzalloc(sizeof(struct ucb1x00_ts), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	idev = input_allocate_device();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	if (!ts || !idev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	ts->ucb = dev->ucb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	ts->idev = idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	ts->adcsync = adcsync ? UCB_SYNC : UCB_NOSYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	spin_lock_init(&ts->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	idev->name       = "Touchscreen panel";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	idev->id.product = ts->ucb->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	idev->open       = ucb1x00_ts_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	idev->close      = ucb1x00_ts_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	idev->dev.parent = &ts->ucb->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	idev->evbit[0]   = BIT_MASK(EV_ABS) | BIT_MASK(EV_KEY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	input_set_drvdata(idev, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	ucb1x00_adc_enable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	ts->x_res = ucb1x00_ts_read_xres(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	ts->y_res = ucb1x00_ts_read_yres(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	ucb1x00_adc_disable(ts->ucb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	input_set_abs_params(idev, ABS_X, 0, ts->x_res, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	input_set_abs_params(idev, ABS_Y, 0, ts->y_res, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	err = input_register_device(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	dev->priv = ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)  fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	input_free_device(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	kfree(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static void ucb1x00_ts_remove(struct ucb1x00_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	struct ucb1x00_ts *ts = dev->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	input_unregister_device(ts->idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	kfree(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static struct ucb1x00_driver ucb1x00_ts_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	.add		= ucb1x00_ts_add,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	.remove		= ucb1x00_ts_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static int __init ucb1x00_ts_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	return ucb1x00_register_driver(&ucb1x00_ts_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static void __exit ucb1x00_ts_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	ucb1x00_unregister_driver(&ucb1x00_ts_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) module_param(adcsync, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) module_init(ucb1x00_ts_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) module_exit(ucb1x00_ts_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) MODULE_DESCRIPTION("UCB1x00 touchscreen driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) MODULE_LICENSE("GPL");