Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * TQ-Systems PLD MFD core driver, based on vendor driver by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Vadim V.Vlasov <vvlasov@dev.rtsoft.ru>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (c) 2015 TQ-Systems GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (c) 2019 Andrew Lunn <andrew@lunn.ch>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/dmi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_data/i2c-ocores.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define TQMX86_IOBASE	0x160
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define TQMX86_IOSIZE	0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define TQMX86_IOBASE_I2C	0x1a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define TQMX86_IOSIZE_I2C	0xa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define TQMX86_IOBASE_WATCHDOG	0x18b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define TQMX86_IOSIZE_WATCHDOG	0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define TQMX86_IOBASE_GPIO	0x18d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define TQMX86_IOSIZE_GPIO	0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define TQMX86_REG_BOARD_ID	0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define TQMX86_REG_BOARD_ID_E38M	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define TQMX86_REG_BOARD_ID_50UC	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define TQMX86_REG_BOARD_ID_E38C	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define TQMX86_REG_BOARD_ID_60EB	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define TQMX86_REG_BOARD_ID_E39M	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define TQMX86_REG_BOARD_ID_E39C	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define TQMX86_REG_BOARD_ID_E39x	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define TQMX86_REG_BOARD_ID_70EB	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define TQMX86_REG_BOARD_ID_80UC	9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define TQMX86_REG_BOARD_ID_90UC	10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define TQMX86_REG_BOARD_REV	0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define TQMX86_REG_IO_EXT_INT	0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define TQMX86_REG_IO_EXT_INT_NONE		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define TQMX86_REG_IO_EXT_INT_7			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define TQMX86_REG_IO_EXT_INT_9			2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define TQMX86_REG_IO_EXT_INT_12		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define TQMX86_REG_IO_EXT_INT_MASK		0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define TQMX86_REG_IO_EXT_INT_GPIO_SHIFT	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define TQMX86_REG_I2C_DETECT	0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define TQMX86_REG_I2C_DETECT_SOFT		0xa5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define TQMX86_REG_I2C_INT_EN	0x49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static uint gpio_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) module_param(gpio_irq, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (7, 9, 12)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static const struct resource tqmx_i2c_soft_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static const struct resource tqmx_watchdog_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	DEFINE_RES_IO(TQMX86_IOBASE_WATCHDOG, TQMX86_IOSIZE_WATCHDOG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * The IRQ resource must be first, since it is updated with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  * configured IRQ in the probe function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static struct resource tqmx_gpio_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	DEFINE_RES_IRQ(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	DEFINE_RES_IO(TQMX86_IOBASE_GPIO, TQMX86_IOSIZE_GPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static struct i2c_board_info tqmx86_i2c_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		/* 4K EEPROM at 0x50 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		I2C_BOARD_INFO("24c32", 0x50),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) static struct ocores_i2c_platform_data ocores_platfom_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	.num_devices = ARRAY_SIZE(tqmx86_i2c_devices),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	.devices = tqmx86_i2c_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static const struct mfd_cell tqmx86_i2c_soft_dev[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		.name = "ocores-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		.platform_data = &ocores_platfom_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		.pdata_size = sizeof(ocores_platfom_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		.resources = tqmx_i2c_soft_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		.num_resources = ARRAY_SIZE(tqmx_i2c_soft_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static const struct mfd_cell tqmx86_devs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		.name = "tqmx86-wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		.resources = tqmx_watchdog_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		.num_resources = ARRAY_SIZE(tqmx_watchdog_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		.ignore_resource_conflicts = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		.name = "tqmx86-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		.resources = tqmx_gpio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		.num_resources = ARRAY_SIZE(tqmx_gpio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		.ignore_resource_conflicts = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const char *tqmx86_board_id_to_name(u8 board_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	switch (board_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	case TQMX86_REG_BOARD_ID_E38M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		return "TQMxE38M";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	case TQMX86_REG_BOARD_ID_50UC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		return "TQMx50UC";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	case TQMX86_REG_BOARD_ID_E38C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		return "TQMxE38C";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	case TQMX86_REG_BOARD_ID_60EB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		return "TQMx60EB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	case TQMX86_REG_BOARD_ID_E39M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		return "TQMxE39M";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	case TQMX86_REG_BOARD_ID_E39C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		return "TQMxE39C";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	case TQMX86_REG_BOARD_ID_E39x:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		return "TQMxE39x";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	case TQMX86_REG_BOARD_ID_70EB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		return "TQMx70EB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	case TQMX86_REG_BOARD_ID_80UC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		return "TQMx80UC";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	case TQMX86_REG_BOARD_ID_90UC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return "TQMx90UC";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		return "Unknown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int tqmx86_board_id_to_clk_rate(u8 board_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	switch (board_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	case TQMX86_REG_BOARD_ID_50UC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	case TQMX86_REG_BOARD_ID_60EB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	case TQMX86_REG_BOARD_ID_70EB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	case TQMX86_REG_BOARD_ID_80UC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	case TQMX86_REG_BOARD_ID_90UC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		return 24000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	case TQMX86_REG_BOARD_ID_E39M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	case TQMX86_REG_BOARD_ID_E39C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	case TQMX86_REG_BOARD_ID_E39x:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		return 25000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	case TQMX86_REG_BOARD_ID_E38M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	case TQMX86_REG_BOARD_ID_E38C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		return 33000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static int tqmx86_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	u8 board_id, rev, i2c_det, io_ext_int_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	u8 gpio_irq_cfg, readback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	const char *board_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	void __iomem *io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	switch (gpio_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	case 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	case 12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		pr_err("tqmx86: Invalid GPIO IRQ (%d)\n", gpio_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	io_base = devm_ioport_map(dev, TQMX86_IOBASE, TQMX86_IOSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (!io_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	board_id = ioread8(io_base + TQMX86_REG_BOARD_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	board_name = tqmx86_board_id_to_name(board_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	rev = ioread8(io_base + TQMX86_REG_BOARD_REV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	dev_info(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		 "Found %s - Board ID %d, PCB Revision %d, PLD Revision %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		 board_name, board_id, rev >> 4, rev & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	i2c_det = ioread8(io_base + TQMX86_REG_I2C_DETECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (gpio_irq_cfg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		io_ext_int_val =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			gpio_irq_cfg << TQMX86_REG_IO_EXT_INT_GPIO_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		iowrite8(io_ext_int_val, io_base + TQMX86_REG_IO_EXT_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		readback = ioread8(io_base + TQMX86_REG_IO_EXT_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		if (readback != io_ext_int_val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			dev_warn(dev, "GPIO interrupts not supported.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		/* Assumes the IRQ resource is first. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		tqmx_gpio_resources[0].start = gpio_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		tqmx_gpio_resources[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	ocores_platfom_data.clock_khz = tqmx86_board_id_to_clk_rate(board_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (i2c_det == TQMX86_REG_I2C_DETECT_SOFT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		err = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 					   tqmx86_i2c_soft_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 					   ARRAY_SIZE(tqmx86_i2c_soft_dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 					   NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 				    tqmx86_devs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 				    ARRAY_SIZE(tqmx86_devs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				    NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static int tqmx86_create_platform_device(const struct dmi_system_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	pdev = platform_device_alloc("tqmx86", -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (!pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	err = platform_device_add(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		platform_device_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static const struct dmi_system_id tqmx86_dmi_table[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		.ident = "TQMX86",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		.matches = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 			DMI_MATCH(DMI_SYS_VENDOR, "TQ-Group"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			DMI_MATCH(DMI_PRODUCT_NAME, "TQMx"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		.callback = tqmx86_create_platform_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MODULE_DEVICE_TABLE(dmi, tqmx86_dmi_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static struct platform_driver tqmx86_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		.name	= "tqmx86",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	.probe		= tqmx86_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static int __init tqmx86_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	if (!dmi_check_system(tqmx86_dmi_table))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	return platform_driver_register(&tqmx86_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) module_init(tqmx86_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) MODULE_DESCRIPTION("TQMx86 PLD Core Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MODULE_ALIAS("platform:tqmx86");