^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * timberdale.c timberdale FPGA MFD driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2009 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) /* Supports:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Timberdale FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/timb_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/platform_data/i2c-ocores.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/platform_data/i2c-xiic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/spi/xilinx_spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/spi/max7301.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/spi/mc33880.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/platform_data/tsc2007.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/platform_data/media/timb_radio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/platform_data/media/timb_video.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/timb_dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/ks8842.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include "timberdale.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define DRIVER_NAME "timberdale"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct timberdale_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) resource_size_t ctl_mapbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned char __iomem *ctl_membase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u32 major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u32 minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u32 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) } fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /*--------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static struct tsc2007_platform_data timberdale_tsc2007_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .model = 2003,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .x_plate_ohms = 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static struct i2c_board_info timberdale_i2c_board_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) I2C_BOARD_INFO("tsc2007", 0x48),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .platform_data = &timberdale_tsc2007_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .irq = IRQ_TIMBERDALE_TSC_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct xiic_i2c_platform_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) timberdale_xiic_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .devices = timberdale_i2c_board_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .num_devices = ARRAY_SIZE(timberdale_i2c_board_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static struct ocores_i2c_platform_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) timberdale_ocores_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .reg_shift = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .clock_khz = 62500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .devices = timberdale_i2c_board_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .num_devices = ARRAY_SIZE(timberdale_i2c_board_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static const struct resource timberdale_xiic_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .start = XIICOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .end = XIICEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .start = IRQ_TIMBERDALE_I2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .end = IRQ_TIMBERDALE_I2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static const struct resource timberdale_ocores_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .start = OCORESOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .end = OCORESEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .start = IRQ_TIMBERDALE_I2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .end = IRQ_TIMBERDALE_I2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const struct max7301_platform_data timberdale_max7301_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .base = 200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const struct mc33880_platform_data timberdale_mc33880_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .base = 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static struct spi_board_info timberdale_spi_16bit_board_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .modalias = "max7301",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .max_speed_hz = 26000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .chip_select = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .mode = SPI_MODE_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .platform_data = &timberdale_max7301_platform_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static struct spi_board_info timberdale_spi_8bit_board_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .modalias = "mc33880",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .max_speed_hz = 4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .chip_select = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .mode = SPI_MODE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .platform_data = &timberdale_mc33880_platform_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static struct xspi_platform_data timberdale_xspi_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .num_chipselect = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* bits per word and devices will be filled in runtime depending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * on the HW config
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const struct resource timberdale_spi_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .start = SPIOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .end = SPIEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .start = IRQ_TIMBERDALE_SPI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .end = IRQ_TIMBERDALE_SPI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static struct ks8842_platform_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) timberdale_ks8842_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .rx_dma_channel = DMA_ETH_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .tx_dma_channel = DMA_ETH_TX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static const struct resource timberdale_eth_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .start = ETHOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .end = ETHEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .start = IRQ_TIMBERDALE_ETHSW_IF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .end = IRQ_TIMBERDALE_ETHSW_IF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static struct timbgpio_platform_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) timberdale_gpio_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .gpio_base = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .nr_pins = GPIO_NR_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .irq_base = 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static const struct resource timberdale_gpio_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .start = GPIOOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .end = GPIOEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .start = IRQ_TIMBERDALE_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .end = IRQ_TIMBERDALE_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static const struct resource timberdale_mlogicore_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .start = MLCOREOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .end = MLCOREEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .start = IRQ_TIMBERDALE_MLCORE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .end = IRQ_TIMBERDALE_MLCORE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .start = IRQ_TIMBERDALE_MLCORE_BUF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .end = IRQ_TIMBERDALE_MLCORE_BUF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static const struct resource timberdale_uart_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .start = UARTOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .end = UARTEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .start = IRQ_TIMBERDALE_UART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .end = IRQ_TIMBERDALE_UART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static const struct resource timberdale_uartlite_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .start = UARTLITEOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .end = UARTLITEEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .start = IRQ_TIMBERDALE_UARTLITE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .end = IRQ_TIMBERDALE_UARTLITE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static struct i2c_board_info timberdale_adv7180_i2c_board_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /* Requires jumper JP9 to be off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) I2C_BOARD_INFO("adv7180", 0x42 >> 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .irq = IRQ_TIMBERDALE_ADV7180
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static struct timb_video_platform_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) timberdale_video_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .dma_channel = DMA_VIDEO_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .i2c_adapter = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .encoder = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .info = &timberdale_adv7180_i2c_board_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static const struct resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) timberdale_radio_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .start = RDSOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .end = RDSEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .start = IRQ_TIMBERDALE_RDS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .end = IRQ_TIMBERDALE_RDS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static struct i2c_board_info timberdale_tef6868_i2c_board_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) I2C_BOARD_INFO("tef6862", 0x60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static struct i2c_board_info timberdale_saa7706_i2c_board_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) I2C_BOARD_INFO("saa7706h", 0x1C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static struct timb_radio_platform_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) timberdale_radio_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .i2c_adapter = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .tuner = &timberdale_tef6868_i2c_board_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .dsp = &timberdale_saa7706_i2c_board_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static const struct resource timberdale_video_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .start = LOGIWOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .end = LOGIWEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) note that the "frame buffer" is located in DMA area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) starting at 0x1200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static struct timb_dma_platform_data timb_dma_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .nr_channels = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .channels = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* UART RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .rx = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .descriptors = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .descriptor_elements = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /* UART TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .rx = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .descriptors = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .descriptor_elements = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /* MLB RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .rx = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .descriptors = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .descriptor_elements = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* MLB TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .rx = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .descriptors = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .descriptor_elements = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* Video RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .rx = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .bytes_per_line = 1440,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .descriptors = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .descriptor_elements = 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /* Video framedrop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* SDHCI RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .rx = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* SDHCI TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* ETH RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .rx = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .descriptors = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .descriptor_elements = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) /* ETH TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .rx = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .descriptors = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .descriptor_elements = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static const struct resource timberdale_dma_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .start = DMAOFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .end = DMAEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .start = IRQ_TIMBERDALE_DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .end = IRQ_TIMBERDALE_DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static const struct mfd_cell timberdale_cells_bar0_cfg0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .name = "timb-dma",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .num_resources = ARRAY_SIZE(timberdale_dma_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .resources = timberdale_dma_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .platform_data = &timb_dma_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .pdata_size = sizeof(timb_dma_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .name = "timb-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .num_resources = ARRAY_SIZE(timberdale_uart_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .resources = timberdale_uart_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .name = "xiic-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .num_resources = ARRAY_SIZE(timberdale_xiic_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .resources = timberdale_xiic_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .platform_data = &timberdale_xiic_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .pdata_size = sizeof(timberdale_xiic_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .name = "timb-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .num_resources = ARRAY_SIZE(timberdale_gpio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .resources = timberdale_gpio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .platform_data = &timberdale_gpio_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .pdata_size = sizeof(timberdale_gpio_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .name = "timb-video",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .num_resources = ARRAY_SIZE(timberdale_video_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .resources = timberdale_video_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .platform_data = &timberdale_video_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .pdata_size = sizeof(timberdale_video_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .name = "timb-radio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .num_resources = ARRAY_SIZE(timberdale_radio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .resources = timberdale_radio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .platform_data = &timberdale_radio_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .pdata_size = sizeof(timberdale_radio_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .name = "xilinx_spi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .num_resources = ARRAY_SIZE(timberdale_spi_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .resources = timberdale_spi_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .platform_data = &timberdale_xspi_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .pdata_size = sizeof(timberdale_xspi_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .name = "ks8842",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .num_resources = ARRAY_SIZE(timberdale_eth_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .resources = timberdale_eth_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .platform_data = &timberdale_ks8842_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .pdata_size = sizeof(timberdale_ks8842_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static const struct mfd_cell timberdale_cells_bar0_cfg1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .name = "timb-dma",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .num_resources = ARRAY_SIZE(timberdale_dma_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .resources = timberdale_dma_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .platform_data = &timb_dma_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .pdata_size = sizeof(timb_dma_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .name = "timb-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .num_resources = ARRAY_SIZE(timberdale_uart_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .resources = timberdale_uart_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .name = "uartlite",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .num_resources = ARRAY_SIZE(timberdale_uartlite_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .resources = timberdale_uartlite_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .name = "xiic-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .num_resources = ARRAY_SIZE(timberdale_xiic_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .resources = timberdale_xiic_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .platform_data = &timberdale_xiic_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .pdata_size = sizeof(timberdale_xiic_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .name = "timb-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .num_resources = ARRAY_SIZE(timberdale_gpio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .resources = timberdale_gpio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .platform_data = &timberdale_gpio_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .pdata_size = sizeof(timberdale_gpio_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .name = "timb-mlogicore",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .num_resources = ARRAY_SIZE(timberdale_mlogicore_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .resources = timberdale_mlogicore_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .name = "timb-video",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .num_resources = ARRAY_SIZE(timberdale_video_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .resources = timberdale_video_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) .platform_data = &timberdale_video_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) .pdata_size = sizeof(timberdale_video_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .name = "timb-radio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .num_resources = ARRAY_SIZE(timberdale_radio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .resources = timberdale_radio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .platform_data = &timberdale_radio_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .pdata_size = sizeof(timberdale_radio_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .name = "xilinx_spi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .num_resources = ARRAY_SIZE(timberdale_spi_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .resources = timberdale_spi_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .platform_data = &timberdale_xspi_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .pdata_size = sizeof(timberdale_xspi_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) .name = "ks8842",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) .num_resources = ARRAY_SIZE(timberdale_eth_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .resources = timberdale_eth_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .platform_data = &timberdale_ks8842_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .pdata_size = sizeof(timberdale_ks8842_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static const struct mfd_cell timberdale_cells_bar0_cfg2[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .name = "timb-dma",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .num_resources = ARRAY_SIZE(timberdale_dma_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .resources = timberdale_dma_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) .platform_data = &timb_dma_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .pdata_size = sizeof(timb_dma_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .name = "timb-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .num_resources = ARRAY_SIZE(timberdale_uart_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .resources = timberdale_uart_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .name = "xiic-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .num_resources = ARRAY_SIZE(timberdale_xiic_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .resources = timberdale_xiic_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .platform_data = &timberdale_xiic_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .pdata_size = sizeof(timberdale_xiic_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .name = "timb-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .num_resources = ARRAY_SIZE(timberdale_gpio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) .resources = timberdale_gpio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .platform_data = &timberdale_gpio_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .pdata_size = sizeof(timberdale_gpio_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .name = "timb-video",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .num_resources = ARRAY_SIZE(timberdale_video_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .resources = timberdale_video_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) .platform_data = &timberdale_video_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) .pdata_size = sizeof(timberdale_video_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .name = "timb-radio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .num_resources = ARRAY_SIZE(timberdale_radio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .resources = timberdale_radio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .platform_data = &timberdale_radio_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .pdata_size = sizeof(timberdale_radio_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) .name = "xilinx_spi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .num_resources = ARRAY_SIZE(timberdale_spi_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .resources = timberdale_spi_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) .platform_data = &timberdale_xspi_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) .pdata_size = sizeof(timberdale_xspi_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static const struct mfd_cell timberdale_cells_bar0_cfg3[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .name = "timb-dma",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .num_resources = ARRAY_SIZE(timberdale_dma_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .resources = timberdale_dma_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .platform_data = &timb_dma_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .pdata_size = sizeof(timb_dma_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .name = "timb-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .num_resources = ARRAY_SIZE(timberdale_uart_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .resources = timberdale_uart_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .name = "ocores-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .num_resources = ARRAY_SIZE(timberdale_ocores_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .resources = timberdale_ocores_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .platform_data = &timberdale_ocores_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .pdata_size = sizeof(timberdale_ocores_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .name = "timb-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) .num_resources = ARRAY_SIZE(timberdale_gpio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) .resources = timberdale_gpio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) .platform_data = &timberdale_gpio_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) .pdata_size = sizeof(timberdale_gpio_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) .name = "timb-video",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) .num_resources = ARRAY_SIZE(timberdale_video_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) .resources = timberdale_video_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .platform_data = &timberdale_video_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .pdata_size = sizeof(timberdale_video_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .name = "timb-radio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .num_resources = ARRAY_SIZE(timberdale_radio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) .resources = timberdale_radio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) .platform_data = &timberdale_radio_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) .pdata_size = sizeof(timberdale_radio_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .name = "xilinx_spi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .num_resources = ARRAY_SIZE(timberdale_spi_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) .resources = timberdale_spi_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .platform_data = &timberdale_xspi_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .pdata_size = sizeof(timberdale_xspi_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) .name = "ks8842",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) .num_resources = ARRAY_SIZE(timberdale_eth_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) .resources = timberdale_eth_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) .platform_data = &timberdale_ks8842_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) .pdata_size = sizeof(timberdale_ks8842_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) static const struct resource timberdale_sdhc_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) /* located in bar 1 and bar 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) .start = SDHC0OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .end = SDHC0END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) .start = IRQ_TIMBERDALE_SDHC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) .end = IRQ_TIMBERDALE_SDHC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static const struct mfd_cell timberdale_cells_bar1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .name = "sdhci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .num_resources = ARRAY_SIZE(timberdale_sdhc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) .resources = timberdale_sdhc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static const struct mfd_cell timberdale_cells_bar2[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .name = "sdhci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .num_resources = ARRAY_SIZE(timberdale_sdhc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .resources = timberdale_sdhc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) struct timberdale_device *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) return sprintf(buf, "%d.%d.%d\n", priv->fw.major, priv->fw.minor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) priv->fw.config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) /*--------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static int timb_probe(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) struct timberdale_device *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) int err, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) resource_size_t mapbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) struct msix_entry *msix_entries = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) u8 ip_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) priv = kzalloc(sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) pci_set_drvdata(dev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) err = pci_enable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) goto err_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) mapbase = pci_resource_start(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (!mapbase) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) dev_err(&dev->dev, "No resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) goto err_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) /* create a resource for the PCI master register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) priv->ctl_mapbase = mapbase + CHIPCTLOFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) if (!request_mem_region(priv->ctl_mapbase, CHIPCTLSIZE, "timb-ctl")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) dev_err(&dev->dev, "Failed to request ctl mem\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) goto err_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) priv->ctl_membase = ioremap(priv->ctl_mapbase, CHIPCTLSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (!priv->ctl_membase) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) dev_err(&dev->dev, "ioremap failed for ctl mem\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) goto err_ioremap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) /* read the HW config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) priv->fw.major = ioread32(priv->ctl_membase + TIMB_REV_MAJOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) priv->fw.minor = ioread32(priv->ctl_membase + TIMB_REV_MINOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) priv->fw.config = ioread32(priv->ctl_membase + TIMB_HW_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) if (priv->fw.major > TIMB_SUPPORTED_MAJOR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) dev_err(&dev->dev, "The driver supports an older "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) "version of the FPGA, please update the driver to "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) "support %d.%d\n", priv->fw.major, priv->fw.minor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) goto err_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) if (priv->fw.major < TIMB_SUPPORTED_MAJOR ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) priv->fw.minor < TIMB_REQUIRED_MINOR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) dev_err(&dev->dev, "The FPGA image is too old (%d.%d), "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) "please upgrade the FPGA to at least: %d.%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) priv->fw.major, priv->fw.minor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) TIMB_SUPPORTED_MAJOR, TIMB_REQUIRED_MINOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) goto err_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) msix_entries = kcalloc(TIMBERDALE_NR_IRQS, sizeof(*msix_entries),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) if (!msix_entries)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) goto err_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) for (i = 0; i < TIMBERDALE_NR_IRQS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) msix_entries[i].entry = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) err = pci_enable_msix_exact(dev, msix_entries, TIMBERDALE_NR_IRQS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) dev_err(&dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) "MSI-X init failed: %d, expected entries: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) err, TIMBERDALE_NR_IRQS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) goto err_msix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) err = device_create_file(&dev->dev, &dev_attr_fw_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) goto err_create_file;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) /* Reset all FPGA PLB peripherals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) iowrite32(0x1, priv->ctl_membase + TIMB_SW_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) /* update IRQ offsets in I2C board info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) for (i = 0; i < ARRAY_SIZE(timberdale_i2c_board_info); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) timberdale_i2c_board_info[i].irq =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) msix_entries[timberdale_i2c_board_info[i].irq].vector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) /* Update the SPI configuration depending on the HW (8 or 16 bit) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) if (priv->fw.config & TIMB_HW_CONFIG_SPI_8BIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) timberdale_xspi_platform_data.bits_per_word = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) timberdale_xspi_platform_data.devices =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) timberdale_spi_8bit_board_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) timberdale_xspi_platform_data.num_devices =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) ARRAY_SIZE(timberdale_spi_8bit_board_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) timberdale_xspi_platform_data.bits_per_word = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) timberdale_xspi_platform_data.devices =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) timberdale_spi_16bit_board_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) timberdale_xspi_platform_data.num_devices =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ARRAY_SIZE(timberdale_spi_16bit_board_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) ip_setup = priv->fw.config & TIMB_HW_VER_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) switch (ip_setup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) case TIMB_HW_VER0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) err = mfd_add_devices(&dev->dev, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) timberdale_cells_bar0_cfg0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) ARRAY_SIZE(timberdale_cells_bar0_cfg0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) &dev->resource[0], msix_entries[0].vector, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) case TIMB_HW_VER1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) err = mfd_add_devices(&dev->dev, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) timberdale_cells_bar0_cfg1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) ARRAY_SIZE(timberdale_cells_bar0_cfg1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) &dev->resource[0], msix_entries[0].vector, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) case TIMB_HW_VER2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) err = mfd_add_devices(&dev->dev, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) timberdale_cells_bar0_cfg2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) ARRAY_SIZE(timberdale_cells_bar0_cfg2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) &dev->resource[0], msix_entries[0].vector, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) case TIMB_HW_VER3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) err = mfd_add_devices(&dev->dev, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) timberdale_cells_bar0_cfg3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) ARRAY_SIZE(timberdale_cells_bar0_cfg3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) &dev->resource[0], msix_entries[0].vector, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) dev_err(&dev->dev, "Unknown IP setup: %d.%d.%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) priv->fw.major, priv->fw.minor, ip_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) goto err_mfd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) dev_err(&dev->dev, "mfd_add_devices failed: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) goto err_mfd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) err = mfd_add_devices(&dev->dev, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) timberdale_cells_bar1, ARRAY_SIZE(timberdale_cells_bar1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) &dev->resource[1], msix_entries[0].vector, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) dev_err(&dev->dev, "mfd_add_devices failed: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) goto err_mfd2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) /* only version 0 and 3 have the iNand routed to SDHCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) if (((priv->fw.config & TIMB_HW_VER_MASK) == TIMB_HW_VER0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) ((priv->fw.config & TIMB_HW_VER_MASK) == TIMB_HW_VER3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) err = mfd_add_devices(&dev->dev, 1, timberdale_cells_bar2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) ARRAY_SIZE(timberdale_cells_bar2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) &dev->resource[2], msix_entries[0].vector, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) dev_err(&dev->dev, "mfd_add_devices failed: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) goto err_mfd2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) kfree(msix_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) dev_info(&dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) "Found Timberdale Card. Rev: %d.%d, HW config: 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) priv->fw.major, priv->fw.minor, priv->fw.config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) err_mfd2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) mfd_remove_devices(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) err_mfd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) device_remove_file(&dev->dev, &dev_attr_fw_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) err_create_file:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) pci_disable_msix(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) err_msix:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) kfree(msix_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) err_config:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) iounmap(priv->ctl_membase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) err_ioremap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) release_mem_region(priv->ctl_mapbase, CHIPCTLSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) err_start:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) err_enable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) kfree(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) static void timb_remove(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) struct timberdale_device *priv = pci_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) mfd_remove_devices(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) device_remove_file(&dev->dev, &dev_attr_fw_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) iounmap(priv->ctl_membase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) release_mem_region(priv->ctl_mapbase, CHIPCTLSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) pci_disable_msix(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) kfree(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) static const struct pci_device_id timberdale_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) { PCI_DEVICE(PCI_VENDOR_ID_TIMB, PCI_DEVICE_ID_TIMB) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) { 0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) MODULE_DEVICE_TABLE(pci, timberdale_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) static struct pci_driver timberdale_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) .name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) .id_table = timberdale_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) .probe = timb_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) .remove = timb_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) module_pci_driver(timberdale_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) MODULE_VERSION(DRV_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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