^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for STMicroelectronics Multi-Function eXpander (STMFX) core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2019 STMicroelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bitfield.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mfd/stmfx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static bool stmfx_reg_volatile(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) case STMFX_REG_SYS_CTRL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) case STMFX_REG_IRQ_SRC_EN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) case STMFX_REG_IRQ_PENDING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) case STMFX_REG_IRQ_GPI_PENDING1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) case STMFX_REG_IRQ_GPI_PENDING2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) case STMFX_REG_IRQ_GPI_PENDING3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) case STMFX_REG_GPIO_STATE1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) case STMFX_REG_GPIO_STATE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) case STMFX_REG_GPIO_STATE3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) case STMFX_REG_IRQ_GPI_SRC1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) case STMFX_REG_IRQ_GPI_SRC2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) case STMFX_REG_IRQ_GPI_SRC3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) case STMFX_REG_GPO_SET1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) case STMFX_REG_GPO_SET2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) case STMFX_REG_GPO_SET3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) case STMFX_REG_GPO_CLR1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) case STMFX_REG_GPO_CLR2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) case STMFX_REG_GPO_CLR3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static bool stmfx_reg_writeable(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return (reg >= STMFX_REG_SYS_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static const struct regmap_config stmfx_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .reg_stride = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .max_register = STMFX_REG_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .volatile_reg = stmfx_reg_volatile,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .writeable_reg = stmfx_reg_writeable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static const struct resource stmfx_pinctrl_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_GPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static const struct resource stmfx_idd_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_IDD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_ERROR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static const struct resource stmfx_ts_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_DET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_NE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_TH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_FULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_TS_OVF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static struct mfd_cell stmfx_cells[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .of_compatible = "st,stmfx-0300-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .name = "stmfx-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .resources = stmfx_pinctrl_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .num_resources = ARRAY_SIZE(stmfx_pinctrl_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .of_compatible = "st,stmfx-0300-idd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .name = "stmfx-idd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .resources = stmfx_idd_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .num_resources = ARRAY_SIZE(stmfx_idd_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .of_compatible = "st,stmfx-0300-ts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .name = "stmfx-ts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .resources = stmfx_ts_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .num_resources = ARRAY_SIZE(stmfx_ts_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static u8 stmfx_func_to_mask(u32 func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u8 mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (func & STMFX_FUNC_GPIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) mask |= STMFX_REG_SYS_CTRL_GPIO_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if ((func & STMFX_FUNC_ALTGPIO_LOW) || (func & STMFX_FUNC_ALTGPIO_HIGH))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) mask |= STMFX_REG_SYS_CTRL_ALTGPIO_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (func & STMFX_FUNC_TS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) mask |= STMFX_REG_SYS_CTRL_TS_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (func & STMFX_FUNC_IDD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) mask |= STMFX_REG_SYS_CTRL_IDD_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int stmfx_function_enable(struct stmfx *stmfx, u32 func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u32 sys_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u8 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ret = regmap_read(stmfx->map, STMFX_REG_SYS_CTRL, &sys_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * IDD and TS have priority in STMFX FW, so if IDD and TS are enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * ALTGPIO function is disabled by STMFX FW. If IDD or TS is enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * the number of aGPIO available decreases. To avoid GPIO management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * disturbance, abort IDD or TS function enable in this case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (((func & STMFX_FUNC_IDD) || (func & STMFX_FUNC_TS)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) (sys_ctrl & STMFX_REG_SYS_CTRL_ALTGPIO_EN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) dev_err(stmfx->dev, "ALTGPIO function already enabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* If TS is enabled, aGPIO[3:0] cannot be used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if ((func & STMFX_FUNC_ALTGPIO_LOW) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) (sys_ctrl & STMFX_REG_SYS_CTRL_TS_EN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_err(stmfx->dev, "TS in use, aGPIO[3:0] unavailable\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* If IDD is enabled, aGPIO[7:4] cannot be used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if ((func & STMFX_FUNC_ALTGPIO_HIGH) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) (sys_ctrl & STMFX_REG_SYS_CTRL_IDD_EN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) dev_err(stmfx->dev, "IDD in use, aGPIO[7:4] unavailable\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) mask = stmfx_func_to_mask(func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return regmap_update_bits(stmfx->map, STMFX_REG_SYS_CTRL, mask, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) EXPORT_SYMBOL_GPL(stmfx_function_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int stmfx_function_disable(struct stmfx *stmfx, u32 func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) u8 mask = stmfx_func_to_mask(func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return regmap_update_bits(stmfx->map, STMFX_REG_SYS_CTRL, mask, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) EXPORT_SYMBOL_GPL(stmfx_function_disable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static void stmfx_irq_bus_lock(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct stmfx *stmfx = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) mutex_lock(&stmfx->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static void stmfx_irq_bus_sync_unlock(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct stmfx *stmfx = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) regmap_write(stmfx->map, STMFX_REG_IRQ_SRC_EN, stmfx->irq_src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) mutex_unlock(&stmfx->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static void stmfx_irq_mask(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct stmfx *stmfx = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) stmfx->irq_src &= ~BIT(data->hwirq % 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static void stmfx_irq_unmask(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct stmfx *stmfx = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) stmfx->irq_src |= BIT(data->hwirq % 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static struct irq_chip stmfx_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .name = "stmfx-core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .irq_bus_lock = stmfx_irq_bus_lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .irq_bus_sync_unlock = stmfx_irq_bus_sync_unlock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .irq_mask = stmfx_irq_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .irq_unmask = stmfx_irq_unmask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static irqreturn_t stmfx_irq_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct stmfx *stmfx = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) unsigned long bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) u32 pending, ack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int n, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) ret = regmap_read(stmfx->map, STMFX_REG_IRQ_PENDING, &pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * There is no ACK for GPIO, MFX_REG_IRQ_PENDING_GPIO is a logical OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * of MFX_REG_IRQ_GPI _PENDING1/_PENDING2/_PENDING3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) ack = pending & ~BIT(STMFX_REG_IRQ_SRC_EN_GPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (ack) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ret = regmap_write(stmfx->map, STMFX_REG_IRQ_ACK, ack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) bits = pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) for_each_set_bit(n, &bits, STMFX_REG_IRQ_SRC_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) handle_nested_irq(irq_find_mapping(stmfx->irq_domain, n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static int stmfx_irq_map(struct irq_domain *d, unsigned int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) irq_hw_number_t hwirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) irq_set_chip_data(virq, d->host_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) irq_set_chip_and_handler(virq, &stmfx_irq_chip, handle_simple_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) irq_set_nested_thread(virq, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) irq_set_noprobe(virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static void stmfx_irq_unmap(struct irq_domain *d, unsigned int virq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) irq_set_chip_and_handler(virq, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) irq_set_chip_data(virq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static const struct irq_domain_ops stmfx_irq_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .map = stmfx_irq_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .unmap = stmfx_irq_unmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static void stmfx_irq_exit(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) struct stmfx *stmfx = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) int hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) for (hwirq = 0; hwirq < STMFX_REG_IRQ_SRC_MAX; hwirq++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) irq_dispose_mapping(irq_find_mapping(stmfx->irq_domain, hwirq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) irq_domain_remove(stmfx->irq_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static int stmfx_irq_init(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct stmfx *stmfx = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) u32 irqoutpin = 0, irqtrigger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) stmfx->irq_domain = irq_domain_add_simple(stmfx->dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) STMFX_REG_IRQ_SRC_MAX, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) &stmfx_irq_ops, stmfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (!stmfx->irq_domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dev_err(stmfx->dev, "Failed to create IRQ domain\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (!of_property_read_bool(stmfx->dev->of_node, "drive-open-drain"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) irqoutpin |= STMFX_REG_IRQ_OUT_PIN_TYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) irqtrigger = irq_get_trigger_type(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if ((irqtrigger & IRQ_TYPE_EDGE_RISING) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) (irqtrigger & IRQ_TYPE_LEVEL_HIGH))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) irqoutpin |= STMFX_REG_IRQ_OUT_PIN_POL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ret = regmap_write(stmfx->map, STMFX_REG_IRQ_OUT_PIN, irqoutpin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) goto irq_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ret = devm_request_threaded_irq(stmfx->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) NULL, stmfx_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) irqtrigger | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) "stmfx", stmfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) goto irq_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) stmfx->irq = client->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) irq_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) stmfx_irq_exit(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int stmfx_chip_reset(struct stmfx *stmfx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ret = regmap_write(stmfx->map, STMFX_REG_SYS_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) STMFX_REG_SYS_CTRL_SWRST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) msleep(STMFX_BOOT_TIME_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static int stmfx_chip_init(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct stmfx *stmfx = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u32 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) u8 version[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) stmfx->vdd = devm_regulator_get_optional(&client->dev, "vdd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ret = PTR_ERR_OR_ZERO(stmfx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (ret == -ENODEV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) stmfx->vdd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return dev_err_probe(&client->dev, ret, "Failed to get VDD regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (stmfx->vdd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) ret = regulator_enable(stmfx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) dev_err(&client->dev, "VDD enable failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ret = regmap_read(stmfx->map, STMFX_REG_CHIP_ID, &id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) dev_err(&client->dev, "Error reading chip ID: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * Check that ID is the complement of the I2C address:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * STMFX I2C address follows the 7-bit format (MSB), that's why
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * client->addr is shifted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * STMFX_I2C_ADDR| STMFX | Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * input pin | I2C device address | I2C device address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) *---------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * 0 | b: 1000 010x h:0x84 | 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * 1 | b: 1000 011x h:0x86 | 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (FIELD_GET(STMFX_REG_CHIP_ID_MASK, ~id) != (client->addr << 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) dev_err(&client->dev, "Unknown chip ID: %#x\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ret = regmap_bulk_read(stmfx->map, STMFX_REG_FW_VERSION_MSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) version, ARRAY_SIZE(version));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) dev_err(&client->dev, "Error reading FW version: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) dev_info(&client->dev, "STMFX id: %#x, fw version: %x.%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) id, version[0], version[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ret = stmfx_chip_reset(stmfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) dev_err(&client->dev, "Failed to reset chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (stmfx->vdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return regulator_disable(stmfx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int stmfx_chip_exit(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct stmfx *stmfx = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) regmap_write(stmfx->map, STMFX_REG_IRQ_SRC_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) regmap_write(stmfx->map, STMFX_REG_SYS_CTRL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (stmfx->vdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return regulator_disable(stmfx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int stmfx_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct stmfx *stmfx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) stmfx = devm_kzalloc(dev, sizeof(*stmfx), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (!stmfx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) i2c_set_clientdata(client, stmfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) stmfx->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) stmfx->map = devm_regmap_init_i2c(client, &stmfx_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (IS_ERR(stmfx->map)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) ret = PTR_ERR(stmfx->map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) dev_err(dev, "Failed to allocate register map: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) mutex_init(&stmfx->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) ret = stmfx_chip_init(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (ret == -ETIMEDOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (client->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dev_err(dev, "Failed to get IRQ: %d\n", client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ret = client->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) goto err_chip_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) ret = stmfx_irq_init(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) goto err_chip_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) stmfx_cells, ARRAY_SIZE(stmfx_cells), NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 0, stmfx->irq_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) goto err_irq_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) err_irq_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) stmfx_irq_exit(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) err_chip_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) stmfx_chip_exit(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static int stmfx_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) stmfx_irq_exit(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return stmfx_chip_exit(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static int stmfx_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct stmfx *stmfx = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) ret = regmap_raw_read(stmfx->map, STMFX_REG_SYS_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) &stmfx->bkp_sysctrl, sizeof(stmfx->bkp_sysctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) ret = regmap_raw_read(stmfx->map, STMFX_REG_IRQ_OUT_PIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) &stmfx->bkp_irqoutpin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) sizeof(stmfx->bkp_irqoutpin));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) disable_irq(stmfx->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (stmfx->vdd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return regulator_disable(stmfx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static int stmfx_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) struct stmfx *stmfx = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (stmfx->vdd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) ret = regulator_enable(stmfx->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) dev_err(stmfx->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) "VDD enable failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) /* Reset STMFX - supply has been stopped during suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) ret = stmfx_chip_reset(stmfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) dev_err(stmfx->dev, "Failed to reset chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) ret = regmap_raw_write(stmfx->map, STMFX_REG_SYS_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) &stmfx->bkp_sysctrl, sizeof(stmfx->bkp_sysctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) ret = regmap_raw_write(stmfx->map, STMFX_REG_IRQ_OUT_PIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) &stmfx->bkp_irqoutpin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) sizeof(stmfx->bkp_irqoutpin));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) ret = regmap_raw_write(stmfx->map, STMFX_REG_IRQ_SRC_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) &stmfx->irq_src, sizeof(stmfx->irq_src));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) enable_irq(stmfx->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) static SIMPLE_DEV_PM_OPS(stmfx_dev_pm_ops, stmfx_suspend, stmfx_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static const struct of_device_id stmfx_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) { .compatible = "st,stmfx-0300", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) MODULE_DEVICE_TABLE(of, stmfx_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static struct i2c_driver stmfx_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .name = "stmfx-core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) .of_match_table = of_match_ptr(stmfx_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .pm = &stmfx_dev_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .probe = stmfx_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .remove = stmfx_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) module_i2c_driver(stmfx_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) MODULE_DESCRIPTION("STMFX core driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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