^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (C) 2018 ROHM Semiconductors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // ROHM BD71837MWV and BD71847MWV PMIC driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // Datasheet for BD71837MWV available from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/gpio_keys.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mfd/rohm-bd718x7.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static struct gpio_keys_button button = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .code = KEY_POWER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .gpio = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .type = EV_KEY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static struct gpio_keys_platform_data bd718xx_powerkey_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .buttons = &button,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .nbuttons = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .name = "bd718xx-pwrkey",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static struct mfd_cell bd71837_mfd_cells[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .name = "gpio-keys",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .platform_data = &bd718xx_powerkey_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .pdata_size = sizeof(bd718xx_powerkey_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) { .name = "bd71837-clk", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) { .name = "bd71837-pmic", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static struct mfd_cell bd71847_mfd_cells[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .name = "gpio-keys",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .platform_data = &bd718xx_powerkey_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .pdata_size = sizeof(bd718xx_powerkey_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { .name = "bd71847-clk", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { .name = "bd71847-pmic", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static const struct regmap_irq bd718xx_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) REGMAP_IRQ_REG(BD718XX_INT_SWRST, 0, BD718XX_INT_SWRST_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) REGMAP_IRQ_REG(BD718XX_INT_PWRBTN_S, 0, BD718XX_INT_PWRBTN_S_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) REGMAP_IRQ_REG(BD718XX_INT_PWRBTN_L, 0, BD718XX_INT_PWRBTN_L_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) REGMAP_IRQ_REG(BD718XX_INT_PWRBTN, 0, BD718XX_INT_PWRBTN_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) REGMAP_IRQ_REG(BD718XX_INT_WDOG, 0, BD718XX_INT_WDOG_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) REGMAP_IRQ_REG(BD718XX_INT_ON_REQ, 0, BD718XX_INT_ON_REQ_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) REGMAP_IRQ_REG(BD718XX_INT_STBY_REQ, 0, BD718XX_INT_STBY_REQ_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static struct regmap_irq_chip bd718xx_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .name = "bd718xx-irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .irqs = bd718xx_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .num_irqs = ARRAY_SIZE(bd718xx_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .num_regs = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .irq_reg_stride = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .status_base = BD718XX_REG_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .mask_base = BD718XX_REG_MIRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .ack_base = BD718XX_REG_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .init_ack_masked = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .mask_invert = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static const struct regmap_range pmic_status_range = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .range_min = BD718XX_REG_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .range_max = BD718XX_REG_POW_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static const struct regmap_access_table volatile_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .yes_ranges = &pmic_status_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .n_yes_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static const struct regmap_config bd718xx_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .volatile_table = &volatile_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .max_register = BD718XX_MAX_REGISTER - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static int bd718xx_init_press_duration(struct bd718xx *bd718xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct device* dev = bd718xx->chip.dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u32 short_press_ms, long_press_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u32 short_press_value, long_press_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) ret = of_property_read_u32(dev->of_node, "rohm,short-press-ms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) &short_press_ms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) short_press_value = min(15u, (short_press_ms + 250) / 500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ret = regmap_update_bits(bd718xx->chip.regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) BD718XX_REG_PWRONCONFIG0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) BD718XX_PWRBTN_PRESS_DURATION_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) short_press_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) dev_err(dev, "Failed to init pwron short press\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ret = of_property_read_u32(dev->of_node, "rohm,long-press-ms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) &long_press_ms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) long_press_value = min(15u, (long_press_ms + 500) / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = regmap_update_bits(bd718xx->chip.regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) BD718XX_REG_PWRONCONFIG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) BD718XX_PWRBTN_PRESS_DURATION_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) long_press_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) dev_err(dev, "Failed to init pwron long press\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int bd718xx_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct bd718xx *bd718xx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) unsigned int chip_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct mfd_cell *mfd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int cells;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (!i2c->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) dev_err(&i2c->dev, "No IRQ configured\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) bd718xx = devm_kzalloc(&i2c->dev, sizeof(struct bd718xx), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (!bd718xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) bd718xx->chip_irq = i2c->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) chip_type = (unsigned int)(uintptr_t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) of_device_get_match_data(&i2c->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) switch (chip_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) case ROHM_CHIP_TYPE_BD71837:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) mfd = bd71837_mfd_cells;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) cells = ARRAY_SIZE(bd71837_mfd_cells);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) case ROHM_CHIP_TYPE_BD71847:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) mfd = bd71847_mfd_cells;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) cells = ARRAY_SIZE(bd71847_mfd_cells);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) dev_err(&i2c->dev, "Unknown device type");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) bd718xx->chip.dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) dev_set_drvdata(&i2c->dev, bd718xx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) bd718xx->chip.regmap = devm_regmap_init_i2c(i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) &bd718xx_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (IS_ERR(bd718xx->chip.regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) dev_err(&i2c->dev, "regmap initialization failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return PTR_ERR(bd718xx->chip.regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ret = devm_regmap_add_irq_chip(&i2c->dev, bd718xx->chip.regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) bd718xx->chip_irq, IRQF_ONESHOT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) &bd718xx_irq_chip, &bd718xx->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) dev_err(&i2c->dev, "Failed to add irq_chip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) ret = bd718xx_init_press_duration(bd718xx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) ret = regmap_irq_get_virq(bd718xx->irq_data, BD718XX_INT_PWRBTN_S);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) dev_err(&i2c->dev, "Failed to get the IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) button.irq = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ret = devm_mfd_add_devices(bd718xx->chip.dev, PLATFORM_DEVID_AUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) mfd, cells, NULL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) regmap_irq_get_domain(bd718xx->irq_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) dev_err(&i2c->dev, "Failed to create subdevices\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const struct of_device_id bd718xx_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .compatible = "rohm,bd71837",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .data = (void *)ROHM_CHIP_TYPE_BD71837,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .compatible = "rohm,bd71847",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .data = (void *)ROHM_CHIP_TYPE_BD71847,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .compatible = "rohm,bd71850",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .data = (void *)ROHM_CHIP_TYPE_BD71847,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MODULE_DEVICE_TABLE(of, bd718xx_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static struct i2c_driver bd718xx_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .name = "rohm-bd718x7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .of_match_table = bd718xx_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .probe = bd718xx_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static int __init bd718xx_i2c_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return i2c_add_driver(&bd718xx_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* Initialise early so consumer devices can complete system boot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) subsys_initcall(bd718xx_i2c_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static void __exit bd718xx_i2c_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) i2c_del_driver(&bd718xx_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) module_exit(bd718xx_i2c_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) MODULE_DESCRIPTION("ROHM BD71837/BD71847 Power Management IC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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