^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SPI access driver for rockchip rk806
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Xu Shengfei <xsf@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/mfd/rk806.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static const struct of_device_id rk806_spi_of_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) { .compatible = "rockchip,rk806", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MODULE_DEVICE_TABLE(of, rk806_spi_of_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static int rk806_spi_write(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) char addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) const char *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) size_t data_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) char write_cmd = RK806_CMD_WRITE | (data_len - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) char addrh = RK806_REG_H;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct spi_message m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int buffer, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct spi_transfer write_cmd_packet = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .tx_buf = &buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .len = sizeof(buffer),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) buffer = write_cmd | (addr << 8) | (addrh << 16) | (*data << 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) spi_message_init(&m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) spi_message_add_tail(&write_cmd_packet, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ret = spi_sync(spi, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int rk806_spi_bus_write(void *context, const void *data, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct device *dev = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) char buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (count < 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) dev_err(&spi->dev, "regmap write err!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) memcpy(buf, data, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return rk806_spi_write(spi, buf[0], &buf[1], (count - 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int rk806_spi_bus_read(void *context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) const void *reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) size_t reg_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) size_t val_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct device *dev = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) char addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) char txbuf[3] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (reg_size != sizeof(char) || val_size < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Copy address to read from into first element of SPI buffer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) memcpy(&addr, reg, sizeof(char));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) txbuf[0] = RK806_CMD_READ | (val_size - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) txbuf[1] = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) txbuf[2] = RK806_REG_H;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return spi_write_then_read(spi, txbuf, 3, val, val_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static const struct regmap_bus rk806_regmap_bus_spi = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .write = rk806_spi_bus_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .read = rk806_spi_bus_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int rk806_spi_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct rk806 *rk806;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) rk806 = devm_kzalloc(&spi->dev, sizeof(*rk806), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (!rk806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) spi_set_drvdata(spi, rk806);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) rk806->dev = &spi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) rk806->irq = spi->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) rk806->regmap = devm_regmap_init(&spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) &rk806_regmap_bus_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) &spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) &rk806_regmap_config_spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (IS_ERR(rk806->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) dev_err(rk806->dev, "Failed to initialize register map\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return PTR_ERR(rk806->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return rk806_device_init(rk806);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static int rk806_spi_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct rk806 *rk806 = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return rk806_device_exit(rk806);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const struct spi_device_id rk806_spi_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { "rk806", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MODULE_DEVICE_TABLE(spi, rk806_spi_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static struct spi_driver rk806_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .name = "rk806",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .of_match_table = rk806_spi_of_match_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .probe = rk806_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .remove = rk806_spi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .id_table = rk806_spi_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) module_spi_driver(rk806_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MODULE_AUTHOR("Xu Shengfei <xsf@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MODULE_DESCRIPTION("RK806 SPI Interface Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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