Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright 2009-2010 Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * loosely based on an earlier driver that has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/mfd/mc13xxx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include "mc13xxx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) static const struct spi_device_id mc13xxx_device_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		.name = "mc13783",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 		.driver_data = (kernel_ulong_t)&mc13xxx_variant_mc13783,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		.name = "mc13892",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		.driver_data = (kernel_ulong_t)&mc13xxx_variant_mc13892,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		.name = "mc34708",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		.driver_data = (kernel_ulong_t)&mc13xxx_variant_mc34708,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		/* sentinel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) MODULE_DEVICE_TABLE(spi, mc13xxx_device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static const struct of_device_id mc13xxx_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	{ .compatible = "fsl,mc13783", .data = &mc13xxx_variant_mc13783, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	{ .compatible = "fsl,mc13892", .data = &mc13xxx_variant_mc13892, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	{ .compatible = "fsl,mc34708", .data = &mc13xxx_variant_mc34708, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static const struct regmap_config mc13xxx_regmap_spi_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	.reg_bits = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	.pad_bits = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	.val_bits = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	.write_flag_mask = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	.max_register = MC13XXX_NUMREGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	.cache_type = REGCACHE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	.use_single_read = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	.use_single_write = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static int mc13xxx_spi_read(void *context, const void *reg, size_t reg_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 				void *val, size_t val_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	unsigned char w[4] = { *((unsigned char *) reg), 0, 0, 0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	unsigned char r[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	unsigned char *p = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct device *dev = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct spi_transfer t = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		.tx_buf = w,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		.rx_buf = r,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		.len = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct spi_message m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (val_size != 3 || reg_size != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	spi_message_init(&m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	spi_message_add_tail(&t, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	ret = spi_sync(spi, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	memcpy(p, &r[1], 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static int mc13xxx_spi_write(void *context, const void *data, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	struct device *dev = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	const char *reg = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (count != 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	/* include errata fix for spi audio problems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (*reg == MC13783_AUDIO_CODEC || *reg == MC13783_AUDIO_DAC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		spi_write(spi, data, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	return spi_write(spi, data, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)  * We cannot use regmap-spi generic bus implementation here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)  * The MC13783 chip will get corrupted if CS signal is deasserted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)  * and on i.Mx31 SoC (the target SoC for MC13783 PMIC) the SPI controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)  * has the following errata (DSPhl22960):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  * "The CSPI negates SS when the FIFO becomes empty with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  * SSCTL= 0. Software cannot guarantee that the FIFO will not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  * drain because of higher priority interrupts and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  * non-realtime characteristics of the operating system. As a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)  * result, the SS will negate before all of the data has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)  * transferred to/from the peripheral."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)  * We workaround this by accessing the SPI controller with a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)  * single transfert.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static struct regmap_bus regmap_mc13xxx_bus = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	.write = mc13xxx_spi_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	.read = mc13xxx_spi_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int mc13xxx_spi_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	struct mc13xxx *mc13xxx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	mc13xxx = devm_kzalloc(&spi->dev, sizeof(*mc13xxx), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	if (!mc13xxx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	dev_set_drvdata(&spi->dev, mc13xxx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	mc13xxx->irq = spi->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	spi->max_speed_hz = spi->max_speed_hz ? : 26000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	ret = spi_setup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	mc13xxx->regmap = devm_regmap_init(&spi->dev, &regmap_mc13xxx_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 					   &spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 					   &mc13xxx_regmap_spi_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if (IS_ERR(mc13xxx->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		ret = PTR_ERR(mc13xxx->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		dev_err(&spi->dev, "Failed to initialize regmap: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	if (spi->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		const struct of_device_id *of_id =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			of_match_device(mc13xxx_dt_ids, &spi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		mc13xxx->variant = of_id->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		const struct spi_device_id *id_entry = spi_get_device_id(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		mc13xxx->variant = (void *)id_entry->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	return mc13xxx_common_init(&spi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static int mc13xxx_spi_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	return mc13xxx_common_exit(&spi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static struct spi_driver mc13xxx_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.id_table = mc13xxx_device_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		.name = "mc13xxx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		.of_match_table = mc13xxx_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	.probe = mc13xxx_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	.remove = mc13xxx_spi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static int __init mc13xxx_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	return spi_register_driver(&mc13xxx_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) subsys_initcall(mc13xxx_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static void __exit mc13xxx_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	spi_unregister_driver(&mc13xxx_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) module_exit(mc13xxx_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) MODULE_LICENSE("GPL v2");