Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Maxim max96755f MFD driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2022 Rockchip Electronics Co. Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/i2c-mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/mfd/max96755f.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) struct max96755f {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	struct i2c_mux_core *muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	struct gpio_desc *enable_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	struct gpio_desc *reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	struct regulator *supply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct gpio_desc *pwdnb_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct gpio_desc *lock_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	bool split_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) static const struct mfd_cell max96755f_devs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		.name = "max96755f-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		.of_compatible = "maxim,max96755f-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		.name = "max96755f-bridge",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		.of_compatible = "maxim,max96755f-bridge",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static bool max96755f_volatile_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	case 0x0002:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	case 0x0010:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	case 0x0013:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	case 0x0053:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	case 0x0057:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	case 0x02be ... 0x02fc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	case 0x0311:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	case 0x032a:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	case 0x0330 ... 0x0331:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	case 0x0385 ... 0x0387:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	case 0x03a4 ... 0x03ae:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static const struct regmap_config max96755f_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	.name = "max96755f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	.reg_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	.max_register = 0x1b17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	.volatile_reg = max96755f_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static int max96755f_select(struct i2c_mux_core *muxc, u32 chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct max96755f *max96755f = dev_get_drvdata(muxc->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u32 link_cfg, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	regmap_update_bits(max96755f->regmap, 0x0001, DIS_REM_CC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			   FIELD_PREP(DIS_REM_CC, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (!max96755f->split_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	regmap_read(max96755f->regmap, 0x0010, &link_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	if ((link_cfg & LINK_CFG) == SPLITTER_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	if (chan == 0 && (link_cfg & LINK_CFG) != LINKA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		regmap_update_bits(max96755f->regmap, 0x0010,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 				   RESET_ONESHOT | AUTO_LINK | LINK_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 				   FIELD_PREP(RESET_ONESHOT, 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 				   FIELD_PREP(AUTO_LINK, 0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 				   FIELD_PREP(LINK_CFG, LINKA));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	} else if (chan == 1 && (link_cfg & LINK_CFG) != LINKB) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		regmap_update_bits(max96755f->regmap, 0x0010,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 				   RESET_ONESHOT | AUTO_LINK | LINK_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				   FIELD_PREP(RESET_ONESHOT, 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 				   FIELD_PREP(AUTO_LINK, 0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 				   FIELD_PREP(LINK_CFG, LINKB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	ret = regmap_read_poll_timeout(max96755f->regmap, 0x0013, val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 				       val & LOCKED, 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				       50 * USEC_PER_MSEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		dev_err(max96755f->dev, "GMSL2 link lock timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int max96755f_deselect(struct i2c_mux_core *muxc, u32 chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct max96755f *max96755f = dev_get_drvdata(muxc->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	regmap_update_bits(max96755f->regmap, 0x0001, DIS_REM_CC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			   FIELD_PREP(DIS_REM_CC, 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static void max96755f_power_off(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct max96755f *max96755f = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	if (max96755f->reset_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		gpiod_direction_output(max96755f->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	if (max96755f->enable_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		gpiod_direction_output(max96755f->enable_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (max96755f->supply)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		regulator_disable(max96755f->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int max96755f_power_on(struct max96755f *max96755f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if (max96755f->supply) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		ret = regulator_enable(max96755f->supply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	if (max96755f->enable_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		gpiod_direction_output(max96755f->enable_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if (max96755f->reset_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		gpiod_direction_output(max96755f->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		gpiod_direction_output(max96755f->reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		gpiod_direction_output(max96755f->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	regmap_update_bits(max96755f->regmap, 0x0001, DIS_REM_CC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			   FIELD_PREP(DIS_REM_CC, 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static ssize_t line_fault_monitor_show(struct device *device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 				       struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 				       char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	struct max96755f *max96755f = dev_get_drvdata(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	u32 pu_lf, lf, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	regmap_read(max96755f->regmap, 0x0005, &pu_lf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	 * Line-fault status of wire connected to LMN0/1 pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	 * 0b000: Short to battery
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	 * 0b001: Short to GND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	 * 0b010: Normal operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	 * 0b011: Line open
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	 * 0b1XX: Line-to-line short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	regmap_read(max96755f->regmap, 0x0026, &lf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	if (FIELD_GET(PU_LF0, pu_lf)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		status = (lf & LF_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		return sprintf(buf, "%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	if (FIELD_GET(PU_LF1, pu_lf)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		status = (lf & LF_1) >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		return sprintf(buf, "%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	return sprintf(buf, "%d\n", -EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static DEVICE_ATTR_RO(line_fault_monitor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static struct attribute *max96755f_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	&dev_attr_line_fault_monitor.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static const struct attribute_group max96755f_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	.attrs = max96755f_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int max96755f_sysfs_add(struct max96755f *max96755f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	struct device *dev = max96755f->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	u32 ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	ret = of_property_read_u32(dev->of_node, "line-fault-monitor", &ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		regmap_update_bits(max96755f->regmap, 0x0005,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 				   PU_LF0 << ch, PU_LF0 << ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	ret = devm_device_add_group(dev, &max96755f_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		dev_err(dev, "failed to register sysfs. err: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static int max96755f_i2c_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	struct device_node *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	struct max96755f *max96755f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	unsigned int nr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	bool idle_disc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	for_each_available_child_of_node(dev->of_node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		if (!of_find_property(child, "reg", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		nr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	max96755f = devm_kzalloc(dev, sizeof(*max96755f), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if (!max96755f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	idle_disc = device_property_read_bool(dev, "i2c-mux-idle-disconnect");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	max96755f->muxc = i2c_mux_alloc(client->adapter, dev, nr, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 					I2C_MUX_LOCKED, max96755f_select,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 					idle_disc ? max96755f_deselect : NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (!max96755f->muxc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	if (nr == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		max96755f->split_mode = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	max96755f->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	i2c_set_clientdata(client, max96755f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	max96755f->supply = devm_regulator_get(dev, "power");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	if (IS_ERR(max96755f->supply))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		return dev_err_probe(dev, PTR_ERR(max96755f->supply),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 				     "failed to get power supply\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	max96755f->lock_gpio = devm_gpiod_get_optional(dev, "lock", GPIOD_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	if (IS_ERR(max96755f->lock_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		return dev_err_probe(dev, PTR_ERR(max96755f->lock_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 				     "failed to get lock GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	max96755f->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_ASIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	if (IS_ERR(max96755f->enable_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		return dev_err_probe(dev, PTR_ERR(max96755f->enable_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 				     "failed to get enable GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	max96755f->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if (IS_ERR(max96755f->reset_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		return dev_err_probe(dev, PTR_ERR(max96755f->reset_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 				     "failed to get reset GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	max96755f->regmap = devm_regmap_init_i2c(client, &max96755f_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	if (IS_ERR(max96755f->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		return dev_err_probe(dev, PTR_ERR(max96755f->regmap),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 				     "failed to initialize regmap");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	ret = max96755f_power_on(max96755f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	ret = devm_add_action_or_reset(dev, max96755f_power_off, max96755f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, max96755f_devs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 				   ARRAY_SIZE(max96755f_devs), NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	for_each_available_child_of_node(dev->of_node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		if (of_property_read_u32(child, "reg", &nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		ret = i2c_mux_add_adapter(max96755f->muxc, 0, nr, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 			i2c_mux_del_adapters(max96755f->muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	ret = max96755f_sysfs_add(max96755f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		return dev_err_probe(dev, ret, "failed to registers sysfs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static int max96755f_i2c_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	struct max96755f *max96755f = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	i2c_mux_del_adapters(max96755f->muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static void max96755f_i2c_shutdown(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	struct max96755f *max96755f = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	max96755f_power_off(max96755f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static int __maybe_unused max96755f_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	struct max96755f *max96755f = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	regcache_mark_dirty(max96755f->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	regcache_cache_only(max96755f->regmap, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static int __maybe_unused max96755f_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	struct max96755f *max96755f = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	regcache_cache_only(max96755f->regmap, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	regcache_sync(max96755f->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static SIMPLE_DEV_PM_OPS(max96755f_pm_ops, max96755f_suspend, max96755f_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static const struct of_device_id max96755f_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	{ .compatible = "maxim,max96755f", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) MODULE_DEVICE_TABLE(of, max96755f_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static struct i2c_driver max96755f_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		.name = "max96755f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		.of_match_table = max96755f_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		.pm = &max96755f_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	.probe_new = max96755f_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	.remove = max96755f_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	.shutdown = max96755f_i2c_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) module_i2c_driver(max96755f_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) MODULE_AUTHOR("Guochun Huang<hero.huang@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) MODULE_DESCRIPTION("Maxim max96755f MFD driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) MODULE_LICENSE("GPL");