^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // max8997.c - mfd core driver for the Maxim 8966 and 8997
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (C) 2011 Samsung Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // MyungJoo Ham <myungjoo.ham@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // This driver is based on max8998.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/max8997.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mfd/max8997-private.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define I2C_ADDR_PMIC (0xCC >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define I2C_ADDR_MUIC (0x4A >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define I2C_ADDR_BATTERY (0x6C >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define I2C_ADDR_RTC (0x0C >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define I2C_ADDR_HAPTIC (0x90 >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static const struct mfd_cell max8997_devs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) { .name = "max8997-pmic", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) { .name = "max8997-rtc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { .name = "max8997-battery", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) { .name = "max8997-haptic", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) { .name = "max8997-muic", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) { .name = "max8997-led", .id = 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) { .name = "max8997-led", .id = 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static const struct of_device_id max8997_pmic_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) { .compatible = "maxim,max8997-pmic", .data = (void *)TYPE_MAX8997 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int max8997_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) mutex_lock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) ret = i2c_smbus_read_byte_data(i2c, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) mutex_unlock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ret &= 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) *dest = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) EXPORT_SYMBOL_GPL(max8997_read_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int max8997_bulk_read(struct i2c_client *i2c, u8 reg, int count, u8 *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) mutex_lock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ret = i2c_smbus_read_i2c_block_data(i2c, reg, count, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) mutex_unlock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) EXPORT_SYMBOL_GPL(max8997_bulk_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int max8997_write_reg(struct i2c_client *i2c, u8 reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) mutex_lock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ret = i2c_smbus_write_byte_data(i2c, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) mutex_unlock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) EXPORT_SYMBOL_GPL(max8997_write_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int max8997_bulk_write(struct i2c_client *i2c, u8 reg, int count, u8 *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) mutex_lock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ret = i2c_smbus_write_i2c_block_data(i2c, reg, count, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) mutex_unlock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) EXPORT_SYMBOL_GPL(max8997_bulk_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int max8997_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) mutex_lock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ret = i2c_smbus_read_byte_data(i2c, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u8 old_val = ret & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u8 new_val = (val & mask) | (old_val & (~mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ret = i2c_smbus_write_byte_data(i2c, reg, new_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) mutex_unlock(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) EXPORT_SYMBOL_GPL(max8997_update_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * Only the common platform data elements for max8997 are parsed here from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * device tree. Other sub-modules of max8997 such as pmic, rtc and others have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * to parse their own platform data elements from device tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * The max8997 platform data structure is instantiated here and the drivers for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * the sub-modules need not instantiate another instance while parsing their
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * platform data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static struct max8997_platform_data *max8997_i2c_parse_dt_pdata(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct max8997_platform_data *pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (!pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) pd->ono = irq_of_parse_and_map(dev->of_node, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static inline unsigned long max8997_i2c_get_driver_data(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (IS_ENABLED(CONFIG_OF) && i2c->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) match = of_match_node(max8997_pmic_dt_match, i2c->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return (unsigned long)match->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int max8997_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct max8997_dev *max8997;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct max8997_platform_data *pdata = dev_get_platdata(&i2c->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) max8997 = devm_kzalloc(&i2c->dev, sizeof(struct max8997_dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (max8997 == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) i2c_set_clientdata(i2c, max8997);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) max8997->dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) max8997->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) max8997->type = max8997_i2c_get_driver_data(i2c, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) max8997->irq = i2c->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (IS_ENABLED(CONFIG_OF) && max8997->dev->of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) pdata = max8997_i2c_parse_dt_pdata(max8997->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (IS_ERR(pdata))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return PTR_ERR(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) max8997->pdata = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) max8997->ono = pdata->ono;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) mutex_init(&max8997->iolock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) max8997->rtc = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_RTC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (IS_ERR(max8997->rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) dev_err(max8997->dev, "Failed to allocate I2C device for RTC\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return PTR_ERR(max8997->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) i2c_set_clientdata(max8997->rtc, max8997);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) max8997->haptic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_HAPTIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (IS_ERR(max8997->haptic)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) dev_err(max8997->dev, "Failed to allocate I2C device for Haptic\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ret = PTR_ERR(max8997->haptic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) goto err_i2c_haptic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) i2c_set_clientdata(max8997->haptic, max8997);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) max8997->muic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_MUIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (IS_ERR(max8997->muic)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) dev_err(max8997->dev, "Failed to allocate I2C device for MUIC\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) ret = PTR_ERR(max8997->muic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) goto err_i2c_muic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) i2c_set_clientdata(max8997->muic, max8997);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) pm_runtime_set_active(max8997->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) max8997_irq_init(max8997);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ret = mfd_add_devices(max8997->dev, -1, max8997_devs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ARRAY_SIZE(max8997_devs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) dev_err(max8997->dev, "failed to add MFD devices %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) goto err_mfd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * TODO: enable others (flash, muic, rtc, battery, ...) and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * check the return value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* MAX8997 has a power button input. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) device_init_wakeup(max8997->dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) err_mfd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) mfd_remove_devices(max8997->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) i2c_unregister_device(max8997->muic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) err_i2c_muic:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) i2c_unregister_device(max8997->haptic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) err_i2c_haptic:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) i2c_unregister_device(max8997->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static const struct i2c_device_id max8997_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) { "max8997", TYPE_MAX8997 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) { "max8966", TYPE_MAX8966 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static u8 max8997_dumpaddr_pmic[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) MAX8997_REG_INT1MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) MAX8997_REG_INT2MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) MAX8997_REG_INT3MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) MAX8997_REG_INT4MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) MAX8997_REG_MAINCON1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) MAX8997_REG_MAINCON2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) MAX8997_REG_BUCKRAMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) MAX8997_REG_BUCK1CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) MAX8997_REG_BUCK1DVS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MAX8997_REG_BUCK1DVS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MAX8997_REG_BUCK1DVS3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MAX8997_REG_BUCK1DVS4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MAX8997_REG_BUCK1DVS5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) MAX8997_REG_BUCK1DVS6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MAX8997_REG_BUCK1DVS7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MAX8997_REG_BUCK1DVS8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) MAX8997_REG_BUCK2CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MAX8997_REG_BUCK2DVS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) MAX8997_REG_BUCK2DVS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MAX8997_REG_BUCK2DVS3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MAX8997_REG_BUCK2DVS4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) MAX8997_REG_BUCK2DVS5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) MAX8997_REG_BUCK2DVS6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) MAX8997_REG_BUCK2DVS7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) MAX8997_REG_BUCK2DVS8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) MAX8997_REG_BUCK3CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) MAX8997_REG_BUCK3DVS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) MAX8997_REG_BUCK4CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) MAX8997_REG_BUCK4DVS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) MAX8997_REG_BUCK5CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) MAX8997_REG_BUCK5DVS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MAX8997_REG_BUCK5DVS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MAX8997_REG_BUCK5DVS3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MAX8997_REG_BUCK5DVS4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MAX8997_REG_BUCK5DVS5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MAX8997_REG_BUCK5DVS6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MAX8997_REG_BUCK5DVS7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) MAX8997_REG_BUCK5DVS8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) MAX8997_REG_BUCK6CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) MAX8997_REG_BUCK6BPSKIPCTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) MAX8997_REG_BUCK7CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) MAX8997_REG_BUCK7DVS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) MAX8997_REG_LDO1CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) MAX8997_REG_LDO2CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) MAX8997_REG_LDO3CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) MAX8997_REG_LDO4CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) MAX8997_REG_LDO5CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) MAX8997_REG_LDO6CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) MAX8997_REG_LDO7CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) MAX8997_REG_LDO8CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) MAX8997_REG_LDO9CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) MAX8997_REG_LDO10CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MAX8997_REG_LDO11CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) MAX8997_REG_LDO12CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MAX8997_REG_LDO13CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MAX8997_REG_LDO14CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MAX8997_REG_LDO15CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) MAX8997_REG_LDO16CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) MAX8997_REG_LDO17CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MAX8997_REG_LDO18CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) MAX8997_REG_LDO21CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MAX8997_REG_MBCCTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MAX8997_REG_MBCCTRL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) MAX8997_REG_MBCCTRL3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) MAX8997_REG_MBCCTRL4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MAX8997_REG_MBCCTRL5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MAX8997_REG_MBCCTRL6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MAX8997_REG_OTPCGHCVS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) MAX8997_REG_SAFEOUTCTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) MAX8997_REG_LBCNFG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) MAX8997_REG_LBCNFG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) MAX8997_REG_BBCCTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) MAX8997_REG_FLASH1_CUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) MAX8997_REG_FLASH2_CUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) MAX8997_REG_MOVIE_CUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) MAX8997_REG_GSMB_CUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) MAX8997_REG_BOOST_CNTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) MAX8997_REG_LEN_CNTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) MAX8997_REG_FLASH_CNTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) MAX8997_REG_WDT_CNTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) MAX8997_REG_MAXFLASH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MAX8997_REG_MAXFLASH2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MAX8997_REG_FLASHSTATUSMASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MAX8997_REG_GPIOCNTL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) MAX8997_REG_GPIOCNTL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MAX8997_REG_GPIOCNTL3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MAX8997_REG_GPIOCNTL4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) MAX8997_REG_GPIOCNTL5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) MAX8997_REG_GPIOCNTL6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) MAX8997_REG_GPIOCNTL7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) MAX8997_REG_GPIOCNTL8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) MAX8997_REG_GPIOCNTL9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) MAX8997_REG_GPIOCNTL10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) MAX8997_REG_GPIOCNTL11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) MAX8997_REG_GPIOCNTL12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MAX8997_REG_LDO1CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) MAX8997_REG_LDO2CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) MAX8997_REG_LDO3CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) MAX8997_REG_LDO4CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) MAX8997_REG_LDO5CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) MAX8997_REG_LDO6CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) MAX8997_REG_LDO7CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) MAX8997_REG_LDO8CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) MAX8997_REG_LDO9CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) MAX8997_REG_LDO10CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) MAX8997_REG_LDO11CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) MAX8997_REG_LDO12CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) MAX8997_REG_LDO13CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) MAX8997_REG_LDO14CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) MAX8997_REG_LDO15CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) MAX8997_REG_LDO16CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) MAX8997_REG_LDO17CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) MAX8997_REG_LDO18CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) MAX8997_REG_LDO21CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) MAX8997_REG_DVSOKTIMER1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) MAX8997_REG_DVSOKTIMER2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MAX8997_REG_DVSOKTIMER4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) MAX8997_REG_DVSOKTIMER5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static u8 max8997_dumpaddr_muic[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) MAX8997_MUIC_REG_INTMASK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) MAX8997_MUIC_REG_INTMASK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) MAX8997_MUIC_REG_INTMASK3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) MAX8997_MUIC_REG_CDETCTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) MAX8997_MUIC_REG_CONTROL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) MAX8997_MUIC_REG_CONTROL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) MAX8997_MUIC_REG_CONTROL3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static u8 max8997_dumpaddr_haptic[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) MAX8997_HAPTIC_REG_CONF1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) MAX8997_HAPTIC_REG_CONF2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) MAX8997_HAPTIC_REG_DRVCONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) MAX8997_HAPTIC_REG_CYCLECONF1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) MAX8997_HAPTIC_REG_CYCLECONF2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) MAX8997_HAPTIC_REG_SIGCONF1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) MAX8997_HAPTIC_REG_SIGCONF2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) MAX8997_HAPTIC_REG_SIGCONF3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) MAX8997_HAPTIC_REG_SIGCONF4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) MAX8997_HAPTIC_REG_SIGDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) MAX8997_HAPTIC_REG_SIGDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) MAX8997_HAPTIC_REG_SIGPWMDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) MAX8997_HAPTIC_REG_SIGPWMDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) MAX8997_HAPTIC_REG_SIGPWMDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) MAX8997_HAPTIC_REG_SIGPWMDC4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static int max8997_freeze(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct i2c_client *i2c = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_pmic); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) max8997_read_reg(i2c, max8997_dumpaddr_pmic[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) &max8997->reg_dump[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_muic); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) max8997_read_reg(i2c, max8997_dumpaddr_muic[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) &max8997->reg_dump[i + MAX8997_REG_PMIC_END]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_haptic); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) max8997_read_reg(i2c, max8997_dumpaddr_haptic[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) &max8997->reg_dump[i + MAX8997_REG_PMIC_END +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) MAX8997_MUIC_REG_END]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static int max8997_restore(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) struct i2c_client *i2c = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_pmic); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) max8997_write_reg(i2c, max8997_dumpaddr_pmic[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) max8997->reg_dump[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_muic); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) max8997_write_reg(i2c, max8997_dumpaddr_muic[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) max8997->reg_dump[i + MAX8997_REG_PMIC_END]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_haptic); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) max8997_write_reg(i2c, max8997_dumpaddr_haptic[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) max8997->reg_dump[i + MAX8997_REG_PMIC_END +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) MAX8997_MUIC_REG_END]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int max8997_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct i2c_client *i2c = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) disable_irq(max8997->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) irq_set_irq_wake(max8997->irq, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static int max8997_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) struct i2c_client *i2c = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) irq_set_irq_wake(max8997->irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) enable_irq(max8997->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return max8997_irq_resume(max8997);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static const struct dev_pm_ops max8997_pm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .suspend = max8997_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .resume = max8997_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .freeze = max8997_freeze,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .restore = max8997_restore,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static struct i2c_driver max8997_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .name = "max8997",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .pm = &max8997_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .of_match_table = of_match_ptr(max8997_pmic_dt_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) .probe = max8997_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .id_table = max8997_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static int __init max8997_i2c_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return i2c_add_driver(&max8997_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /* init early so consumer devices can complete system boot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) subsys_initcall(max8997_i2c_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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