^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * max8907.c - mfd driver for MAX8907
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2010-2012, NVIDIA CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/max8907.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static const struct mfd_cell max8907_cells[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) { .name = "max8907-regulator", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) { .name = "max8907-rtc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static bool max8907_gen_is_volatile_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) case MAX8907_REG_ON_OFF_IRQ1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) case MAX8907_REG_ON_OFF_STAT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) case MAX8907_REG_ON_OFF_IRQ2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) case MAX8907_REG_CHG_IRQ1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) case MAX8907_REG_CHG_IRQ2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) case MAX8907_REG_CHG_STAT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static bool max8907_gen_is_precious_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) case MAX8907_REG_ON_OFF_IRQ1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) case MAX8907_REG_ON_OFF_IRQ2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) case MAX8907_REG_CHG_IRQ1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) case MAX8907_REG_CHG_IRQ2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static bool max8907_gen_is_writeable_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return !max8907_gen_is_volatile_reg(dev, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static const struct regmap_config max8907_regmap_gen_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .volatile_reg = max8907_gen_is_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .precious_reg = max8907_gen_is_precious_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .writeable_reg = max8907_gen_is_writeable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .max_register = MAX8907_REG_LDO20VOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static bool max8907_rtc_is_volatile_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (reg <= MAX8907_REG_RTC_YEAR2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) case MAX8907_REG_RTC_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) case MAX8907_REG_RTC_IRQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static bool max8907_rtc_is_precious_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) case MAX8907_REG_RTC_IRQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static bool max8907_rtc_is_writeable_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case MAX8907_REG_RTC_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) case MAX8907_REG_RTC_IRQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static const struct regmap_config max8907_regmap_rtc_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .volatile_reg = max8907_rtc_is_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .precious_reg = max8907_rtc_is_precious_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .writeable_reg = max8907_rtc_is_writeable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .max_register = MAX8907_REG_MPL_CNTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static const struct regmap_irq max8907_chg_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) { .reg_offset = 0, .mask = 1 << 0, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) { .reg_offset = 0, .mask = 1 << 1, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) { .reg_offset = 0, .mask = 1 << 2, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { .reg_offset = 1, .mask = 1 << 0, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) { .reg_offset = 1, .mask = 1 << 1, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { .reg_offset = 1, .mask = 1 << 2, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { .reg_offset = 1, .mask = 1 << 3, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { .reg_offset = 1, .mask = 1 << 4, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { .reg_offset = 1, .mask = 1 << 5, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) { .reg_offset = 1, .mask = 1 << 6, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { .reg_offset = 1, .mask = 1 << 7, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static const struct regmap_irq_chip max8907_chg_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .name = "max8907 chg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .status_base = MAX8907_REG_CHG_IRQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .mask_base = MAX8907_REG_CHG_IRQ1_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .wake_base = MAX8907_REG_CHG_IRQ1_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .irq_reg_stride = MAX8907_REG_CHG_IRQ2 - MAX8907_REG_CHG_IRQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .num_regs = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .irqs = max8907_chg_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .num_irqs = ARRAY_SIZE(max8907_chg_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static const struct regmap_irq max8907_on_off_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { .reg_offset = 0, .mask = 1 << 0, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { .reg_offset = 0, .mask = 1 << 1, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { .reg_offset = 0, .mask = 1 << 2, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) { .reg_offset = 0, .mask = 1 << 3, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { .reg_offset = 0, .mask = 1 << 4, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) { .reg_offset = 0, .mask = 1 << 5, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) { .reg_offset = 0, .mask = 1 << 6, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) { .reg_offset = 0, .mask = 1 << 7, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) { .reg_offset = 1, .mask = 1 << 0, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) { .reg_offset = 1, .mask = 1 << 1, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static const struct regmap_irq_chip max8907_on_off_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .name = "max8907 on_off",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .status_base = MAX8907_REG_ON_OFF_IRQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .mask_base = MAX8907_REG_ON_OFF_IRQ1_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .irq_reg_stride = MAX8907_REG_ON_OFF_IRQ2 - MAX8907_REG_ON_OFF_IRQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .num_regs = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .irqs = max8907_on_off_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .num_irqs = ARRAY_SIZE(max8907_on_off_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct regmap_irq max8907_rtc_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) { .reg_offset = 0, .mask = 1 << 2, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) { .reg_offset = 0, .mask = 1 << 3, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static const struct regmap_irq_chip max8907_rtc_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .name = "max8907 rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .status_base = MAX8907_REG_RTC_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .mask_base = MAX8907_REG_RTC_IRQ_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .num_regs = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .irqs = max8907_rtc_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .num_irqs = ARRAY_SIZE(max8907_rtc_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static struct max8907 *max8907_pm_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static void max8907_power_off(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) regmap_update_bits(max8907_pm_off->regmap_gen, MAX8907_REG_RESET_CNFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) MAX8907_MASK_POWER_OFF, MAX8907_MASK_POWER_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static int max8907_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct max8907 *max8907;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct max8907_platform_data *pdata = dev_get_platdata(&i2c->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) bool pm_off = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) pm_off = pdata->pm_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) else if (i2c->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) pm_off = of_property_read_bool(i2c->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) "maxim,system-power-controller");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) max8907 = devm_kzalloc(&i2c->dev, sizeof(struct max8907), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (!max8907) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) goto err_alloc_drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) max8907->dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) dev_set_drvdata(max8907->dev, max8907);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) max8907->i2c_gen = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) i2c_set_clientdata(i2c, max8907);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) max8907->regmap_gen = devm_regmap_init_i2c(i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) &max8907_regmap_gen_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (IS_ERR(max8907->regmap_gen)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ret = PTR_ERR(max8907->regmap_gen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) dev_err(&i2c->dev, "gen regmap init failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) goto err_regmap_gen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) max8907->i2c_rtc = i2c_new_dummy_device(i2c->adapter, MAX8907_RTC_I2C_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (IS_ERR(max8907->i2c_rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) ret = PTR_ERR(max8907->i2c_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) goto err_dummy_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) i2c_set_clientdata(max8907->i2c_rtc, max8907);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) max8907->regmap_rtc = devm_regmap_init_i2c(max8907->i2c_rtc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) &max8907_regmap_rtc_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (IS_ERR(max8907->regmap_rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ret = PTR_ERR(max8907->regmap_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) dev_err(&i2c->dev, "rtc regmap init failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) goto err_regmap_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) irq_set_status_flags(max8907->i2c_gen->irq, IRQ_NOAUTOEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ret = regmap_add_irq_chip(max8907->regmap_gen, max8907->i2c_gen->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) IRQF_ONESHOT | IRQF_SHARED, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) &max8907_chg_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) &max8907->irqc_chg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) dev_err(&i2c->dev, "failed to add chg irq chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) goto err_irqc_chg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ret = regmap_add_irq_chip(max8907->regmap_gen, max8907->i2c_gen->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) IRQF_ONESHOT | IRQF_SHARED, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) &max8907_on_off_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) &max8907->irqc_on_off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) dev_err(&i2c->dev, "failed to add on off irq chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) goto err_irqc_on_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) ret = regmap_add_irq_chip(max8907->regmap_rtc, max8907->i2c_gen->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) IRQF_ONESHOT | IRQF_SHARED, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) &max8907_rtc_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) &max8907->irqc_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) dev_err(&i2c->dev, "failed to add rtc irq chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) goto err_irqc_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) enable_irq(max8907->i2c_gen->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) ret = mfd_add_devices(max8907->dev, -1, max8907_cells,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ARRAY_SIZE(max8907_cells), NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) dev_err(&i2c->dev, "failed to add MFD devices %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) goto err_add_devices;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (pm_off && !pm_power_off) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) max8907_pm_off = max8907;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) pm_power_off = max8907_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) err_add_devices:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) err_irqc_rtc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_on_off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) err_irqc_on_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_chg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) err_irqc_chg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) err_regmap_rtc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) i2c_unregister_device(max8907->i2c_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) err_dummy_rtc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) err_regmap_gen:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) err_alloc_drvdata:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static int max8907_i2c_remove(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct max8907 *max8907 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) mfd_remove_devices(max8907->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_on_off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_chg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) i2c_unregister_device(max8907->i2c_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static const struct of_device_id max8907_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) { .compatible = "maxim,max8907" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MODULE_DEVICE_TABLE(of, max8907_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static const struct i2c_device_id max8907_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {"max8907", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MODULE_DEVICE_TABLE(i2c, max8907_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static struct i2c_driver max8907_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .name = "max8907",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .of_match_table = of_match_ptr(max8907_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .probe = max8907_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .remove = max8907_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .id_table = max8907_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static int __init max8907_i2c_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) int ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ret = i2c_add_driver(&max8907_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) pr_err("Failed to register I2C driver: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) subsys_initcall(max8907_i2c_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static void __exit max8907_i2c_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) i2c_del_driver(&max8907_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) module_exit(max8907_i2c_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) MODULE_DESCRIPTION("MAX8907 multi-function core driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) MODULE_AUTHOR("Gyungoh Yoo <jack.yoo@maxim-ic.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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