Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // max77693.c - mfd core driver for the MAX 77693
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) // Copyright (C) 2012 Samsung Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) // SangYoung Son <hello.son@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) // This program is not provided / owned by Maxim Integrated Products.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) // This driver is based on max8997.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/mfd/max77693.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/mfd/max77693-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/mfd/max77693-private.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define I2C_ADDR_PMIC	(0xCC >> 1)	/* Charger, Flash LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define I2C_ADDR_MUIC	(0x4A >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define I2C_ADDR_HAPTIC	(0x90 >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) static const struct mfd_cell max77693_devs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	{ .name = "max77693-pmic", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		.name = "max77693-charger",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		.of_compatible = "maxim,max77693-charger",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		.name = "max77693-muic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		.of_compatible = "maxim,max77693-muic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		.name = "max77693-haptic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		.of_compatible = "maxim,max77693-haptic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		.name = "max77693-led",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		.of_compatible = "maxim,max77693-led",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static const struct regmap_config max77693_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	.max_register = MAX77693_PMIC_REG_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static const struct regmap_irq max77693_led_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	{ .mask = LED_IRQ_FLED2_OPEN,  },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	{ .mask = LED_IRQ_FLED2_SHORT, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	{ .mask = LED_IRQ_FLED1_OPEN,  },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	{ .mask = LED_IRQ_FLED1_SHORT, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	{ .mask = LED_IRQ_MAX_FLASH,   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static const struct regmap_irq_chip max77693_led_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.name			= "max77693-led",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.status_base		= MAX77693_LED_REG_FLASH_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.mask_base		= MAX77693_LED_REG_FLASH_INT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	.mask_invert		= false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	.num_regs		= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	.irqs			= max77693_led_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.num_irqs		= ARRAY_SIZE(max77693_led_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static const struct regmap_irq max77693_topsys_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	{ .mask = TOPSYS_IRQ_T120C_INT,  },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	{ .mask = TOPSYS_IRQ_T140C_INT,  },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	{ .mask = TOPSYS_IRQ_LOWSYS_INT, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static const struct regmap_irq_chip max77693_topsys_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	.name			= "max77693-topsys",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	.status_base		= MAX77693_PMIC_REG_TOPSYS_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	.mask_base		= MAX77693_PMIC_REG_TOPSYS_INT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	.mask_invert		= false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	.num_regs		= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	.irqs			= max77693_topsys_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	.num_irqs		= ARRAY_SIZE(max77693_topsys_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static const struct regmap_irq max77693_charger_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	{ .mask = CHG_IRQ_BYP_I,   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	{ .mask = CHG_IRQ_THM_I,   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	{ .mask = CHG_IRQ_BAT_I,   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	{ .mask = CHG_IRQ_CHG_I,   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	{ .mask = CHG_IRQ_CHGIN_I, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static const struct regmap_irq_chip max77693_charger_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	.name			= "max77693-charger",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	.status_base		= MAX77693_CHG_REG_CHG_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	.mask_base		= MAX77693_CHG_REG_CHG_INT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	.mask_invert		= false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	.num_regs		= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	.irqs			= max77693_charger_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.num_irqs		= ARRAY_SIZE(max77693_charger_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static const struct regmap_config max77693_regmap_muic_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	.max_register = MAX77693_MUIC_REG_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static const struct regmap_irq max77693_muic_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	{ .reg_offset = 0, .mask = MUIC_IRQ_INT1_ADC,		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	{ .reg_offset = 0, .mask = MUIC_IRQ_INT1_ADC_LOW,	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	{ .reg_offset = 0, .mask = MUIC_IRQ_INT1_ADC_ERR,	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	{ .reg_offset = 0, .mask = MUIC_IRQ_INT1_ADC1K,		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	{ .reg_offset = 1, .mask = MUIC_IRQ_INT2_CHGTYP,	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	{ .reg_offset = 1, .mask = MUIC_IRQ_INT2_CHGDETREUN,	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	{ .reg_offset = 1, .mask = MUIC_IRQ_INT2_DCDTMR,	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	{ .reg_offset = 1, .mask = MUIC_IRQ_INT2_DXOVP,		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	{ .reg_offset = 1, .mask = MUIC_IRQ_INT2_VBVOLT,	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	{ .reg_offset = 1, .mask = MUIC_IRQ_INT2_VIDRM,		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	{ .reg_offset = 2, .mask = MUIC_IRQ_INT3_EOC,		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	{ .reg_offset = 2, .mask = MUIC_IRQ_INT3_CGMBC,		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	{ .reg_offset = 2, .mask = MUIC_IRQ_INT3_OVP,		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	{ .reg_offset = 2, .mask = MUIC_IRQ_INT3_MBCCHG_ERR,	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	{ .reg_offset = 2, .mask = MUIC_IRQ_INT3_CHG_ENABLED,	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	{ .reg_offset = 2, .mask = MUIC_IRQ_INT3_BAT_DET,	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static const struct regmap_irq_chip max77693_muic_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	.name			= "max77693-muic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	.status_base		= MAX77693_MUIC_REG_INT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	.mask_base		= MAX77693_MUIC_REG_INTMASK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	.mask_invert		= true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	.num_regs		= 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	.irqs			= max77693_muic_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	.num_irqs		= ARRAY_SIZE(max77693_muic_irqs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const struct regmap_config max77693_regmap_haptic_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	.max_register = MAX77693_HAPTIC_REG_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static int max77693_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			      const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct max77693_dev *max77693;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	unsigned int reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	max77693 = devm_kzalloc(&i2c->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			sizeof(struct max77693_dev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (max77693 == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	i2c_set_clientdata(i2c, max77693);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	max77693->dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	max77693->i2c = i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	max77693->irq = i2c->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	max77693->type = id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	max77693->regmap = devm_regmap_init_i2c(i2c, &max77693_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	if (IS_ERR(max77693->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		ret = PTR_ERR(max77693->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		dev_err(max77693->dev, "failed to allocate register map: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 				ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	ret = regmap_read(max77693->regmap, MAX77693_PMIC_REG_PMIC_ID2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 				&reg_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		dev_err(max77693->dev, "device not found on this channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		dev_info(max77693->dev, "device ID: 0x%x\n", reg_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	max77693->i2c_muic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_MUIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (IS_ERR(max77693->i2c_muic)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		dev_err(max77693->dev, "Failed to allocate I2C device for MUIC\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		return PTR_ERR(max77693->i2c_muic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	i2c_set_clientdata(max77693->i2c_muic, max77693);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	max77693->i2c_haptic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_HAPTIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (IS_ERR(max77693->i2c_haptic)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		dev_err(max77693->dev, "Failed to allocate I2C device for Haptic\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		ret = PTR_ERR(max77693->i2c_haptic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		goto err_i2c_haptic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	i2c_set_clientdata(max77693->i2c_haptic, max77693);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	max77693->regmap_haptic = devm_regmap_init_i2c(max77693->i2c_haptic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 					&max77693_regmap_haptic_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	if (IS_ERR(max77693->regmap_haptic)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		ret = PTR_ERR(max77693->regmap_haptic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		dev_err(max77693->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			"failed to initialize haptic register map: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		goto err_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	 * Initialize register map for MUIC device because use regmap-muic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	 * instance of MUIC device when irq of max77693 is initialized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	 * before call max77693-muic probe() function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	max77693->regmap_muic = devm_regmap_init_i2c(max77693->i2c_muic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 					 &max77693_regmap_muic_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (IS_ERR(max77693->regmap_muic)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		ret = PTR_ERR(max77693->regmap_muic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		dev_err(max77693->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 			"failed to allocate register map: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		goto err_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	ret = regmap_add_irq_chip(max77693->regmap, max77693->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 				IRQF_ONESHOT | IRQF_SHARED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 				IRQF_TRIGGER_FALLING, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 				&max77693_led_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 				&max77693->irq_data_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		dev_err(max77693->dev, "failed to add irq chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		goto err_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	ret = regmap_add_irq_chip(max77693->regmap, max77693->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 				IRQF_ONESHOT | IRQF_SHARED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 				IRQF_TRIGGER_FALLING, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 				&max77693_topsys_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 				&max77693->irq_data_topsys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		dev_err(max77693->dev, "failed to add irq chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		goto err_irq_topsys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	ret = regmap_add_irq_chip(max77693->regmap, max77693->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 				IRQF_ONESHOT | IRQF_SHARED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 				IRQF_TRIGGER_FALLING, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 				&max77693_charger_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 				&max77693->irq_data_chg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		dev_err(max77693->dev, "failed to add irq chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		goto err_irq_charger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	ret = regmap_add_irq_chip(max77693->regmap_muic, max77693->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 				IRQF_ONESHOT | IRQF_SHARED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 				IRQF_TRIGGER_FALLING, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 				&max77693_muic_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 				&max77693->irq_data_muic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		dev_err(max77693->dev, "failed to add irq chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		goto err_irq_muic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	/* Unmask interrupts from all blocks in interrupt source register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	ret = regmap_update_bits(max77693->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 				MAX77693_PMIC_REG_INTSRC_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 				SRC_IRQ_ALL, (unsigned int)~SRC_IRQ_ALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		dev_err(max77693->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			"Could not unmask interrupts in INTSRC: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 			ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		goto err_intsrc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	pm_runtime_set_active(max77693->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	ret = mfd_add_devices(max77693->dev, -1, max77693_devs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 			      ARRAY_SIZE(max77693_devs), NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		goto err_mfd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) err_mfd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	mfd_remove_devices(max77693->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) err_intsrc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	regmap_del_irq_chip(max77693->irq, max77693->irq_data_muic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) err_irq_muic:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	regmap_del_irq_chip(max77693->irq, max77693->irq_data_chg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) err_irq_charger:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	regmap_del_irq_chip(max77693->irq, max77693->irq_data_topsys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) err_irq_topsys:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	regmap_del_irq_chip(max77693->irq, max77693->irq_data_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) err_regmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	i2c_unregister_device(max77693->i2c_haptic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) err_i2c_haptic:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	i2c_unregister_device(max77693->i2c_muic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int max77693_i2c_remove(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	struct max77693_dev *max77693 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	mfd_remove_devices(max77693->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	regmap_del_irq_chip(max77693->irq, max77693->irq_data_muic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	regmap_del_irq_chip(max77693->irq, max77693->irq_data_chg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	regmap_del_irq_chip(max77693->irq, max77693->irq_data_topsys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	regmap_del_irq_chip(max77693->irq, max77693->irq_data_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	i2c_unregister_device(max77693->i2c_muic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	i2c_unregister_device(max77693->i2c_haptic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static const struct i2c_device_id max77693_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	{ "max77693", TYPE_MAX77693 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MODULE_DEVICE_TABLE(i2c, max77693_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static int max77693_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	struct i2c_client *i2c = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	struct max77693_dev *max77693 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	if (device_may_wakeup(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		enable_irq_wake(max77693->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		disable_irq(max77693->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static int max77693_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	struct i2c_client *i2c = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	struct max77693_dev *max77693 = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	if (device_may_wakeup(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		disable_irq_wake(max77693->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		enable_irq(max77693->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static const struct dev_pm_ops max77693_pm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	.suspend = max77693_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	.resume = max77693_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static const struct of_device_id max77693_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	{ .compatible = "maxim,max77693" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) MODULE_DEVICE_TABLE(of, max77693_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static struct i2c_driver max77693_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		   .name = "max77693",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		   .pm = &max77693_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		   .of_match_table = of_match_ptr(max77693_dt_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	.probe = max77693_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	.remove = max77693_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	.id_table = max77693_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) module_i2c_driver(max77693_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) MODULE_DESCRIPTION("MAXIM 77693 multi-function core driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) MODULE_AUTHOR("SangYoung, Son <hello.son@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) MODULE_LICENSE("GPL");