^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * TI LP8788 MFD - interrupt handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2012 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Milo(Woogyom) Kim <milo.kim@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mfd/lp8788.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* register address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define LP8788_INT_1 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define LP8788_INTEN_1 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define BASE_INTEN_ADDR LP8788_INTEN_1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SIZE_REG 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define NUM_REGS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * struct lp8788_irq_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * @lp : used for accessing to lp8788 registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @irq_lock : mutex for enabling/disabling the interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @domain : IRQ domain for handling nested interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * @enabled : status of enabled interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct lp8788_irq_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct lp8788 *lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct mutex irq_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct irq_domain *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int enabled[LP8788_INT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static inline u8 _irq_to_addr(enum lp8788_int_id id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return id / SIZE_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static inline u8 _irq_to_enable_addr(enum lp8788_int_id id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return _irq_to_addr(id) + BASE_INTEN_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static inline u8 _irq_to_mask(enum lp8788_int_id id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return 1 << (id % SIZE_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static inline u8 _irq_to_val(enum lp8788_int_id id, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return enable << (id % SIZE_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static void lp8788_irq_enable(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) irqd->enabled[data->hwirq] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static void lp8788_irq_disable(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) irqd->enabled[data->hwirq] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static void lp8788_irq_bus_lock(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) mutex_lock(&irqd->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void lp8788_irq_bus_sync_unlock(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) enum lp8788_int_id irq = data->hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u8 addr, mask, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) addr = _irq_to_enable_addr(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) mask = _irq_to_mask(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) val = _irq_to_val(irq, irqd->enabled[irq]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) lp8788_update_bits(irqd->lp, addr, mask, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) mutex_unlock(&irqd->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static struct irq_chip lp8788_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .name = "lp8788",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .irq_enable = lp8788_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .irq_disable = lp8788_irq_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .irq_bus_lock = lp8788_irq_bus_lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .irq_bus_sync_unlock = lp8788_irq_bus_sync_unlock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static irqreturn_t lp8788_irq_handler(int irq, void *ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct lp8788_irq_data *irqd = ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct lp8788 *lp = irqd->lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u8 status[NUM_REGS], addr, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) bool handled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (lp8788_read_multi_bytes(lp, LP8788_INT_1, status, NUM_REGS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) for (i = 0 ; i < LP8788_INT_MAX ; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) addr = _irq_to_addr(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) mask = _irq_to_mask(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* reporting only if the irq is enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (status[addr] & mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) handle_nested_irq(irq_find_mapping(irqd->domain, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) handled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return handled ? IRQ_HANDLED : IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int lp8788_irq_map(struct irq_domain *d, unsigned int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) irq_hw_number_t hwirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct lp8788_irq_data *irqd = d->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct irq_chip *chip = &lp8788_irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) irq_set_chip_data(virq, irqd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) irq_set_chip_and_handler(virq, chip, handle_edge_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) irq_set_nested_thread(virq, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) irq_set_noprobe(virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static const struct irq_domain_ops lp8788_domain_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .map = lp8788_irq_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int lp8788_irq_init(struct lp8788 *lp, int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct lp8788_irq_data *irqd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (irq <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) dev_warn(lp->dev, "invalid irq number: %d\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) irqd = devm_kzalloc(lp->dev, sizeof(*irqd), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (!irqd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) irqd->lp = lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) irqd->domain = irq_domain_add_linear(lp->dev->of_node, LP8788_INT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) &lp8788_domain_ops, irqd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (!irqd->domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) dev_err(lp->dev, "failed to add irq domain err\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) lp->irqdm = irqd->domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) mutex_init(&irqd->irq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) ret = request_threaded_irq(irq, NULL, lp8788_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) "lp8788-irq", irqd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dev_err(lp->dev, "failed to create a thread for IRQ_N\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) lp->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) void lp8788_irq_exit(struct lp8788 *lp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (lp->irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) free_irq(lp->irq, lp->irqdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags