^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * TI/National Semiconductor LP3943 MFD Core Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2013 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Milo Kim <milo.kim@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Driver structure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * LP3943 is an integrated device capable of driving 16 output channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * It can be used for a GPIO expander and PWM generators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * LED control General usage for a device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * ___________ ____________________________
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * LP3943 MFD ---- GPIO expander leds-gpio eg) HW enable pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * --- PWM generator leds-pwm eg) PWM input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Internal two PWM channels are used for LED dimming effect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * And each output pin can be used as a GPIO as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * The LED functionality can work with GPIOs or PWMs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * LEDs can be controlled with legacy leds-gpio(static brightness) or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * leds-pwm drivers(dynamic brightness control).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Alternatively, it can be used for generic GPIO and PWM controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * For example, a GPIO is HW enable pin of a device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * A PWM is input pin of a backlight device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/mfd/lp3943.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LP3943_MAX_REGISTERS 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* Register configuration for pin MUX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static const struct lp3943_reg_cfg lp3943_mux_cfg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* address, mask, shift */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { LP3943_REG_MUX0, 0x03, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) { LP3943_REG_MUX0, 0x0C, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) { LP3943_REG_MUX0, 0x30, 4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) { LP3943_REG_MUX0, 0xC0, 6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { LP3943_REG_MUX1, 0x03, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { LP3943_REG_MUX1, 0x0C, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { LP3943_REG_MUX1, 0x30, 4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) { LP3943_REG_MUX1, 0xC0, 6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) { LP3943_REG_MUX2, 0x03, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) { LP3943_REG_MUX2, 0x0C, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) { LP3943_REG_MUX2, 0x30, 4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { LP3943_REG_MUX2, 0xC0, 6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { LP3943_REG_MUX3, 0x03, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { LP3943_REG_MUX3, 0x0C, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { LP3943_REG_MUX3, 0x30, 4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { LP3943_REG_MUX3, 0xC0, 6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static const struct mfd_cell lp3943_devs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .name = "lp3943-pwm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .of_compatible = "ti,lp3943-pwm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .name = "lp3943-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .of_compatible = "ti,lp3943-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int lp3943_read_byte(struct lp3943 *lp3943, u8 reg, u8 *read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ret = regmap_read(lp3943->regmap, reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) *read = (u8)val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) EXPORT_SYMBOL_GPL(lp3943_read_byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int lp3943_write_byte(struct lp3943 *lp3943, u8 reg, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return regmap_write(lp3943->regmap, reg, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) EXPORT_SYMBOL_GPL(lp3943_write_byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int lp3943_update_bits(struct lp3943 *lp3943, u8 reg, u8 mask, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return regmap_update_bits(lp3943->regmap, reg, mask, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) EXPORT_SYMBOL_GPL(lp3943_update_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static const struct regmap_config lp3943_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .max_register = LP3943_MAX_REGISTERS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static int lp3943_probe(struct i2c_client *cl, const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct lp3943 *lp3943;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct device *dev = &cl->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) lp3943 = devm_kzalloc(dev, sizeof(*lp3943), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (!lp3943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) lp3943->regmap = devm_regmap_init_i2c(cl, &lp3943_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (IS_ERR(lp3943->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return PTR_ERR(lp3943->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) lp3943->pdata = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) lp3943->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) lp3943->mux_cfg = lp3943_mux_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) i2c_set_clientdata(cl, lp3943);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return devm_mfd_add_devices(dev, -1, lp3943_devs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ARRAY_SIZE(lp3943_devs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static const struct i2c_device_id lp3943_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) { "lp3943", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) MODULE_DEVICE_TABLE(i2c, lp3943_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static const struct of_device_id lp3943_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { .compatible = "ti,lp3943", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MODULE_DEVICE_TABLE(of, lp3943_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static struct i2c_driver lp3943_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .probe = lp3943_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .name = "lp3943",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .of_match_table = of_match_ptr(lp3943_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .id_table = lp3943_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) module_i2c_driver(lp3943_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MODULE_DESCRIPTION("LP3943 MFD Core Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) MODULE_AUTHOR("Milo Kim");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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