Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Janz CMOD-IO MODULbus Carrier Board PCI Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Lots of inspiration and code was copied from drivers/mfd/sm501.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/mfd/janz.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define DRV_NAME "janz-cmodio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) /* Size of each MODULbus module in PCI BAR4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define CMODIO_MODULBUS_SIZE	0x200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /* Maximum number of MODULbus modules on a CMOD-IO carrier board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define CMODIO_MAX_MODULES	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /* Module Parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) static unsigned int num_modules = CMODIO_MAX_MODULES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) static char *modules[CMODIO_MAX_MODULES] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	"empty", "empty", "empty", "empty",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) module_param_array(modules, charp, &num_modules, S_IRUGO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) MODULE_PARM_DESC(modules, "MODULbus modules attached to the carrier board");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /* Unique Device Id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static unsigned int cmodio_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) struct cmodio_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	/* Parent PCI device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	/* PLX control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct janz_cmodio_onboard_regs __iomem *ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	/* hex switch position */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	u8 hex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	/* mfd-core API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct mfd_cell cells[CMODIO_MAX_MODULES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct resource resources[3 * CMODIO_MAX_MODULES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct janz_platform_data pdata[CMODIO_MAX_MODULES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * Subdevices using the mfd-core API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static int cmodio_setup_subdevice(struct cmodio_device *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 					    char *name, unsigned int devno,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 					    unsigned int modno)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct janz_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	struct mfd_cell *cell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct pci_dev *pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	pci = priv->pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	cell = &priv->cells[devno];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	res = &priv->resources[devno * 3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	pdata = &priv->pdata[devno];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	cell->name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	cell->resources = res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	cell->num_resources = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	/* Setup the subdevice ID -- must be unique */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	cell->id = cmodio_id++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	/* Add platform data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	pdata->modno = modno;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	cell->platform_data = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	cell->pdata_size = sizeof(*pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	/* MODULbus registers -- PCI BAR3 is big-endian MODULbus access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	res->flags = IORESOURCE_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	res->parent = &pci->resource[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	res->start = pci->resource[3].start + (CMODIO_MODULBUS_SIZE * modno);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	res->end = res->start + CMODIO_MODULBUS_SIZE - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	res++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	/* PLX Control Registers -- PCI BAR4 is interrupt and other registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	res->flags = IORESOURCE_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	res->parent = &pci->resource[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	res->start = pci->resource[4].start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	res->end = pci->resource[4].end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	res++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	 * IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	 * The start and end fields are used as an offset to the irq_base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	 * parameter passed into the mfd_add_devices() function call. All
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	 * devices share the same IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	res->flags = IORESOURCE_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	res->parent = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	res->start = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	res->end = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	res++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* Probe each submodule using kernel parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int cmodio_probe_submodules(struct cmodio_device *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	struct pci_dev *pdev = priv->pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	unsigned int num_probed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	for (i = 0; i < num_modules; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		name = modules[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		if (!strcmp(name, "") || !strcmp(name, "empty"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		dev_dbg(&priv->pdev->dev, "MODULbus %d: name %s\n", i, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		cmodio_setup_subdevice(priv, name, num_probed, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		num_probed++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	/* print an error message if no modules were probed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (num_probed == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		dev_err(&priv->pdev->dev, "no MODULbus modules specified, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 					  "please set the ``modules'' kernel "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 					  "parameter according to your "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 					  "hardware configuration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	return mfd_add_devices(&pdev->dev, 0, priv->cells,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			       num_probed, NULL, pdev->irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)  * SYSFS Attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static ssize_t mbus_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			 char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct cmodio_device *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	return snprintf(buf, PAGE_SIZE, "%x\n", priv->hex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static DEVICE_ATTR(modulbus_number, S_IRUGO, mbus_show, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static struct attribute *cmodio_sysfs_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	&dev_attr_modulbus_number.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static const struct attribute_group cmodio_sysfs_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.attrs = cmodio_sysfs_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)  * PCI Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int cmodio_pci_probe(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 				      const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	struct cmodio_device *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	pci_set_drvdata(dev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	priv->pdev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	/* Hardware Initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	ret = pci_enable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		dev_err(&dev->dev, "unable to enable device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	pci_set_master(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	ret = pci_request_regions(dev, DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		dev_err(&dev->dev, "unable to request regions\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		goto out_pci_disable_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	/* Onboard configuration registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	priv->ctrl = pci_ioremap_bar(dev, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	if (!priv->ctrl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		dev_err(&dev->dev, "unable to remap onboard regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		goto out_pci_release_regions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	/* Read the hex switch on the carrier board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	priv->hex = ioread8(&priv->ctrl->int_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	/* Add the MODULbus number (hex switch value) to the device's sysfs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	ret = sysfs_create_group(&dev->dev.kobj, &cmodio_sysfs_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		dev_err(&dev->dev, "unable to create sysfs attributes\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		goto out_unmap_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	 * Disable all interrupt lines, each submodule will enable its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	 * own interrupt line if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	iowrite8(0xf, &priv->ctrl->int_disable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	/* Register drivers for all submodules */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	ret = cmodio_probe_submodules(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		dev_err(&dev->dev, "unable to probe submodules\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		goto out_sysfs_remove_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) out_sysfs_remove_group:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	sysfs_remove_group(&dev->dev.kobj, &cmodio_sysfs_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) out_unmap_ctrl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	iounmap(priv->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) out_pci_release_regions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	pci_release_regions(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) out_pci_disable_device:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static void cmodio_pci_remove(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	struct cmodio_device *priv = pci_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	mfd_remove_devices(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	sysfs_remove_group(&dev->dev.kobj, &cmodio_sysfs_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	iounmap(priv->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	pci_release_regions(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #define PCI_VENDOR_ID_JANZ		0x13c3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* The list of devices that this module will support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static const struct pci_device_id cmodio_pci_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_JANZ, 0x0101 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_JANZ, 0x0100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_JANZ, 0x0201 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_JANZ, 0x0202 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_JANZ, 0x0201 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_JANZ, 0x0202 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	{ 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MODULE_DEVICE_TABLE(pci, cmodio_pci_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static struct pci_driver cmodio_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	.name     = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	.id_table = cmodio_pci_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	.probe    = cmodio_pci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	.remove   = cmodio_pci_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) module_pci_driver(cmodio_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MODULE_DESCRIPTION("Janz CMOD-IO PCI MODULbus Carrier Board Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MODULE_LICENSE("GPL");