Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Compaq iPAQ h3xxx Atmel microcontroller companion support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * This is an Atmel AT90LS8535 with a special flashed-in firmware that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * implements the special protocol used by this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * based on previous kernel 2.4 version by Andrew Christian
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Author : Alessandro Gardich <gremlin@gremlin.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Author : Dmitry Artamonow <mad_soft@inbox.ru>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Author : Linus Walleij <linus.walleij@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/mfd/ipaq-micro.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) static void ipaq_micro_trigger_tx(struct ipaq_micro *micro)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct ipaq_micro_txdev *tx = &micro->tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct ipaq_micro_msg *msg = micro->msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	int i, bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	u8 checksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	bp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	tx->buf[bp++] = CHAR_SOF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	checksum = ((msg->id & 0x0f) << 4) | (msg->tx_len & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	tx->buf[bp++] = checksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	for (i = 0; i < msg->tx_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		tx->buf[bp++] = msg->tx_data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		checksum += msg->tx_data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	tx->buf[bp++] = checksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	tx->len = bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	tx->index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	/* Enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	val = readl(micro->base + UTCR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	val |= UTCR3_TIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	writel(val, micro->base + UTCR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) int ipaq_micro_tx_msg(struct ipaq_micro *micro, struct ipaq_micro_msg *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	dev_dbg(micro->dev, "TX msg: %02x, %d bytes\n", msg->id, msg->tx_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	spin_lock_irqsave(&micro->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	if (micro->msg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		list_add_tail(&msg->node, &micro->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		spin_unlock_irqrestore(&micro->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	micro->msg = msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	ipaq_micro_trigger_tx(micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	spin_unlock_irqrestore(&micro->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) EXPORT_SYMBOL(ipaq_micro_tx_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static void micro_rx_msg(struct ipaq_micro *micro, u8 id, int len, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	dev_dbg(micro->dev, "RX msg: %02x, %d bytes\n", id, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	spin_lock(&micro->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	case MSG_VERSION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	case MSG_EEPROM_READ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	case MSG_EEPROM_WRITE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	case MSG_BACKLIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	case MSG_NOTIFY_LED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	case MSG_THERMAL_SENSOR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	case MSG_BATTERY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		/* Handle synchronous messages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		if (micro->msg && micro->msg->id == id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 			struct ipaq_micro_msg *msg = micro->msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			memcpy(msg->rx_data, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			msg->rx_len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			complete(&micro->msg->ack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			if (!list_empty(&micro->queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				micro->msg = list_entry(micro->queue.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 							struct ipaq_micro_msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 							node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 				list_del_init(&micro->msg->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 				ipaq_micro_trigger_tx(micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				micro->msg = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			dev_dbg(micro->dev, "OK RX message 0x%02x\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			dev_err(micro->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 				"out of band RX message 0x%02x\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			if (!micro->msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 				dev_info(micro->dev, "no message queued\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 				dev_info(micro->dev, "expected message %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 					 micro->msg->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	case MSG_KEYBOARD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		if (micro->key)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			micro->key(micro->key_data, len, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			dev_dbg(micro->dev, "key message ignored, no handle\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	case MSG_TOUCHSCREEN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		if (micro->ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			micro->ts(micro->ts_data, len, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			dev_dbg(micro->dev, "touchscreen message ignored, no handle\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		dev_err(micro->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			"unknown msg %d [%d] ", id, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		for (i = 0; i < len; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			pr_cont("0x%02x ", data[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		pr_cont("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	spin_unlock(&micro->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static void micro_process_char(struct ipaq_micro *micro, u8 ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	struct ipaq_micro_rxdev *rx = &micro->rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	switch (rx->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	case STATE_SOF:	/* Looking for SOF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		if (ch == CHAR_SOF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			rx->state = STATE_ID; /* Next byte is the id and len */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	case STATE_ID: /* Looking for id and len byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		rx->id = (ch & 0xf0) >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		rx->len = (ch & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		rx->index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		rx->chksum = ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		rx->state = (rx->len > 0) ? STATE_DATA : STATE_CHKSUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	case STATE_DATA: /* Looking for 'len' data bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		rx->chksum += ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		rx->buf[rx->index] = ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		if (++rx->index == rx->len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			rx->state = STATE_CHKSUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	case STATE_CHKSUM: /* Looking for the checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		if (ch == rx->chksum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			micro_rx_msg(micro, rx->id, rx->len, rx->buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		rx->state = STATE_SOF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static void micro_rx_chars(struct ipaq_micro *micro)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	u32 status, ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	while ((status = readl(micro->base + UTSR1)) & UTSR1_RNE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		ch = readl(micro->base + UTDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		if (status & UTSR1_PRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 			dev_err(micro->dev, "rx: parity error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		else if (status & UTSR1_FRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			dev_err(micro->dev, "rx: framing error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		else if (status & UTSR1_ROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 			dev_err(micro->dev, "rx: overrun error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		micro_process_char(micro, ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static void ipaq_micro_get_version(struct ipaq_micro *micro)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	struct ipaq_micro_msg msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		.id = MSG_VERSION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	ipaq_micro_tx_msg_sync(micro, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	if (msg.rx_len == 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		memcpy(micro->version, msg.rx_data, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		micro->version[4] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	} else if (msg.rx_len == 9) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		memcpy(micro->version, msg.rx_data, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		micro->version[4] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		/* Bytes 4-7 are "pack", byte 8 is "boot type" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		dev_err(micro->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			"illegal version message %d bytes\n", msg.rx_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static void ipaq_micro_eeprom_read(struct ipaq_micro *micro,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 				   u8 address, u8 len, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	struct ipaq_micro_msg msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		.id = MSG_EEPROM_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	u8 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	for (i = 0; i < len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		msg.tx_data[0] = address + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		msg.tx_data[1] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		msg.tx_len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		ipaq_micro_tx_msg_sync(micro, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		memcpy(data + (i * 2), msg.rx_data, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static char *ipaq_micro_str(u8 *wchar, u8 len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	char retstr[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	u8 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	for (i = 0; i < len / 2; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		retstr[i] = wchar[i * 2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	return kstrdup(retstr, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static u16 ipaq_micro_to_u16(u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	return data[1] << 8 | data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static void __init ipaq_micro_eeprom_dump(struct ipaq_micro *micro)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	u8 dump[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	char *str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	ipaq_micro_eeprom_read(micro, 0, 128, dump);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	str = ipaq_micro_str(dump, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	if (str) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		dev_info(micro->dev, "HW version %s\n", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		kfree(str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	str = ipaq_micro_str(dump+10, 40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (str) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		dev_info(micro->dev, "serial number: %s\n", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		/* Feed the random pool with this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		add_device_randomness(str, strlen(str));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		kfree(str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	str = ipaq_micro_str(dump+50, 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (str) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		dev_info(micro->dev, "module ID: %s\n", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		kfree(str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	str = ipaq_micro_str(dump+70, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (str) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		dev_info(micro->dev, "product revision: %s\n", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		kfree(str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	dev_info(micro->dev, "product ID: %u\n", ipaq_micro_to_u16(dump+80));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	dev_info(micro->dev, "frame rate: %u fps\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		 ipaq_micro_to_u16(dump+82));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	dev_info(micro->dev, "page mode: %u\n", ipaq_micro_to_u16(dump+84));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	dev_info(micro->dev, "country ID: %u\n", ipaq_micro_to_u16(dump+86));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	dev_info(micro->dev, "color display: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		 ipaq_micro_to_u16(dump+88) ? "yes" : "no");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	dev_info(micro->dev, "ROM size: %u MiB\n", ipaq_micro_to_u16(dump+90));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	dev_info(micro->dev, "RAM size: %u KiB\n", ipaq_micro_to_u16(dump+92));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	dev_info(micro->dev, "screen: %u x %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		 ipaq_micro_to_u16(dump+94), ipaq_micro_to_u16(dump+96));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static void micro_tx_chars(struct ipaq_micro *micro)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	struct ipaq_micro_txdev *tx = &micro->tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	while ((tx->index < tx->len) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	       (readl(micro->base + UTSR1) & UTSR1_TNF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		writel(tx->buf[tx->index], micro->base + UTDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		tx->index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	/* Stop interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	val = readl(micro->base + UTCR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	val &= ~UTCR3_TIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	writel(val, micro->base + UTCR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static void micro_reset_comm(struct ipaq_micro *micro)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	struct ipaq_micro_rxdev *rx = &micro->rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	if (micro->msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		complete(&micro->msg->ack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	/* Initialize Serial channel protocol frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	rx->state = STATE_SOF;  /* Reset the state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	/* Set up interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	writel(0x01, micro->sdlc + 0x0); /* Select UART mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	/* Clean up CR3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	writel(0x0, micro->base + UTCR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	/* Format: 8N1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	writel(UTCR0_8BitData | UTCR0_1StpBit, micro->base + UTCR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	/* Baud rate: 115200 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	writel(0x0, micro->base + UTCR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	writel(0x1, micro->base + UTCR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	/* Clear SR0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	writel(0xff, micro->base + UTSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	/* Enable RX int, disable TX int */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	writel(UTCR3_TXE | UTCR3_RXE | UTCR3_RIE, micro->base + UTCR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	val = readl(micro->base + UTCR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	val &= ~UTCR3_TIE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	writel(val, micro->base + UTCR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static irqreturn_t micro_serial_isr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	struct ipaq_micro *micro = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	struct ipaq_micro_txdev *tx = &micro->tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	status = readl(micro->base + UTSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		if (status & (UTSR0_RID | UTSR0_RFS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 			if (status & UTSR0_RID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 				/* Clear the Receiver IDLE bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 				writel(UTSR0_RID, micro->base + UTSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 			micro_rx_chars(micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		/* Clear break bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		if (status & (UTSR0_RBB | UTSR0_REB))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 			writel(status & (UTSR0_RBB | UTSR0_REB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 			       micro->base + UTSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		if (status & UTSR0_TFS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 			micro_tx_chars(micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		status = readl(micro->base + UTSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	} while (((tx->index < tx->len) && (status & UTSR0_TFS)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		 (status & (UTSR0_RFS | UTSR0_RID)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static const struct mfd_cell micro_cells[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	{ .name = "ipaq-micro-backlight", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	{ .name = "ipaq-micro-battery", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	{ .name = "ipaq-micro-keys", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	{ .name = "ipaq-micro-ts", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	{ .name = "ipaq-micro-leds", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static int __maybe_unused micro_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	struct ipaq_micro *micro = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	micro_reset_comm(micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	mdelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static int __init micro_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	struct ipaq_micro *micro;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	micro = devm_kzalloc(&pdev->dev, sizeof(*micro), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	if (!micro)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	micro->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	micro->base = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	if (IS_ERR(micro->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		return PTR_ERR(micro->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	micro->sdlc = devm_platform_ioremap_resource(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	if (IS_ERR(micro->sdlc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 		return PTR_ERR(micro->sdlc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	micro_reset_comm(micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	if (!irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	ret = devm_request_irq(&pdev->dev, irq, micro_serial_isr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 			       IRQF_SHARED, "ipaq-micro",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 			       micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 		dev_err(&pdev->dev, "unable to grab serial port IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		dev_info(&pdev->dev, "grabbed serial port IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	spin_lock_init(&micro->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	INIT_LIST_HEAD(&micro->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	platform_set_drvdata(pdev, micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	ret = mfd_add_devices(&pdev->dev, pdev->id, micro_cells,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 			      ARRAY_SIZE(micro_cells), NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 		dev_err(&pdev->dev, "error adding MFD cells");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	/* Check version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	ipaq_micro_get_version(micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	dev_info(&pdev->dev, "Atmel micro ASIC version %s\n", micro->version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	ipaq_micro_eeprom_dump(micro);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static const struct dev_pm_ops micro_dev_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	SET_SYSTEM_SLEEP_PM_OPS(NULL, micro_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static struct platform_driver micro_device_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	.driver   = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 		.name	= "ipaq-h3xxx-micro",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 		.pm	= &micro_dev_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 		.suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) builtin_platform_driver_probe(micro_device_driver, micro_probe);