^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* I2C support for Dialog DA9063
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2012 Dialog Semiconductor Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2013 Philipp Zabel, Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Krystian Garbaciak, Dialog Semiconductor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mfd/da9063/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/da9063/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Raw I2C access required for just accessing chip and variant info before we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * know which device is present. The info read from the device using this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * approach is then used to select the correct regmap tables.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define DA9063_REG_PAGE_SIZE 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define DA9063_REG_PAGED_ADDR_MASK 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) enum da9063_page_sel_buf_fmt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) DA9063_PAGE_SEL_BUF_PAGE_REG = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) DA9063_PAGE_SEL_BUF_PAGE_VAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) DA9063_PAGE_SEL_BUF_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) enum da9063_paged_read_msgs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) DA9063_PAGED_READ_MSG_PAGE_SEL = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) DA9063_PAGED_READ_MSG_REG_SEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) DA9063_PAGED_READ_MSG_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) DA9063_PAGED_READ_MSG_CNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int da9063_i2c_blockreg_read(struct i2c_client *client, u16 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u8 *buf, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct i2c_msg xfer[DA9063_PAGED_READ_MSG_CNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u8 page_sel_buf[DA9063_PAGE_SEL_BUF_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u8 page_num, paged_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Determine page info based on register address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) page_num = (addr / DA9063_REG_PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (page_num > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) dev_err(&client->dev, "Invalid register address provided\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) paged_addr = (addr % DA9063_REG_PAGE_SIZE) & DA9063_REG_PAGED_ADDR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) page_sel_buf[DA9063_PAGE_SEL_BUF_PAGE_REG] = DA9063_REG_PAGE_CON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) page_sel_buf[DA9063_PAGE_SEL_BUF_PAGE_VAL] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) (page_num << DA9063_I2C_PAGE_SEL_SHIFT) & DA9063_REG_PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* Write reg address, page selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) xfer[DA9063_PAGED_READ_MSG_PAGE_SEL].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) xfer[DA9063_PAGED_READ_MSG_PAGE_SEL].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) xfer[DA9063_PAGED_READ_MSG_PAGE_SEL].len = DA9063_PAGE_SEL_BUF_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) xfer[DA9063_PAGED_READ_MSG_PAGE_SEL].buf = page_sel_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* Select register address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) xfer[DA9063_PAGED_READ_MSG_REG_SEL].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) xfer[DA9063_PAGED_READ_MSG_REG_SEL].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) xfer[DA9063_PAGED_READ_MSG_REG_SEL].len = sizeof(paged_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) xfer[DA9063_PAGED_READ_MSG_REG_SEL].buf = &paged_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* Read data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) xfer[DA9063_PAGED_READ_MSG_DATA].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) xfer[DA9063_PAGED_READ_MSG_DATA].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) xfer[DA9063_PAGED_READ_MSG_DATA].len = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) xfer[DA9063_PAGED_READ_MSG_DATA].buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ret = i2c_transfer(client->adapter, xfer, DA9063_PAGED_READ_MSG_CNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) dev_err(&client->dev, "Paged block read failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (ret != DA9063_PAGED_READ_MSG_CNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) dev_err(&client->dev, "Paged block read failed to complete\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) DA9063_DEV_ID_REG = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) DA9063_VAR_ID_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) DA9063_CHIP_ID_REGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static int da9063_get_device_type(struct i2c_client *i2c, struct da9063 *da9063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u8 buf[DA9063_CHIP_ID_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ret = da9063_i2c_blockreg_read(i2c, DA9063_REG_DEVICE_ID, buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) DA9063_CHIP_ID_REGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (buf[DA9063_DEV_ID_REG] != PMIC_CHIP_ID_DA9063) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_err(da9063->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) "Invalid chip device ID: 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) buf[DA9063_DEV_ID_REG]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) dev_info(da9063->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) "Device detected (chip-ID: 0x%02X, var-ID: 0x%02X)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) buf[DA9063_DEV_ID_REG], buf[DA9063_VAR_ID_REG]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) da9063->variant_code =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) (buf[DA9063_VAR_ID_REG] & DA9063_VARIANT_ID_MRC_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) >> DA9063_VARIANT_ID_MRC_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * Variant specific regmap configs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct regmap_range da9063_ad_readable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_AD_REG_SECOND_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_AD_REG_GP_ID_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) regmap_reg_range(DA9063_REG_DEVICE_ID, DA9063_REG_VARIANT_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static const struct regmap_range da9063_ad_writeable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) regmap_reg_range(DA9063_REG_COUNT_S, DA9063_AD_REG_ALARM_Y),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_AD_REG_MON_REG_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) regmap_reg_range(DA9063_AD_REG_GP_ID_0, DA9063_AD_REG_GP_ID_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const struct regmap_range da9063_ad_volatile_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_EVENT_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) regmap_reg_range(DA9063_REG_CONTROL_A, DA9063_REG_CONTROL_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) regmap_reg_range(DA9063_REG_CONTROL_E, DA9063_REG_CONTROL_F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) regmap_reg_range(DA9063_REG_BCORE2_CONT, DA9063_REG_LDO11_CONT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) regmap_reg_range(DA9063_REG_DVC_1, DA9063_REG_ADC_MAN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) regmap_reg_range(DA9063_REG_ADC_RES_L, DA9063_AD_REG_SECOND_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_SEQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) regmap_reg_range(DA9063_REG_EN_32K, DA9063_REG_EN_32K),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) regmap_reg_range(DA9063_AD_REG_MON_REG_5, DA9063_AD_REG_MON_REG_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static const struct regmap_access_table da9063_ad_readable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .yes_ranges = da9063_ad_readable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .n_yes_ranges = ARRAY_SIZE(da9063_ad_readable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static const struct regmap_access_table da9063_ad_writeable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .yes_ranges = da9063_ad_writeable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .n_yes_ranges = ARRAY_SIZE(da9063_ad_writeable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static const struct regmap_access_table da9063_ad_volatile_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .yes_ranges = da9063_ad_volatile_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .n_yes_ranges = ARRAY_SIZE(da9063_ad_volatile_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static const struct regmap_range da9063_bb_readable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_BB_REG_SECOND_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_BB_REG_GP_ID_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) regmap_reg_range(DA9063_REG_DEVICE_ID, DA9063_REG_VARIANT_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static const struct regmap_range da9063_bb_writeable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) regmap_reg_range(DA9063_REG_COUNT_S, DA9063_BB_REG_ALARM_Y),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_BB_REG_MON_REG_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) regmap_reg_range(DA9063_BB_REG_GP_ID_0, DA9063_BB_REG_GP_ID_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const struct regmap_range da9063_bb_da_volatile_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_EVENT_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) regmap_reg_range(DA9063_REG_CONTROL_A, DA9063_REG_CONTROL_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) regmap_reg_range(DA9063_REG_CONTROL_E, DA9063_REG_CONTROL_F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) regmap_reg_range(DA9063_REG_BCORE2_CONT, DA9063_REG_LDO11_CONT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) regmap_reg_range(DA9063_REG_DVC_1, DA9063_REG_ADC_MAN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) regmap_reg_range(DA9063_REG_ADC_RES_L, DA9063_BB_REG_SECOND_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_SEQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) regmap_reg_range(DA9063_REG_EN_32K, DA9063_REG_EN_32K),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) regmap_reg_range(DA9063_BB_REG_MON_REG_5, DA9063_BB_REG_MON_REG_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static const struct regmap_access_table da9063_bb_readable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .yes_ranges = da9063_bb_readable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .n_yes_ranges = ARRAY_SIZE(da9063_bb_readable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static const struct regmap_access_table da9063_bb_writeable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .yes_ranges = da9063_bb_writeable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .n_yes_ranges = ARRAY_SIZE(da9063_bb_writeable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static const struct regmap_access_table da9063_bb_da_volatile_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .yes_ranges = da9063_bb_da_volatile_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .n_yes_ranges = ARRAY_SIZE(da9063_bb_da_volatile_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static const struct regmap_range da9063l_bb_readable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_MON_A10_RES),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_BB_REG_GP_ID_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) regmap_reg_range(DA9063_REG_DEVICE_ID, DA9063_REG_VARIANT_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static const struct regmap_range da9063l_bb_writeable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_BB_REG_MON_REG_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) regmap_reg_range(DA9063_BB_REG_GP_ID_0, DA9063_BB_REG_GP_ID_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static const struct regmap_range da9063l_bb_da_volatile_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_EVENT_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) regmap_reg_range(DA9063_REG_CONTROL_A, DA9063_REG_CONTROL_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) regmap_reg_range(DA9063_REG_CONTROL_E, DA9063_REG_CONTROL_F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) regmap_reg_range(DA9063_REG_BCORE2_CONT, DA9063_REG_LDO11_CONT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) regmap_reg_range(DA9063_REG_DVC_1, DA9063_REG_ADC_MAN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) regmap_reg_range(DA9063_REG_ADC_RES_L, DA9063_REG_MON_A10_RES),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_SEQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) regmap_reg_range(DA9063_REG_EN_32K, DA9063_REG_EN_32K),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) regmap_reg_range(DA9063_BB_REG_MON_REG_5, DA9063_BB_REG_MON_REG_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static const struct regmap_access_table da9063l_bb_readable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .yes_ranges = da9063l_bb_readable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .n_yes_ranges = ARRAY_SIZE(da9063l_bb_readable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static const struct regmap_access_table da9063l_bb_writeable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .yes_ranges = da9063l_bb_writeable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .n_yes_ranges = ARRAY_SIZE(da9063l_bb_writeable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static const struct regmap_access_table da9063l_bb_da_volatile_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .yes_ranges = da9063l_bb_da_volatile_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .n_yes_ranges = ARRAY_SIZE(da9063l_bb_da_volatile_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static const struct regmap_range da9063_da_readable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_BB_REG_SECOND_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_BB_REG_GP_ID_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) regmap_reg_range(DA9063_REG_DEVICE_ID, DA9063_REG_VARIANT_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static const struct regmap_range da9063_da_writeable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) regmap_reg_range(DA9063_REG_COUNT_S, DA9063_BB_REG_ALARM_Y),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_BB_REG_MON_REG_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) regmap_reg_range(DA9063_BB_REG_GP_ID_0, DA9063_BB_REG_GP_ID_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static const struct regmap_access_table da9063_da_readable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .yes_ranges = da9063_da_readable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .n_yes_ranges = ARRAY_SIZE(da9063_da_readable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static const struct regmap_access_table da9063_da_writeable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .yes_ranges = da9063_da_writeable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .n_yes_ranges = ARRAY_SIZE(da9063_da_writeable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static const struct regmap_range da9063l_da_readable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_MON_A10_RES),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_BB_REG_GP_ID_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) regmap_reg_range(DA9063_REG_DEVICE_ID, DA9063_REG_VARIANT_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static const struct regmap_range da9063l_da_writeable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_BB_REG_MON_REG_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) regmap_reg_range(DA9063_BB_REG_GP_ID_0, DA9063_BB_REG_GP_ID_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static const struct regmap_access_table da9063l_da_readable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .yes_ranges = da9063l_da_readable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .n_yes_ranges = ARRAY_SIZE(da9063l_da_readable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static const struct regmap_access_table da9063l_da_writeable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .yes_ranges = da9063l_da_writeable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .n_yes_ranges = ARRAY_SIZE(da9063l_da_writeable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static const struct regmap_range_cfg da9063_range_cfg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .range_min = DA9063_REG_PAGE_CON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .range_max = DA9063_REG_CONFIG_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .selector_reg = DA9063_REG_PAGE_CON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .selector_mask = 1 << DA9063_I2C_PAGE_SEL_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .selector_shift = DA9063_I2C_PAGE_SEL_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .window_start = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .window_len = 256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static struct regmap_config da9063_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .ranges = da9063_range_cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .num_ranges = ARRAY_SIZE(da9063_range_cfg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .max_register = DA9063_REG_CONFIG_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static const struct of_device_id da9063_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) { .compatible = "dlg,da9063", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) { .compatible = "dlg,da9063l", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) MODULE_DEVICE_TABLE(of, da9063_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int da9063_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) struct da9063 *da9063;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) da9063 = devm_kzalloc(&i2c->dev, sizeof(struct da9063), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (da9063 == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) i2c_set_clientdata(i2c, da9063);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) da9063->dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) da9063->chip_irq = i2c->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) da9063->type = id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) ret = da9063_get_device_type(i2c, da9063);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) switch (da9063->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) case PMIC_TYPE_DA9063:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) switch (da9063->variant_code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) case PMIC_DA9063_AD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) da9063_regmap_config.rd_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) &da9063_ad_readable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) da9063_regmap_config.wr_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) &da9063_ad_writeable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) da9063_regmap_config.volatile_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) &da9063_ad_volatile_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) case PMIC_DA9063_BB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) case PMIC_DA9063_CA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) da9063_regmap_config.rd_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) &da9063_bb_readable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) da9063_regmap_config.wr_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) &da9063_bb_writeable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) da9063_regmap_config.volatile_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) &da9063_bb_da_volatile_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) case PMIC_DA9063_DA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) da9063_regmap_config.rd_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) &da9063_da_readable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) da9063_regmap_config.wr_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) &da9063_da_writeable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) da9063_regmap_config.volatile_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) &da9063_bb_da_volatile_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) dev_err(da9063->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) "Chip variant not supported for DA9063\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) case PMIC_TYPE_DA9063L:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) switch (da9063->variant_code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) case PMIC_DA9063_BB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) case PMIC_DA9063_CA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) da9063_regmap_config.rd_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) &da9063l_bb_readable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) da9063_regmap_config.wr_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) &da9063l_bb_writeable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) da9063_regmap_config.volatile_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) &da9063l_bb_da_volatile_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) case PMIC_DA9063_DA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) da9063_regmap_config.rd_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) &da9063l_da_readable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) da9063_regmap_config.wr_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) &da9063l_da_writeable_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) da9063_regmap_config.volatile_table =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) &da9063l_bb_da_volatile_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) dev_err(da9063->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) "Chip variant not supported for DA9063L\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) dev_err(da9063->dev, "Chip type not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) da9063->regmap = devm_regmap_init_i2c(i2c, &da9063_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (IS_ERR(da9063->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) ret = PTR_ERR(da9063->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dev_err(da9063->dev, "Failed to allocate register map: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) /* If SMBus is not available and only I2C is possible, enter I2C mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (i2c_check_functionality(i2c->adapter, I2C_FUNC_I2C)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) ret = regmap_clear_bits(da9063->regmap, DA9063_REG_CONFIG_J,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) DA9063_TWOWIRE_TO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) dev_err(da9063->dev, "Failed to set Two-Wire Bus Mode.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) return da9063_device_init(da9063, i2c->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static const struct i2c_device_id da9063_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) { "da9063", PMIC_TYPE_DA9063 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) { "da9063l", PMIC_TYPE_DA9063L },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) MODULE_DEVICE_TABLE(i2c, da9063_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static struct i2c_driver da9063_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .name = "da9063",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .of_match_table = of_match_ptr(da9063_dt_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .probe = da9063_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .id_table = da9063_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) module_i2c_driver(da9063_i2c_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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