^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Base driver for Dialog Semiconductor DA9030/DA9034
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 Compulab, Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Mike Rapoport <mike@compulab.co.il>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2006-2008 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Eric Miao <eric.miao@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mfd/da903x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define DA9030_CHIP_ID 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define DA9030_EVENT_A 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define DA9030_EVENT_B 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DA9030_EVENT_C 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DA9030_STATUS 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DA9030_IRQ_MASK_A 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DA9030_IRQ_MASK_B 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DA9030_IRQ_MASK_C 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DA9030_SYS_CTRL_A 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DA9030_SYS_CTRL_B 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DA9030_FAULT_LOG 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define DA9034_CHIP_ID 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define DA9034_EVENT_A 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define DA9034_EVENT_B 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DA9034_EVENT_C 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define DA9034_EVENT_D 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DA9034_STATUS_A 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define DA9034_STATUS_B 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define DA9034_IRQ_MASK_A 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define DA9034_IRQ_MASK_B 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define DA9034_IRQ_MASK_C 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define DA9034_IRQ_MASK_D 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define DA9034_SYS_CTRL_A 0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define DA9034_SYS_CTRL_B 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define DA9034_FAULT_LOG 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct da903x_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct da903x_chip_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int (*init_chip)(struct da903x_chip *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int (*unmask_events)(struct da903x_chip *, unsigned int events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int (*mask_events)(struct da903x_chip *, unsigned int events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int (*read_events)(struct da903x_chip *, unsigned int *events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int (*read_status)(struct da903x_chip *, unsigned int *status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct da903x_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) const struct da903x_chip_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) uint32_t events_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct work_struct irq_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct blocking_notifier_head notifier_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static inline int __da903x_read(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int reg, uint8_t *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ret = i2c_smbus_read_byte_data(client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dev_err(&client->dev, "failed reading at 0x%02x\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) *val = (uint8_t)ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static inline int __da903x_reads(struct i2c_client *client, int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int len, uint8_t *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ret = i2c_smbus_read_i2c_block_data(client, reg, len, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) dev_err(&client->dev, "failed reading from 0x%02x\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static inline int __da903x_write(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int reg, uint8_t val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ret = i2c_smbus_write_byte_data(client, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) dev_err(&client->dev, "failed writing 0x%02x to 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) val, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static inline int __da903x_writes(struct i2c_client *client, int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int len, uint8_t *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ret = i2c_smbus_write_i2c_block_data(client, reg, len, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) dev_err(&client->dev, "failed writings to 0x%02x\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) int da903x_register_notifier(struct device *dev, struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned int events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct da903x_chip *chip = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) chip->ops->unmask_events(chip, events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return blocking_notifier_chain_register(&chip->notifier_list, nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) EXPORT_SYMBOL_GPL(da903x_register_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) int da903x_unregister_notifier(struct device *dev, struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) unsigned int events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct da903x_chip *chip = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) chip->ops->mask_events(chip, events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return blocking_notifier_chain_unregister(&chip->notifier_list, nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) EXPORT_SYMBOL_GPL(da903x_unregister_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) int da903x_write(struct device *dev, int reg, uint8_t val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return __da903x_write(to_i2c_client(dev), reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) EXPORT_SYMBOL_GPL(da903x_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int da903x_writes(struct device *dev, int reg, int len, uint8_t *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return __da903x_writes(to_i2c_client(dev), reg, len, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) EXPORT_SYMBOL_GPL(da903x_writes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int da903x_read(struct device *dev, int reg, uint8_t *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return __da903x_read(to_i2c_client(dev), reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) EXPORT_SYMBOL_GPL(da903x_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int da903x_reads(struct device *dev, int reg, int len, uint8_t *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return __da903x_reads(to_i2c_client(dev), reg, len, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) EXPORT_SYMBOL_GPL(da903x_reads);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct da903x_chip *chip = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) uint8_t reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ret = __da903x_read(chip->client, reg, ®_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if ((reg_val & bit_mask) != bit_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) reg_val |= bit_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ret = __da903x_write(chip->client, reg, reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) EXPORT_SYMBOL_GPL(da903x_set_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct da903x_chip *chip = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) uint8_t reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) ret = __da903x_read(chip->client, reg, ®_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (reg_val & bit_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) reg_val &= ~bit_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) ret = __da903x_write(chip->client, reg, reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) EXPORT_SYMBOL_GPL(da903x_clr_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) int da903x_update(struct device *dev, int reg, uint8_t val, uint8_t mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct da903x_chip *chip = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) uint8_t reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ret = __da903x_read(chip->client, reg, ®_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if ((reg_val & mask) != val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) reg_val = (reg_val & ~mask) | val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret = __da903x_write(chip->client, reg, reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) EXPORT_SYMBOL_GPL(da903x_update);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) int da903x_query_status(struct device *dev, unsigned int sbits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct da903x_chip *chip = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) unsigned int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) chip->ops->read_status(chip, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return ((status & sbits) == sbits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) EXPORT_SYMBOL(da903x_query_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static int da9030_init_chip(struct da903x_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) uint8_t chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) err = __da903x_read(chip->client, DA9030_CHIP_ID, &chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) err = __da903x_write(chip->client, DA9030_SYS_CTRL_A, 0xE8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) dev_info(chip->dev, "DA9030 (CHIP ID: 0x%02x) detected\n", chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int da9030_unmask_events(struct da903x_chip *chip, unsigned int events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) uint8_t v[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) chip->events_mask &= ~events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) v[0] = (chip->events_mask & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) v[1] = (chip->events_mask >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) v[2] = (chip->events_mask >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return __da903x_writes(chip->client, DA9030_IRQ_MASK_A, 3, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static int da9030_mask_events(struct da903x_chip *chip, unsigned int events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) uint8_t v[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) chip->events_mask |= events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) v[0] = (chip->events_mask & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) v[1] = (chip->events_mask >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) v[2] = (chip->events_mask >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return __da903x_writes(chip->client, DA9030_IRQ_MASK_A, 3, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static int da9030_read_events(struct da903x_chip *chip, unsigned int *events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) uint8_t v[3] = {0, 0, 0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ret = __da903x_reads(chip->client, DA9030_EVENT_A, 3, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) *events = (v[2] << 16) | (v[1] << 8) | v[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static int da9030_read_status(struct da903x_chip *chip, unsigned int *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) return __da903x_read(chip->client, DA9030_STATUS, (uint8_t *)status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int da9034_init_chip(struct da903x_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) uint8_t chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) err = __da903x_read(chip->client, DA9034_CHIP_ID, &chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) err = __da903x_write(chip->client, DA9034_SYS_CTRL_A, 0xE8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /* avoid SRAM power off during sleep*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) __da903x_write(chip->client, 0x10, 0x07);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) __da903x_write(chip->client, 0x11, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) __da903x_write(chip->client, 0x12, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /* Enable the ONKEY power down functionality */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) __da903x_write(chip->client, DA9034_SYS_CTRL_B, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) __da903x_write(chip->client, DA9034_SYS_CTRL_A, 0x60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* workaround to make LEDs work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) __da903x_write(chip->client, 0x90, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) __da903x_write(chip->client, 0xB0, 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* make ADTV1 and SDTV1 effective */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) __da903x_write(chip->client, 0x20, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) dev_info(chip->dev, "DA9034 (CHIP ID: 0x%02x) detected\n", chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static int da9034_unmask_events(struct da903x_chip *chip, unsigned int events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) uint8_t v[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) chip->events_mask &= ~events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) v[0] = (chip->events_mask & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) v[1] = (chip->events_mask >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) v[2] = (chip->events_mask >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) v[3] = (chip->events_mask >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return __da903x_writes(chip->client, DA9034_IRQ_MASK_A, 4, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int da9034_mask_events(struct da903x_chip *chip, unsigned int events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) uint8_t v[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) chip->events_mask |= events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) v[0] = (chip->events_mask & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) v[1] = (chip->events_mask >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) v[2] = (chip->events_mask >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) v[3] = (chip->events_mask >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return __da903x_writes(chip->client, DA9034_IRQ_MASK_A, 4, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static int da9034_read_events(struct da903x_chip *chip, unsigned int *events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) uint8_t v[4] = {0, 0, 0, 0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) ret = __da903x_reads(chip->client, DA9034_EVENT_A, 4, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) *events = (v[3] << 24) | (v[2] << 16) | (v[1] << 8) | v[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static int da9034_read_status(struct da903x_chip *chip, unsigned int *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) uint8_t v[2] = {0, 0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ret = __da903x_reads(chip->client, DA9034_STATUS_A, 2, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) *status = (v[1] << 8) | v[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static void da903x_irq_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) struct da903x_chip *chip =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) container_of(work, struct da903x_chip, irq_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) unsigned int events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (chip->ops->read_events(chip, &events))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) events &= ~chip->events_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (events == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) blocking_notifier_call_chain(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) &chip->notifier_list, events, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) enable_irq(chip->client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) static irqreturn_t da903x_irq_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct da903x_chip *chip = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) disable_irq_nosync(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) (void)schedule_work(&chip->irq_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static const struct da903x_chip_ops da903x_ops[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .init_chip = da9030_init_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .unmask_events = da9030_unmask_events,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .mask_events = da9030_mask_events,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .read_events = da9030_read_events,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .read_status = da9030_read_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .init_chip = da9034_init_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .unmask_events = da9034_unmask_events,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .mask_events = da9034_mask_events,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .read_events = da9034_read_events,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .read_status = da9034_read_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static const struct i2c_device_id da903x_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) { "da9030", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) { "da9034", 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) MODULE_DEVICE_TABLE(i2c, da903x_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static int __remove_subdev(struct device *dev, void *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) platform_device_unregister(to_platform_device(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static int da903x_remove_subdevs(struct da903x_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return device_for_each_child(chip->dev, NULL, __remove_subdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static int da903x_add_subdevs(struct da903x_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) struct da903x_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) struct da903x_subdev_info *subdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) int i, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) for (i = 0; i < pdata->num_subdevs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) subdev = &pdata->subdevs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) pdev = platform_device_alloc(subdev->name, subdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (!pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) goto failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) pdev->dev.parent = chip->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) pdev->dev.platform_data = subdev->platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) ret = platform_device_add(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) platform_device_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) goto failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) failed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) da903x_remove_subdevs(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) static int da903x_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct da903x_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) struct da903x_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) unsigned int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) chip = devm_kzalloc(&client->dev, sizeof(struct da903x_chip),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (chip == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) chip->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) chip->dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) chip->ops = &da903x_ops[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) mutex_init(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) INIT_WORK(&chip->irq_work, da903x_irq_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) BLOCKING_INIT_NOTIFIER_HEAD(&chip->notifier_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) i2c_set_clientdata(client, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) ret = chip->ops->init_chip(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) /* mask and clear all IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) chip->events_mask = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) chip->ops->mask_events(chip, chip->events_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) chip->ops->read_events(chip, &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) ret = devm_request_irq(&client->dev, client->irq, da903x_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) IRQF_TRIGGER_FALLING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) "da903x", chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) dev_err(&client->dev, "failed to request irq %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return da903x_add_subdevs(chip, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static int da903x_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct da903x_chip *chip = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) da903x_remove_subdevs(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static struct i2c_driver da903x_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .name = "da903x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .probe = da903x_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .remove = da903x_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .id_table = da903x_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static int __init da903x_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) return i2c_add_driver(&da903x_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) subsys_initcall(da903x_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static void __exit da903x_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) i2c_del_driver(&da903x_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) module_exit(da903x_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) MODULE_DESCRIPTION("PMIC Driver for Dialog Semiconductor DA9034");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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