Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    3)  * Copyright (C) ST-Ericsson SA 2010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    5)  * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    7) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    8)  * AB8500 register access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    9)  * ======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   11)  * read:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   12)  * # echo BANK  >  <debugfs>/ab8500/register-bank
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   13)  * # echo ADDR  >  <debugfs>/ab8500/register-address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   14)  * # cat <debugfs>/ab8500/register-value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   15)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   16)  * write:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   17)  * # echo BANK  >  <debugfs>/ab8500/register-bank
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   18)  * # echo ADDR  >  <debugfs>/ab8500/register-address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   19)  * # echo VALUE >  <debugfs>/ab8500/register-value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   20)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   21)  * read all registers from a bank:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   22)  * # echo BANK  >  <debugfs>/ab8500/register-bank
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   23)  * # cat <debugfs>/ab8500/all-bank-register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   24)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   25)  * BANK   target AB8500 register bank
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   26)  * ADDR   target AB8500 register address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   27)  * VALUE  decimal or 0x-prefixed hexadecimal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   28)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   29)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   30)  * User Space notification on AB8500 IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   31)  * =====================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   32)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   33)  * Allows user space entity to be notified when target AB8500 IRQ occurs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   34)  * When subscribed, a sysfs entry is created in ab8500.i2c platform device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   35)  * One can pool this file to get target IRQ occurence information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   36)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   37)  * subscribe to an AB8500 IRQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   38)  * # echo IRQ  >  <debugfs>/ab8500/irq-subscribe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   39)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   40)  * unsubscribe from an AB8500 IRQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   41)  * # echo IRQ  >  <debugfs>/ab8500/irq-unsubscribe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   42)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   43)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   44)  * AB8500 register formated read/write access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   45)  * ==========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   46)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   47)  * Read:  read data, data>>SHIFT, data&=MASK, output data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   48)  *        [0xABCDEF98] shift=12 mask=0xFFF => 0x00000CDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   49)  * Write: read data, data &= ~(MASK<<SHIFT), data |= (VALUE<<SHIFT), write data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   50)  *        [0xABCDEF98] shift=12 mask=0xFFF value=0x123 => [0xAB123F98]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   51)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   52)  * Usage:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   53)  * # echo "CMD [OPTIONS] BANK ADRESS [VALUE]" > $debugfs/ab8500/hwreg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   54)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   55)  * CMD      read      read access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   56)  *          write     write access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   57)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   58)  * BANK     target reg bank
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   59)  * ADDRESS  target reg address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   60)  * VALUE    (write) value to be updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   61)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   62)  * OPTIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   63)  *  -d|-dec            (read) output in decimal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   64)  *  -h|-hexa           (read) output in 0x-hexa (default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   65)  *  -l|-w|-b           32bit (default), 16bit or 8bit reg access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   66)  *  -m|-mask MASK      0x-hexa mask (default 0xFFFFFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   67)  *  -s|-shift SHIFT    bit shift value (read:left, write:right)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   68)  *  -o|-offset OFFSET  address offset to add to ADDRESS value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   69)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   70)  * Warning: bit shift operation is applied to bit-mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   71)  * Warning: bit shift direction depends on read or right command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   72)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   74) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   75) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   76) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   77) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   78) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   79) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   80) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   81) #include <linux/kobject.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   82) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   83) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   85) #include <linux/mfd/abx500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   86) #include <linux/mfd/abx500/ab8500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   88) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   89) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   90) #include <linux/ctype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   91) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   93) static u32 debug_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   94) static u32 debug_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   96) static int irq_ab8500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   97) static int irq_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   98) static int irq_last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   99) static u32 *irq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  100) static int num_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  102) static struct device_attribute **dev_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  103) static char **event_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  105) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  106)  * struct ab8500_reg_range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  107)  * @first: the first address of the range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  108)  * @last: the last address of the range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  109)  * @perm: access permissions for the range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  110)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  111) struct ab8500_reg_range {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  112) 	u8 first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  113) 	u8 last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  114) 	u8 perm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  117) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  118)  * struct ab8500_prcmu_ranges
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  119)  * @num_ranges: the number of ranges in the list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  120)  * @bankid: bank identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  121)  * @range: the list of register ranges
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  122)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  123) struct ab8500_prcmu_ranges {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  124) 	u8 num_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  125) 	u8 bankid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  126) 	const struct ab8500_reg_range *range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  129) /* hwreg- "mask" and "shift" entries ressources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  130) struct hwreg_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  131) 	u32  bank;      /* target bank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  132) 	unsigned long addr;      /* target address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  133) 	uint fmt;       /* format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  134) 	unsigned long mask; /* read/write mask, applied before any bit shift */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  135) 	long shift;     /* bit shift (read:right shift, write:left shift */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  137) /* fmt bit #0: 0=hexa, 1=dec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  138) #define REG_FMT_DEC(c) ((c)->fmt & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  139) #define REG_FMT_HEX(c) (!REG_FMT_DEC(c))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  141) static struct hwreg_cfg hwreg_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  142) 	.addr = 0,			/* default: invalid phys addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  143) 	.fmt = 0,			/* default: 32bit access, hex output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  144) 	.mask = 0xFFFFFFFF,	/* default: no mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  145) 	.shift = 0,			/* default: no bit shift */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  148) #define AB8500_NAME_STRING "ab8500"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  149) #define AB8500_NUM_BANKS AB8500_DEBUG_FIELD_LAST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  151) #define AB8500_REV_REG 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  153) static struct ab8500_prcmu_ranges *debug_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  155) static struct ab8500_prcmu_ranges ab8500_debug_ranges[AB8500_NUM_BANKS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  156) 	[AB8500_M_FSM_RANK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  157) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  158) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  159) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  160) 	[AB8500_SYS_CTRL1_BLOCK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  161) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  162) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  163) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  164) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  165) 				.last = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  166) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  167) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  168) 				.first = 0x42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  169) 				.last = 0x42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  170) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  171) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  172) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  173) 				.last = 0x81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  174) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  175) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  176) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  177) 	[AB8500_SYS_CTRL2_BLOCK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  178) 		.num_ranges = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  179) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  180) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  181) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  182) 				.last = 0x0D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  183) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  184) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  185) 				.first = 0x0F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  186) 				.last = 0x17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  187) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  188) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  189) 				.first = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  190) 				.last = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  191) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  192) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  193) 				.first = 0x32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  194) 				.last = 0x33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  195) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  196) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  197) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  198) 	[AB8500_REGU_CTRL1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  199) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  200) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  201) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  202) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  203) 				.last = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  204) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  205) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  206) 				.first = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  207) 				.last = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  208) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  209) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  210) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  211) 				.last = 0x84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  212) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  213) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  214) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  215) 	[AB8500_REGU_CTRL2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  216) 		.num_ranges = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  217) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  218) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  219) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  220) 				.last = 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  221) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  222) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  223) 				.first = 0x17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  224) 				.last = 0x19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  225) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  226) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  227) 				.first = 0x1B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  228) 				.last = 0x1D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  229) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  230) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  231) 				.first = 0x1F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  232) 				.last = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  233) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  234) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  235) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  236) 				.last = 0x44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  237) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  238) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  239) 			 * 0x80-0x8B are SIM registers and should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  240) 			 * not be accessed from here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  241) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  242) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  243) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  244) 	[AB8500_USB] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  245) 		.num_ranges = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  246) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  247) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  248) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  249) 				.last = 0x83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  250) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  251) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  252) 				.first = 0x87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  253) 				.last = 0x8A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  254) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  255) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  256) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  257) 	[AB8500_TVOUT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  258) 		.num_ranges = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  259) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  260) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  261) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  262) 				.last = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  263) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  264) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  265) 				.first = 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  266) 				.last = 0x17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  267) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  268) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  269) 				.first = 0x19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  270) 				.last = 0x21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  271) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  272) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  273) 				.first = 0x27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  274) 				.last = 0x2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  275) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  276) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  277) 				.first = 0x41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  278) 				.last = 0x41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  279) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  280) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  281) 				.first = 0x45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  282) 				.last = 0x5B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  283) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  284) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  285) 				.first = 0x5D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  286) 				.last = 0x5D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  287) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  288) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  289) 				.first = 0x69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  290) 				.last = 0x69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  291) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  292) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  293) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  294) 				.last = 0x81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  295) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  296) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  297) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  298) 	[AB8500_DBI] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  299) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  300) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  301) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  302) 	[AB8500_ECI_AV_ACC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  303) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  304) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  305) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  306) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  307) 				.last = 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  308) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  309) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  310) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  311) 	[AB8500_RESERVED] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  312) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  313) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  314) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  315) 	[AB8500_GPADC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  316) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  317) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  318) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  319) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  320) 				.last = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  321) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  322) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  323) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  324) 	[AB8500_CHARGER] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  325) 		.num_ranges = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  326) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  327) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  328) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  329) 				.last = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  330) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  331) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  332) 				.first = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  333) 				.last = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  334) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  335) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  336) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  337) 				.last = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  338) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  339) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  340) 				.first = 0x42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  341) 				.last = 0x42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  342) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  343) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  344) 				.first = 0x44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  345) 				.last = 0x44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  346) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  347) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  348) 				.first = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  349) 				.last = 0x55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  350) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  351) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  352) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  353) 				.last = 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  354) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  355) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  356) 				.first = 0xC0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  357) 				.last = 0xC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  358) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  359) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  360) 				.first = 0xf5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  361) 				.last = 0xf6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  362) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  363) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  364) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  365) 	[AB8500_GAS_GAUGE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  366) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  367) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  368) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  369) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  370) 				.last = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  371) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  372) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  373) 				.first = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  374) 				.last = 0x0A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  375) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  376) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  377) 				.first = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  378) 				.last = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  379) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  380) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  381) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  382) 	[AB8500_AUDIO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  383) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  384) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  385) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  386) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  387) 				.last = 0x6F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  388) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  389) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  390) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  391) 	[AB8500_INTERRUPT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  392) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  393) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  394) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  395) 	[AB8500_RTC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  396) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  397) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  398) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  399) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  400) 				.last = 0x0F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  401) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  402) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  403) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  404) 	[AB8500_MISC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  405) 		.num_ranges = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  406) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  407) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  408) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  409) 				.last = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  410) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  411) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  412) 				.first = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  413) 				.last = 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  414) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  415) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  416) 				.first = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  417) 				.last = 0x25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  418) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  419) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  420) 				.first = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  421) 				.last = 0x35,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  422) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  423) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  424) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  425) 				.last = 0x45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  426) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  427) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  428) 				.first = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  429) 				.last = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  430) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  431) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  432) 				.first = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  433) 				.last = 0x67,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  434) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  435) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  436) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  437) 				.last = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  438) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  439) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  440) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  441) 	[AB8500_DEVELOPMENT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  442) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  443) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  444) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  445) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  446) 				.last = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  447) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  448) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  449) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  450) 	[AB8500_DEBUG] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  451) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  452) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  453) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  454) 				.first = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  455) 				.last = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  456) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  457) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  458) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  459) 	[AB8500_PROD_TEST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  460) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  461) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  462) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  463) 	[AB8500_STE_TEST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  464) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  465) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  466) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  467) 	[AB8500_OTP_EMUL] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  468) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  469) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  470) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  471) 				.first = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  472) 				.last = 0x0F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  473) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  474) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  475) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  476) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  477) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  478) static struct ab8500_prcmu_ranges ab8505_debug_ranges[AB8500_NUM_BANKS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  479) 	[0x0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  480) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  481) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  482) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  483) 	[AB8500_SYS_CTRL1_BLOCK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  484) 		.num_ranges = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  485) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  486) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  487) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  488) 				.last = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  489) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  490) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  491) 				.first = 0x42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  492) 				.last = 0x42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  493) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  494) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  495) 				.first = 0x52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  496) 				.last = 0x52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  497) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  498) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  499) 				.first = 0x54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  500) 				.last = 0x57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  501) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  502) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  503) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  504) 				.last = 0x83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  505) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  506) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  507) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  508) 	[AB8500_SYS_CTRL2_BLOCK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  509) 		.num_ranges = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  510) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  511) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  512) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  513) 				.last = 0x0D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  514) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  515) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  516) 				.first = 0x0F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  517) 				.last = 0x17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  518) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  519) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  520) 				.first = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  521) 				.last = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  522) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  523) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  524) 				.first = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  525) 				.last = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  526) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  527) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  528) 				.first = 0x32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  529) 				.last = 0x3A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  530) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  531) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  532) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  533) 	[AB8500_REGU_CTRL1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  534) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  535) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  536) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  537) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  538) 				.last = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  539) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  540) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  541) 				.first = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  542) 				.last = 0x11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  543) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  544) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  545) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  546) 				.last = 0x86,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  547) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  548) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  549) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  550) 	[AB8500_REGU_CTRL2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  551) 		.num_ranges = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  552) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  553) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  554) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  555) 				.last = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  556) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  557) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  558) 				.first = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  559) 				.last = 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  560) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  561) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  562) 				.first = 0x17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  563) 				.last = 0x19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  564) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  565) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  566) 				.first = 0x1B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  567) 				.last = 0x1D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  568) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  569) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  570) 				.first = 0x1F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  571) 				.last = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  572) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  573) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  574) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  575) 				.last = 0x48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  576) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  577) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  578) 			 * 0x80-0x8B are SIM registers and should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  579) 			 * not be accessed from here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  580) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  581) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  582) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  583) 	[AB8500_USB] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  584) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  585) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  586) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  587) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  588) 				.last = 0x83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  589) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  590) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  591) 				.first = 0x87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  592) 				.last = 0x8A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  593) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  594) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  595) 				.first = 0x91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  596) 				.last = 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  597) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  598) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  599) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  600) 	[AB8500_TVOUT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  601) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  602) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  603) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  604) 	[AB8500_DBI] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  605) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  606) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  607) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  608) 	[AB8500_ECI_AV_ACC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  609) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  610) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  611) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  612) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  613) 				.last = 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  614) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  615) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  616) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  617) 	[AB8500_RESERVED] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  618) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  619) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  620) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  621) 	[AB8500_GPADC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  622) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  623) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  624) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  625) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  626) 				.last = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  627) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  628) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  629) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  630) 	[AB8500_CHARGER] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  631) 		.num_ranges = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  632) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  633) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  634) 				.first = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  635) 				.last = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  636) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  637) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  638) 				.first = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  639) 				.last = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  640) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  641) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  642) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  643) 				.last = 0x44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  644) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  645) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  646) 				.first = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  647) 				.last = 0x57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  648) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  649) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  650) 				.first = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  651) 				.last = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  652) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  653) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  654) 				.first = 0xA0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  655) 				.last = 0xA7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  656) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  657) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  658) 				.first = 0xAF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  659) 				.last = 0xB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  660) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  661) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  662) 				.first = 0xC0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  663) 				.last = 0xC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  664) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  665) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  666) 				.first = 0xF5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  667) 				.last = 0xF5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  668) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  669) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  670) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  671) 	[AB8500_GAS_GAUGE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  672) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  673) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  674) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  675) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  676) 				.last = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  677) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  678) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  679) 				.first = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  680) 				.last = 0x0A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  681) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  682) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  683) 				.first = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  684) 				.last = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  685) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  686) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  687) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  688) 	[AB8500_AUDIO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  689) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  690) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  691) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  692) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  693) 				.last = 0x83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  694) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  695) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  696) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  697) 	[AB8500_INTERRUPT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  698) 		.num_ranges = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  699) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  700) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  701) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  702) 				.last = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  703) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  704) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  705) 				.first = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  706) 				.last = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  707) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  708) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  709) 				.first = 0x09,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  710) 				.last = 0x09,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  711) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  712) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  713) 				.first = 0x0B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  714) 				.last = 0x0C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  715) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  716) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  717) 				.first = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  718) 				.last = 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  719) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  720) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  721) 				.first = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  722) 				.last = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  723) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  724) 			/* Latch registers should not be read here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  725) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  726) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  727) 				.last = 0x44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  728) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  729) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  730) 				.first = 0x46,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  731) 				.last = 0x49,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  732) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  733) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  734) 				.first = 0x4B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  735) 				.last = 0x4D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  736) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  737) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  738) 				.first = 0x52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  739) 				.last = 0x55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  740) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  741) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  742) 				.first = 0x58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  743) 				.last = 0x58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  744) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  745) 			/* LatchHier registers should not be read here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  746) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  747) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  748) 	[AB8500_RTC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  749) 		.num_ranges = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  750) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  751) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  752) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  753) 				.last = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  754) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  755) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  756) 				.first = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  757) 				.last = 0x17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  758) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  759) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  760) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  761) 	[AB8500_MISC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  762) 		.num_ranges = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  763) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  764) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  765) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  766) 				.last = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  767) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  768) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  769) 				.first = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  770) 				.last = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  771) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  772) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  773) 				.first = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  774) 				.last = 0x26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  775) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  776) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  777) 				.first = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  778) 				.last = 0x36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  779) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  780) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  781) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  782) 				.last = 0x46,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  783) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  784) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  785) 				.first = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  786) 				.last = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  787) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  788) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  789) 				.first = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  790) 				.last = 0x6B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  791) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  792) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  793) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  794) 				.last = 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  795) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  796) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  797) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  798) 	[AB8500_DEVELOPMENT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  799) 		.num_ranges = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  800) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  801) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  802) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  803) 				.last = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  804) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  805) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  806) 				.first = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  807) 				.last = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  808) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  809) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  810) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  811) 	[AB8500_DEBUG] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  812) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  813) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  814) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  815) 				.first = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  816) 				.last = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  817) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  818) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  819) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  820) 	[AB8500_PROD_TEST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  821) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  822) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  823) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  824) 	[AB8500_STE_TEST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  825) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  826) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  827) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  828) 	[AB8500_OTP_EMUL] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  829) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  830) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  831) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  832) 				.first = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  833) 				.last = 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  834) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  835) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  836) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  837) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  838) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  839) static struct ab8500_prcmu_ranges ab8540_debug_ranges[AB8500_NUM_BANKS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  840) 	[AB8500_M_FSM_RANK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  841) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  842) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  843) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  844) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  845) 				.last = 0x0B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  846) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  847) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  848) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  849) 	[AB8500_SYS_CTRL1_BLOCK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  850) 		.num_ranges = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  851) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  852) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  853) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  854) 				.last = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  855) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  856) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  857) 				.first = 0x42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  858) 				.last = 0x42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  859) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  860) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  861) 				.first = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  862) 				.last = 0x54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  863) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  864) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  865) 				.first = 0x57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  866) 				.last = 0x57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  867) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  868) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  869) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  870) 				.last = 0x83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  871) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  872) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  873) 				.first = 0x90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  874) 				.last = 0x90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  875) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  876) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  877) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  878) 	[AB8500_SYS_CTRL2_BLOCK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  879) 		.num_ranges = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  880) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  881) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  882) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  883) 				.last = 0x0D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  884) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  885) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  886) 				.first = 0x0F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  887) 				.last = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  888) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  889) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  890) 				.first = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  891) 				.last = 0x21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  892) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  893) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  894) 				.first = 0x32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  895) 				.last = 0x3C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  896) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  897) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  898) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  899) 				.last = 0x42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  900) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  901) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  902) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  903) 	[AB8500_REGU_CTRL1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  904) 		.num_ranges = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  905) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  906) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  907) 				.first = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  908) 				.last = 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  909) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  910) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  911) 				.first = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  912) 				.last = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  913) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  914) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  915) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  916) 				.last = 0x85,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  917) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  918) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  919) 				.first = 0x87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  920) 				.last = 0x88,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  921) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  922) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  923) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  924) 	[AB8500_REGU_CTRL2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  925) 		.num_ranges = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  926) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  927) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  928) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  929) 				.last = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  930) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  931) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  932) 				.first = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  933) 				.last = 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  934) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  935) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  936) 				.first = 0x17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  937) 				.last = 0x19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  938) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  939) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  940) 				.first = 0x1B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  941) 				.last = 0x1D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  942) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  943) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  944) 				.first = 0x1F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  945) 				.last = 0x2F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  946) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  947) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  948) 				.first = 0x31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  949) 				.last = 0x3A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  950) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  951) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  952) 				.first = 0x43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  953) 				.last = 0x44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  954) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  955) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  956) 				.first = 0x48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  957) 				.last = 0x49,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  958) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  959) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  960) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  961) 	[AB8500_USB] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  962) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  963) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  964) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  965) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  966) 				.last = 0x83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  967) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  968) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  969) 				.first = 0x87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  970) 				.last = 0x8A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  971) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  972) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  973) 				.first = 0x91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  974) 				.last = 0x94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  975) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  976) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  977) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  978) 	[AB8500_TVOUT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  979) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  980) 		.range = NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  981) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  982) 	[AB8500_DBI] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  983) 		.num_ranges = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  984) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  985) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  986) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  987) 				.last = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  988) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  989) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  990) 				.first = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  991) 				.last = 0x11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  992) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  993) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  994) 				.first = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  995) 				.last = 0x21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  996) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  997) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  998) 				.first = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  999) 				.last = 0x43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) 	[AB8500_ECI_AV_ACC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) 		.num_ranges = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) 				.last = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) 				.last = 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) 	[AB8500_RESERVED] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) 	[AB8500_GPADC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) 		.num_ranges = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) 				.last = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) 				.first = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) 				.last = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) 				.first = 0x09,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) 				.last = 0x0A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) 				.first = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) 				.last = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) 	[AB8500_CHARGER] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) 		.num_ranges = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) 				.last = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) 				.first = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) 				.last = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) 				.last = 0x44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) 				.first = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) 				.last = 0x57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) 				.first = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) 				.last = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) 				.first = 0x70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) 				.last = 0x70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) 				.first = 0xA0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) 				.last = 0xA9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) 				.first = 0xAF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) 				.last = 0xB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) 				.first = 0xC0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) 				.last = 0xC6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) 				.first = 0xF5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) 				.last = 0xF5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) 	[AB8500_GAS_GAUGE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) 				.last = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) 				.first = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) 				.last = 0x0A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) 				.first = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) 				.last = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) 	[AB8500_AUDIO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) 				.last = 0x9f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) 	[AB8500_INTERRUPT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) 		.num_ranges = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) 				.last = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) 				.first = 0x0B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) 				.last = 0x0D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) 				.first = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) 				.last = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) 			/* Latch registers should not be read here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) 				.last = 0x45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) 				.first = 0x4B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) 				.last = 0x4D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) 				.first = 0x52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) 				.last = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) 			/* LatchHier registers should not be read here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) 	[AB8500_RTC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) 				.last = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) 				.first = 0x0B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) 				.last = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) 				.first = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) 				.last = 0x25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) 	[AB8500_MISC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) 		.num_ranges = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) 				.last = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) 				.first = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) 				.last = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) 				.first = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) 				.last = 0x26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) 				.first = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) 				.last = 0x36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) 				.first = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) 				.last = 0x49,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) 				.first = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) 				.last = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) 				.first = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) 				.last = 0x6B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) 				.first = 0x70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) 				.last = 0x74,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) 				.last = 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) 	[AB8500_DEVELOPMENT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) 				.last = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) 				.first = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) 				.last = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) 				.first = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) 				.last = 0x21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) 	[AB8500_DEBUG] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) 		.num_ranges = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) 				.first = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) 				.last = 0x0C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) 				.first = 0x0E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) 				.last = 0x11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) 				.first = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) 				.last = 0x81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) 	[AB8500_PROD_TEST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) 	[AB8500_STE_TEST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) 		.num_ranges = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) 		.range = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) 	[AB8500_OTP_EMUL] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) 		.num_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) 		.range = (struct ab8500_reg_range[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) 			{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) 				.first = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) 				.last = 0x3F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) 			},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) static irqreturn_t ab8500_debug_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) 	char buf[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) 	struct kobject *kobj = (struct kobject *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) 	unsigned int irq_abb = irq - irq_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) 	if (irq_abb < num_irqs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) 		irq_count[irq_abb]++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) 	 * This makes it possible to use poll for events (EPOLLPRI | EPOLLERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) 	 * from userspace on sysfs file named <irq-nr>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) 	sprintf(buf, "%d", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) 	sysfs_notify(kobj, NULL, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) /* Prints to seq_file or log_buf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) static int ab8500_registers_print(struct device *dev, u32 bank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) 				  struct seq_file *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) 	for (i = 0; i < debug_ranges[bank].num_ranges; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) 		u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) 		for (reg = debug_ranges[bank].range[i].first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) 			reg <= debug_ranges[bank].range[i].last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) 			reg++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) 			u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) 			int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) 			err = abx500_get_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) 				(u8)bank, (u8)reg, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) 			if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) 				dev_err(dev, "ab->read fail %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) 				return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) 			if (s) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) 				seq_printf(s, "  [0x%02X/0x%02X]: 0x%02X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) 					   bank, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) 				/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) 				 * Error is not returned here since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) 				 * the output is wanted in any case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) 				 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) 				if (seq_has_overflowed(s))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) 					return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) 				dev_info(dev, " [0x%02X/0x%02X]: 0x%02X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) 					 bank, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) static int ab8500_bank_registers_show(struct seq_file *s, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) 	struct device *dev = s->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) 	u32 bank = debug_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) 	seq_puts(s, AB8500_NAME_STRING " register values:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) 	seq_printf(s, " bank 0x%02X:\n", bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) 	return ab8500_registers_print(dev, bank, s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) DEFINE_SHOW_ATTRIBUTE(ab8500_bank_registers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) static int ab8500_print_all_banks(struct seq_file *s, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) 	struct device *dev = s->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) 	seq_puts(s, AB8500_NAME_STRING " register values:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) 	for (i = 0; i < AB8500_NUM_BANKS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) 		int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) 		seq_printf(s, " bank 0x%02X:\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) 		err = ab8500_registers_print(dev, i, s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) /* Dump registers to kernel log */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) void ab8500_dump_all_banks(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) 	dev_info(dev, "ab8500 register values:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) 	for (i = 1; i < AB8500_NUM_BANKS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) 		dev_info(dev, " bank 0x%02X:\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) 		ab8500_registers_print(dev, i, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) static int ab8500_all_banks_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) 	struct seq_file *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) 	err = single_open(file, ab8500_print_all_banks, inode->i_private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) 	if (!err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) 		/* Default buf size in seq_read is not enough */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) 		s = (struct seq_file *)file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) 		s->size = (PAGE_SIZE * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) 		s->buf = kmalloc(s->size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) 		if (!s->buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) 			single_release(inode, file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) 			err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) static const struct file_operations ab8500_all_banks_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) 	.open = ab8500_all_banks_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) 	.read = seq_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) 	.llseek = seq_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) 	.release = single_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) static int ab8500_bank_print(struct seq_file *s, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) 	seq_printf(s, "0x%02X\n", debug_bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) static int ab8500_bank_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) 	return single_open(file, ab8500_bank_print, inode->i_private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) static ssize_t ab8500_bank_write(struct file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) 	const char __user *user_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) 	size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) 	unsigned long user_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) 	err = kstrtoul_from_user(user_buf, count, 0, &user_bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) 	if (user_bank >= AB8500_NUM_BANKS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) 		dev_err(dev, "debugfs error input > number of banks\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) 	debug_bank = user_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) static int ab8500_address_print(struct seq_file *s, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) 	seq_printf(s, "0x%02X\n", debug_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) static int ab8500_address_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) 	return single_open(file, ab8500_address_print, inode->i_private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) static ssize_t ab8500_address_write(struct file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) 				    const char __user *user_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) 				    size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) 	unsigned long user_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) 	err = kstrtoul_from_user(user_buf, count, 0, &user_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) 	if (user_address > 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) 		dev_err(dev, "debugfs error input > 0xff\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) 	debug_address = user_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) static int ab8500_val_print(struct seq_file *s, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) 	struct device *dev = s->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) 	u8 regvalue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) 	ret = abx500_get_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) 		(u8)debug_bank, (u8)debug_address, &regvalue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) 		dev_err(dev, "abx500_get_reg fail %d, %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) 			ret, __LINE__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) 	seq_printf(s, "0x%02X\n", regvalue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) static int ab8500_val_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) 	return single_open(file, ab8500_val_print, inode->i_private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) static ssize_t ab8500_val_write(struct file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) 				const char __user *user_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) 				size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) 	unsigned long user_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) 	err = kstrtoul_from_user(user_buf, count, 0, &user_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) 	if (user_val > 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) 		dev_err(dev, "debugfs error input > 0xff\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) 	err = abx500_set_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) 		(u8)debug_bank, debug_address, (u8)user_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) 		pr_err("abx500_set_reg failed %d, %d", err, __LINE__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)  * Interrupt status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) static u32 num_interrupts[AB8500_MAX_NR_IRQS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) static u32 num_wake_interrupts[AB8500_MAX_NR_IRQS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) static int num_interrupt_lines;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) void ab8500_debug_register_interrupt(int line)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) 	if (line < num_interrupt_lines)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) 		num_interrupts[line]++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) static int ab8500_interrupts_show(struct seq_file *s, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) 	int line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) 	seq_puts(s, "name: number:  number of: wake:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) 	for (line = 0; line < num_interrupt_lines; line++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) 		struct irq_desc *desc = irq_to_desc(line + irq_first);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) 		seq_printf(s, "%3i:  %6i %4i",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) 			   line,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) 			   num_interrupts[line],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) 			   num_wake_interrupts[line]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) 		if (desc && desc->name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) 			seq_printf(s, "-%-8s", desc->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) 		if (desc && desc->action) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) 			struct irqaction *action = desc->action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) 			seq_printf(s, "  %s", action->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) 			while ((action = action->next) != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) 				seq_printf(s, ", %s", action->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) 		seq_putc(s, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) DEFINE_SHOW_ATTRIBUTE(ab8500_interrupts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544)  * - HWREG DB8500 formated routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) static int ab8500_hwreg_print(struct seq_file *s, void *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) 	struct device *dev = s->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) 	u8 regvalue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) 	ret = abx500_get_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) 		(u8)hwreg_cfg.bank, (u8)hwreg_cfg.addr, &regvalue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) 		dev_err(dev, "abx500_get_reg fail %d, %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) 			ret, __LINE__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) 	if (hwreg_cfg.shift >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) 		regvalue >>= hwreg_cfg.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) 		regvalue <<= -hwreg_cfg.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) 	regvalue &= hwreg_cfg.mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) 	if (REG_FMT_DEC(&hwreg_cfg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) 		seq_printf(s, "%d\n", regvalue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) 		seq_printf(s, "0x%02X\n", regvalue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) static int ab8500_hwreg_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) 	return single_open(file, ab8500_hwreg_print, inode->i_private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) #define AB8500_SUPPLY_CONTROL_CONFIG_1 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) #define AB8500_SUPPLY_CONTROL_REG 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) #define AB8500_FIRST_SIM_REG 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) #define AB8500_LAST_SIM_REG 0x8B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) #define AB8505_LAST_SIM_REG 0x8C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) static int ab8500_modem_show(struct seq_file *s, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) 	struct device *dev = s->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) 	struct ab8500 *ab8500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) 	u8 orig_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) 	u32 bank = AB8500_REGU_CTRL2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) 	u32 last_sim_reg = AB8500_LAST_SIM_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) 	u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) 	ab8500 = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) 	dev_warn(dev, "WARNING! This operation can interfer with modem side\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) 		"and should only be done with care\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) 	err = abx500_get_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) 		AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG, &orig_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) 		goto report_read_failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) 	/* Config 1 will allow APE side to read SIM registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) 	err = abx500_set_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) 		AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) 		AB8500_SUPPLY_CONTROL_CONFIG_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) 		goto report_write_failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) 	seq_printf(s, " bank 0x%02X:\n", bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) 	if (is_ab9540(ab8500) || is_ab8505(ab8500))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) 		last_sim_reg = AB8505_LAST_SIM_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) 	for (reg = AB8500_FIRST_SIM_REG; reg <= last_sim_reg; reg++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) 		err = abx500_get_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) 			bank, reg, &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) 		if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) 			goto report_read_failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) 		seq_printf(s, "  [0x%02X/0x%02X]: 0x%02X\n", bank, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) 	err = abx500_set_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) 		AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG, orig_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) 		goto report_write_failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) report_read_failure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) 	dev_err(dev, "ab->read fail %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) report_write_failure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) 	dev_err(dev, "ab->write fail %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) DEFINE_SHOW_ATTRIBUTE(ab8500_modem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643)  * return length of an ASCII numerical value, 0 is string is not a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644)  * numerical value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645)  * string shall start at value 1st char.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646)  * string can be tailed with \0 or space or newline chars only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647)  * value can be decimal or hexadecimal (prefixed 0x or 0X).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) static int strval_len(char *b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) 	char *s = b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) 	if ((*s == '0') && ((*(s+1) == 'x') || (*(s+1) == 'X'))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) 		s += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) 		for (; *s && (*s != ' ') && (*s != '\n'); s++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) 			if (!isxdigit(*s))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) 		if (*s == '-')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) 			s++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) 		for (; *s && (*s != ' ') && (*s != '\n'); s++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) 			if (!isdigit(*s))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) 	return (int) (s-b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671)  * parse hwreg input data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672)  * update global hwreg_cfg only if input data syntax is ok.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) static ssize_t hwreg_common_write(char *b, struct hwreg_cfg *cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) 		struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) 	uint write, val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) 	u8  regvalue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) 	struct hwreg_cfg loc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) 		.bank = 0,          /* default: invalid phys addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) 		.addr = 0,          /* default: invalid phys addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) 		.fmt = 0,           /* default: 32bit access, hex output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) 		.mask = 0xFFFFFFFF, /* default: no mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) 		.shift = 0,         /* default: no bit shift */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) 	/* read or write ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) 	if (!strncmp(b, "read ", 5)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) 		write = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) 		b += 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) 	} else if (!strncmp(b, "write ", 6)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) 		write = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) 		b += 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) 	/* OPTIONS -l|-w|-b -s -m -o */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) 	while ((*b == ' ') || (*b == '-')) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) 		if (*(b-1) != ' ') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) 			b++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) 		if ((!strncmp(b, "-d ", 3)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) 				(!strncmp(b, "-dec ", 5))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) 			b += (*(b+2) == ' ') ? 3 : 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) 			loc.fmt |= (1<<0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) 		} else if ((!strncmp(b, "-h ", 3)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) 				(!strncmp(b, "-hex ", 5))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) 			b += (*(b+2) == ' ') ? 3 : 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) 			loc.fmt &= ~(1<<0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) 		} else if ((!strncmp(b, "-m ", 3)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) 				(!strncmp(b, "-mask ", 6))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) 			b += (*(b+2) == ' ') ? 3 : 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) 			if (strval_len(b) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) 			ret = kstrtoul(b, 0, &loc.mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) 			if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) 		} else if ((!strncmp(b, "-s ", 3)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) 				(!strncmp(b, "-shift ", 7))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) 			b += (*(b+2) == ' ') ? 3 : 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) 			if (strval_len(b) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) 			ret = kstrtol(b, 0, &loc.shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) 			if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) 	/* get arg BANK and ADDRESS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) 	if (strval_len(b) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) 	ret = kstrtouint(b, 0, &loc.bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) 	while (*b == ' ')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) 		b++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) 	if (strval_len(b) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) 	ret = kstrtoul(b, 0, &loc.addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) 	if (write) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) 		while (*b == ' ')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) 			b++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) 		if (strval_len(b) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) 		ret = kstrtouint(b, 0, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) 	/* args are ok, update target cfg (mainly for read) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) 	*cfg = loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) #ifdef ABB_HWREG_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) 	pr_warn("HWREG request: %s, %s,\n", (write) ? "write" : "read",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) 		REG_FMT_DEC(cfg) ? "decimal" : "hexa");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) 	pr_warn("  addr=0x%08X, mask=0x%X, shift=%d" "value=0x%X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) 		cfg->addr, cfg->mask, cfg->shift, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) 	if (!write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) 	ret = abx500_get_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) 			(u8)cfg->bank, (u8)cfg->addr, &regvalue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) 		dev_err(dev, "abx500_get_reg fail %d, %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) 			ret, __LINE__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) 	if (cfg->shift >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) 		regvalue &= ~(cfg->mask << (cfg->shift));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) 		val = (val & cfg->mask) << (cfg->shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) 		regvalue &= ~(cfg->mask >> (-cfg->shift));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) 		val = (val & cfg->mask) >> (-cfg->shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) 	val = val | regvalue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) 	ret = abx500_set_register_interruptible(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) 			(u8)cfg->bank, (u8)cfg->addr, (u8)val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) 		pr_err("abx500_set_reg failed %d, %d", ret, __LINE__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) static ssize_t ab8500_hwreg_write(struct file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) 	const char __user *user_buf, size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) 	char buf[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) 	int buf_size, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) 	/* Get userspace string and assure termination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) 	buf_size = min((int)count, (int)(sizeof(buf)-1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) 	if (copy_from_user(buf, user_buf, buf_size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) 		return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) 	buf[buf_size] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) 	/* get args and process */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) 	ret = hwreg_common_write(buf, &hwreg_cfg, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) 	return (ret) ? ret : buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815)  * - irq subscribe/unsubscribe stuff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) static int ab8500_subscribe_unsubscribe_print(struct seq_file *s, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) 	seq_printf(s, "%d\n", irq_first);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) static int ab8500_subscribe_unsubscribe_open(struct inode *inode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) 					     struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) 	return single_open(file, ab8500_subscribe_unsubscribe_print,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) 		inode->i_private);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832)  * Userspace should use poll() on this file. When an event occur
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833)  * the blocking poll will be released.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) static ssize_t show_irq(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) 			struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) 	unsigned long name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) 	unsigned int irq_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) 	err = kstrtoul(attr->attr.name, 0, &name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) 	irq_index = name - irq_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) 	if (irq_index >= num_irqs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) 	return sprintf(buf, "%u\n", irq_count[irq_index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) static ssize_t ab8500_subscribe_write(struct file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) 				      const char __user *user_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) 				      size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) 	unsigned long user_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) 	unsigned int irq_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) 	err = kstrtoul_from_user(user_buf, count, 0, &user_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) 	if (user_val < irq_first) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) 		dev_err(dev, "debugfs error input < %d\n", irq_first);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) 	if (user_val > irq_last) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) 		dev_err(dev, "debugfs error input > %d\n", irq_last);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) 	irq_index = user_val - irq_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) 	if (irq_index >= num_irqs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) 	 * This will create a sysfs file named <irq-nr> which userspace can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) 	 * use to select or poll and get the AB8500 events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) 	dev_attr[irq_index] = kmalloc(sizeof(struct device_attribute),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) 		GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) 	if (!dev_attr[irq_index])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) 	event_name[irq_index] = kasprintf(GFP_KERNEL, "%lu", user_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) 	if (!event_name[irq_index])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) 	dev_attr[irq_index]->show = show_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) 	dev_attr[irq_index]->store = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) 	dev_attr[irq_index]->attr.name = event_name[irq_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) 	dev_attr[irq_index]->attr.mode = S_IRUGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) 	err = sysfs_create_file(&dev->kobj, &dev_attr[irq_index]->attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) 		pr_info("sysfs_create_file failed %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) 	err = request_threaded_irq(user_val, NULL, ab8500_debug_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) 				   IRQF_SHARED | IRQF_NO_SUSPEND | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) 				   "ab8500-debug", &dev->kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) 		pr_info("request_threaded_irq failed %d, %lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) 			err, user_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) 		sysfs_remove_file(&dev->kobj, &dev_attr[irq_index]->attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) static ssize_t ab8500_unsubscribe_write(struct file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) 					const char __user *user_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) 					size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) 	unsigned long user_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) 	unsigned int irq_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) 	err = kstrtoul_from_user(user_buf, count, 0, &user_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) 	if (user_val < irq_first) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) 		dev_err(dev, "debugfs error input < %d\n", irq_first);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) 	if (user_val > irq_last) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) 		dev_err(dev, "debugfs error input > %d\n", irq_last);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) 	irq_index = user_val - irq_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) 	if (irq_index >= num_irqs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) 	/* Set irq count to 0 when unsubscribe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) 	irq_count[irq_index] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) 	if (dev_attr[irq_index])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) 		sysfs_remove_file(&dev->kobj, &dev_attr[irq_index]->attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) 	free_irq(user_val, &dev->kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) 	kfree(event_name[irq_index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) 	kfree(dev_attr[irq_index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956)  * - several debugfs nodes fops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) static const struct file_operations ab8500_bank_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) 	.open = ab8500_bank_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) 	.write = ab8500_bank_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) 	.read = seq_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) 	.llseek = seq_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) 	.release = single_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) static const struct file_operations ab8500_address_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) 	.open = ab8500_address_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) 	.write = ab8500_address_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) 	.read = seq_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) 	.llseek = seq_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) 	.release = single_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) static const struct file_operations ab8500_val_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) 	.open = ab8500_val_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) 	.write = ab8500_val_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) 	.read = seq_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) 	.llseek = seq_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) 	.release = single_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) static const struct file_operations ab8500_subscribe_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) 	.open = ab8500_subscribe_unsubscribe_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) 	.write = ab8500_subscribe_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) 	.read = seq_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) 	.llseek = seq_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) 	.release = single_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) static const struct file_operations ab8500_unsubscribe_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) 	.open = ab8500_subscribe_unsubscribe_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) 	.write = ab8500_unsubscribe_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) 	.read = seq_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) 	.llseek = seq_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) 	.release = single_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) static const struct file_operations ab8500_hwreg_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) 	.open = ab8500_hwreg_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) 	.write = ab8500_hwreg_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) 	.read = seq_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) 	.llseek = seq_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) 	.release = single_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) static int ab8500_debug_probe(struct platform_device *plf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) 	struct dentry *ab8500_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) 	struct ab8500 *ab8500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) 	debug_bank = AB8500_MISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) 	debug_address = AB8500_REV_REG & 0x00FF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) 	ab8500 = dev_get_drvdata(plf->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) 	num_irqs = ab8500->mask_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) 	irq_count = devm_kcalloc(&plf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) 				 num_irqs, sizeof(*irq_count), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) 	if (!irq_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) 	dev_attr = devm_kcalloc(&plf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) 				num_irqs, sizeof(*dev_attr), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) 	if (!dev_attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) 	event_name = devm_kcalloc(&plf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) 				  num_irqs, sizeof(*event_name), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) 	if (!event_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) 	res = platform_get_resource_byname(plf, 0, "IRQ_AB8500");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) 	if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) 		dev_err(&plf->dev, "AB8500 irq not found, err %d\n", irq_first);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) 	irq_ab8500 = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) 	irq_first = platform_get_irq_byname(plf, "IRQ_FIRST");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) 	if (irq_first < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) 		return irq_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) 	irq_last = platform_get_irq_byname(plf, "IRQ_LAST");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) 	if (irq_last < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) 		return irq_last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) 	ab8500_dir = debugfs_create_dir(AB8500_NAME_STRING, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) 	debugfs_create_file("all-bank-registers", S_IRUGO, ab8500_dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) 			    &plf->dev, &ab8500_bank_registers_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) 	debugfs_create_file("all-banks", S_IRUGO, ab8500_dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) 			    &plf->dev, &ab8500_all_banks_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) 	debugfs_create_file("register-bank", (S_IRUGO | S_IWUSR | S_IWGRP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) 			    ab8500_dir, &plf->dev, &ab8500_bank_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) 	debugfs_create_file("register-address", (S_IRUGO | S_IWUSR | S_IWGRP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) 			    ab8500_dir, &plf->dev, &ab8500_address_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) 	debugfs_create_file("register-value", (S_IRUGO | S_IWUSR | S_IWGRP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) 			    ab8500_dir, &plf->dev, &ab8500_val_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) 	debugfs_create_file("irq-subscribe", (S_IRUGO | S_IWUSR | S_IWGRP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) 			    ab8500_dir, &plf->dev, &ab8500_subscribe_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) 	if (is_ab8500(ab8500)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) 		debug_ranges = ab8500_debug_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) 		num_interrupt_lines = AB8500_NR_IRQS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) 	} else if (is_ab8505(ab8500)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) 		debug_ranges = ab8505_debug_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) 		num_interrupt_lines = AB8505_NR_IRQS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) 	} else if (is_ab9540(ab8500)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) 		debug_ranges = ab8505_debug_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) 		num_interrupt_lines = AB9540_NR_IRQS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) 	} else if (is_ab8540(ab8500)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) 		debug_ranges = ab8540_debug_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) 		num_interrupt_lines = AB8540_NR_IRQS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) 	debugfs_create_file("interrupts", (S_IRUGO), ab8500_dir, &plf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) 			    &ab8500_interrupts_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) 	debugfs_create_file("irq-unsubscribe", (S_IRUGO | S_IWUSR | S_IWGRP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) 			    ab8500_dir, &plf->dev, &ab8500_unsubscribe_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) 	debugfs_create_file("hwreg", (S_IRUGO | S_IWUSR | S_IWGRP), ab8500_dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) 			    &plf->dev, &ab8500_hwreg_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) 	debugfs_create_file("all-modem-registers", (S_IRUGO | S_IWUSR | S_IWGRP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) 			    ab8500_dir, &plf->dev, &ab8500_modem_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) static struct platform_driver ab8500_debug_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) 		.name = "ab8500-debug",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) 		.suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) 	.probe  = ab8500_debug_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) static int __init ab8500_debug_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) 	return platform_driver_register(&ab8500_debug_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) subsys_initcall(ab8500_debug_init);