^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * linux/drivers/message/fusion/mptioctl.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Fusion MPT misc device (ioctl) driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * For use with PCI chip/adapter(s):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * LSIFC9xx/LSI409xx Fibre Channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * running LSI Fusion MPT (Message Passing Technology) firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (c) 1999-2008 LSI Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * (mailto:DL-MPTFusionLinux@lsi.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) solely responsible for determining the appropriateness of using and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) distributing the Program and assumes all risks associated with its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) exercise of rights under this Agreement, including but not limited to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) the risks and costs of program errors, damage to or loss of data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) programs or equipment, and unavailability or interruption of operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) DISCLAIMER OF LIABILITY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #ifndef MPTCTL_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define MPTCTL_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define MPT_MISCDEV_BASENAME "mptctl"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define MPT_MISCDEV_PATHNAME "/dev/" MPT_MISCDEV_BASENAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define MPT_PRODUCT_LENGTH 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * Generic MPT Control IOCTLs and structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define MPT_MAGIC_NUMBER 'm'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define MPTRWPERF _IOWR(MPT_MAGIC_NUMBER,0,struct mpt_raw_r_w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define MPTFWDOWNLOAD _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define MPTCOMMAND _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #if defined(__KERNEL__) && defined(CONFIG_COMPAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define MPTFWDOWNLOAD32 _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define MPTCOMMAND32 _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define MPTIOCINFO _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define MPTIOCINFO1 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define MPTIOCINFO2 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define MPTTARGETINFO _IOWR(MPT_MAGIC_NUMBER,18,struct mpt_ioctl_targetinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define MPTTEST _IOWR(MPT_MAGIC_NUMBER,19,struct mpt_ioctl_test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define MPTEVENTQUERY _IOWR(MPT_MAGIC_NUMBER,21,struct mpt_ioctl_eventquery)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define MPTEVENTENABLE _IOWR(MPT_MAGIC_NUMBER,22,struct mpt_ioctl_eventenable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define MPTEVENTREPORT _IOWR(MPT_MAGIC_NUMBER,23,struct mpt_ioctl_eventreport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define MPTHARDRESET _IOWR(MPT_MAGIC_NUMBER,24,struct mpt_ioctl_diag_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define MPTFWREPLACE _IOWR(MPT_MAGIC_NUMBER,25,struct mpt_ioctl_replace_fw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * SPARC PLATFORM REMARKS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * IOCTL data structures that contain pointers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * will have different sizes in the driver and applications
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * (as the app. will not use 8-byte pointers).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * Apps should use MPTFWDOWNLOAD and MPTCOMMAND.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * The driver will convert data from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * mpt_fw_xfer32 (mpt_ioctl_command32) to mpt_fw_xfer (mpt_ioctl_command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * internally.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * If data structures change size, must handle as in IOCGETINFO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct mpt_fw_xfer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned int iocnum; /* IOC unit number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned int fwlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) void __user *bufp; /* Pointer to firmware buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #if defined(__KERNEL__) && defined(CONFIG_COMPAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct mpt_fw_xfer32 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) unsigned int iocnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) unsigned int fwlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 bufp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #endif /*}*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * IOCTL header structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * iocnum - must be defined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * port - must be defined for all IOCTL commands other than MPTIOCINFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * maxDataSize - ignored on MPTCOMMAND commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * - ignored on MPTFWREPLACE commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * - on query commands, reports the maximum number of bytes to be returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * to the host driver (count includes the header).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * That is, set to sizeof(struct mpt_ioctl_iocinfo) for fixed sized commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * Set to sizeof(struct mpt_ioctl_targetinfo) + datasize for variable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * sized commands. (MPTTARGETINFO, MPTEVENTREPORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) typedef struct _mpt_ioctl_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned int iocnum; /* IOC unit number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned int port; /* IOC port number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int maxDataSize; /* Maximum Num. bytes to transfer on read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) } mpt_ioctl_header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * Issue a diagnostic reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct mpt_ioctl_diag_reset {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * PCI bus/device/function information structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct mpt_ioctl_pci_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) unsigned int deviceNumber : 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) unsigned int functionNumber : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) unsigned int busNumber : 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) } bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) unsigned int asUlong;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct mpt_ioctl_pci_info2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) unsigned int deviceNumber : 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) unsigned int functionNumber : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) unsigned int busNumber : 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) } bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned int asUlong;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int segmentID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * Adapter Information Page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * Read only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * Data starts at offset 0xC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define MPT_IOCTL_INTERFACE_SCSI (0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define MPT_IOCTL_INTERFACE_FC (0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define MPT_IOCTL_INTERFACE_FC_IP (0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define MPT_IOCTL_INTERFACE_SAS (0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define MPT_IOCTL_VERSION_LENGTH (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct mpt_ioctl_iocinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int adapterType; /* SCSI or FCP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) int port; /* port number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int pciId; /* PCI Id. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) int hwRev; /* hardware revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) int subSystemDevice; /* PCI subsystem Device ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int subSystemVendor; /* PCI subsystem Vendor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) int numDevices; /* number of devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int FWVersion; /* FW Version (integer) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) int BIOSVersion; /* BIOS Version (integer) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) char driverVersion[MPT_IOCTL_VERSION_LENGTH]; /* Driver Version (string) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) char busChangeEvent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) char hostId;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) char rsvd[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct mpt_ioctl_pci_info2 pciInfo; /* Added Rev 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct mpt_ioctl_iocinfo_rev1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) int adapterType; /* SCSI or FCP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) int port; /* port number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) int pciId; /* PCI Id. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int hwRev; /* hardware revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int subSystemDevice; /* PCI subsystem Device ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) int subSystemVendor; /* PCI subsystem Vendor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) int numDevices; /* number of devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int FWVersion; /* FW Version (integer) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) int BIOSVersion; /* BIOS Version (integer) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) char driverVersion[MPT_IOCTL_VERSION_LENGTH]; /* Driver Version (string) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) char busChangeEvent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) char hostId;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) char rsvd[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) struct mpt_ioctl_pci_info pciInfo; /* Added Rev 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /* Original structure, must always accept these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * IOCTLs. 4 byte pads can occur based on arch with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * above structure. Wish to re-align, but cannot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct mpt_ioctl_iocinfo_rev0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) int adapterType; /* SCSI or FCP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) int port; /* port number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) int pciId; /* PCI Id. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) int hwRev; /* hardware revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int subSystemDevice; /* PCI subsystem Device ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) int subSystemVendor; /* PCI subsystem Vendor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) int numDevices; /* number of devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int FWVersion; /* FW Version (integer) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) int BIOSVersion; /* BIOS Version (integer) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) char driverVersion[MPT_IOCTL_VERSION_LENGTH]; /* Driver Version (string) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) char busChangeEvent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) char hostId;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) char rsvd[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * Device Information Page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * Report the number of, and ids of, all targets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * on this IOC. The ids array is a packed structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * of the known targetInfo.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * bits 31-24: reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * 23-16: LUN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * 15- 8: Bus Number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * 7- 0: Target ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) struct mpt_ioctl_targetinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) int numDevices; /* Num targets on this ioc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) int targetInfo[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * Event reporting IOCTL's. These IOCTL's will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * use the following defines:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct mpt_ioctl_eventquery {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) unsigned short eventEntries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) unsigned short reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) unsigned int eventTypes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct mpt_ioctl_eventenable {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) unsigned int eventTypes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #ifndef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) typedef struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) uint event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) uint eventContext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) uint data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) } MPT_IOCTL_EVENTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) struct mpt_ioctl_eventreport {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) MPT_IOCTL_EVENTS eventData[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define MPT_MAX_NAME 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct mpt_ioctl_test {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) u8 name[MPT_MAX_NAME];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) int chip_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 product [MPT_PRODUCT_LENGTH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* Replace the FW image cached in host driver memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * newImageSize - image size in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * newImage - first byte of the new image
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) typedef struct mpt_ioctl_replace_fw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) int newImageSize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) u8 newImage[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) } mpt_ioctl_replace_fw_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* General MPT Pass through data strucutre
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * iocnum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * timeout - in seconds, command timeout. If 0, set by driver to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * default value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * replyFrameBufPtr - reply location
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * dataInBufPtr - destination for read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * dataOutBufPtr - data source for write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * senseDataPtr - sense data location
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * maxReplyBytes - maximum number of reply bytes to be sent to app.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * dataInSize - num bytes for data transfer in (read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * dataOutSize - num bytes for data transfer out (write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * dataSgeOffset - offset in words from the start of the request message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * to the first SGL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * MF[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * Remark: Some config pages have bi-directional transfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * both a read and a write. The basic structure allows for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * a bidirectional set up. Normal messages will have one or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * both of these buffers NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct mpt_ioctl_command {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) int timeout; /* optional (seconds) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) char __user *replyFrameBufPtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) char __user *dataInBufPtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) char __user *dataOutBufPtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) char __user *senseDataPtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) int maxReplyBytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) int dataInSize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) int dataOutSize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) int maxSenseBytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) int dataSgeOffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) char MF[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * SPARC PLATFORM: See earlier remark.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #if defined(__KERNEL__) && defined(CONFIG_COMPAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct mpt_ioctl_command32 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) mpt_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) int timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) u32 replyFrameBufPtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) u32 dataInBufPtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) u32 dataOutBufPtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) u32 senseDataPtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) int maxReplyBytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) int dataInSize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int dataOutSize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) int maxSenseBytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) int dataSgeOffset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) char MF[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #endif /*}*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #define CPQFCTS_IOC_MAGIC 'Z'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define HP_IOC_MAGIC 'Z'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #define HP_GETHOSTINFO _IOR(HP_IOC_MAGIC, 20, hp_host_info_t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define HP_GETHOSTINFO1 _IOR(HP_IOC_MAGIC, 20, hp_host_info_rev0_t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #define HP_GETTARGETINFO _IOR(HP_IOC_MAGIC, 21, hp_target_info_t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) typedef struct _hp_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) unsigned int iocnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) unsigned int host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) unsigned int channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) unsigned int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) unsigned int lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) } hp_header_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * Header:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * iocnum required (input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * host ignored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * channe ignored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * id ignored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * lun ignored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) typedef struct _hp_host_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) hp_header_t hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) u16 vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) u16 device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) u16 subsystem_vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) u16 subsystem_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) u8 devfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) u8 bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) ushort host_no; /* SCSI Host number, if scsi driver not loaded*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) u8 fw_version[16]; /* string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) u8 serial_number[24]; /* string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) u32 ioc_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) u32 bus_phys_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) u32 base_io_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) u32 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) unsigned int hard_resets; /* driver initiated resets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) unsigned int soft_resets; /* ioc, external resets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) unsigned int timeouts; /* num timeouts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) } hp_host_info_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /* replace ulongs with uints, need to preserve backwards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * compatibility.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) typedef struct _hp_host_info_rev0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) hp_header_t hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) u16 vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) u16 device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) u16 subsystem_vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) u16 subsystem_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) u8 devfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) u8 bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) ushort host_no; /* SCSI Host number, if scsi driver not loaded*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) u8 fw_version[16]; /* string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) u8 serial_number[24]; /* string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) u32 ioc_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) u32 bus_phys_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) u32 base_io_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) u32 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) unsigned long hard_resets; /* driver initiated resets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) unsigned long soft_resets; /* ioc, external resets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) unsigned long timeouts; /* num timeouts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) } hp_host_info_rev0_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) * Header:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * iocnum required (input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) * host required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) * channel required (bus number)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) * id required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) * lun ignored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) * All error values between 0 and 0xFFFF in size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) typedef struct _hp_target_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) hp_header_t hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) u32 parity_errors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) u32 phase_errors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) u32 select_timeouts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) u32 message_rejects;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) u32 negotiated_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) u8 negotiated_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) u8 rsvd[7]; /* 8 byte alignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) } hp_target_info_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #define HP_STATUS_OTHER 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) #define HP_STATUS_OK 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) #define HP_STATUS_FAILED 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define HP_BUS_WIDTH_UNK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #define HP_BUS_WIDTH_8 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define HP_BUS_WIDTH_16 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) #define HP_BUS_WIDTH_32 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define HP_DEV_SPEED_ASYNC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #define HP_DEV_SPEED_FAST 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #define HP_DEV_SPEED_ULTRA 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) #define HP_DEV_SPEED_ULTRA2 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) #define HP_DEV_SPEED_ULTRA160 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) #define HP_DEV_SPEED_SCSI1 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) #define HP_DEV_SPEED_ULTRA320 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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