^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * linux/drivers/message/fusion/mptbase.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * High performance SCSI + LAN / Fibre Channel device drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * For use with PCI chip/adapter(s):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * LSIFC9xx/LSI409xx Fibre Channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * running LSI Fusion MPT (Message Passing Technology) firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (c) 1999-2008 LSI Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * (mailto:DL-MPTFusionLinux@lsi.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) solely responsible for determining the appropriateness of using and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) distributing the Program and assumes all risks associated with its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) exercise of rights under this Agreement, including but not limited to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) the risks and costs of program errors, damage to or loss of data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) programs or equipment, and unavailability or interruption of operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) DISCLAIMER OF LIABILITY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #ifndef MPTBASE_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define MPTBASE_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*{-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include "lsi/mpi_type.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include "lsi/mpi.h" /* Fusion MPI(nterface) basic defs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include "lsi/mpi_ioc.h" /* Fusion MPT IOC(ontroller) defs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include "lsi/mpi_cnfg.h" /* IOC configuration support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include "lsi/mpi_init.h" /* SCSI Host (initiator) protocol support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include "lsi/mpi_lan.h" /* LAN over FC protocol support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include "lsi/mpi_raid.h" /* Integrated Mirroring support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include "lsi/mpi_fc.h" /* Fibre Channel (lowlevel) support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include "lsi/mpi_targ.h" /* SCSI/FCP Target protcol support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include "lsi/mpi_tool.h" /* Tools support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #include "lsi/mpi_sas.h" /* SAS support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #ifndef MODULEAUTHOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define MODULEAUTHOR "LSI Corporation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #ifndef COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define COPYRIGHT "Copyright (c) 1999-2008 " MODULEAUTHOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define MPT_LINUX_VERSION_COMMON "3.04.20"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.20"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define WHAT_MAGIC_STRING "@" "(" "#" ")"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define show_mptmod_ver(s,ver) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) printk(KERN_INFO "%s %s\n", s, ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * Fusion MPT(linux) driver configurable stuff...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define MPT_MAX_ADAPTERS 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define MPT_MAX_PROTOCOL_DRIVERS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define MPT_MAX_CALLBACKNAME_LEN 49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define MPT_MAX_BUS 1 /* Do not change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define MPT_MAX_FC_DEVICES 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define MPT_MAX_SCSI_DEVICES 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define MPT_LAST_LUN 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define MPT_SENSE_BUFFER_ALLOC 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* allow for 256 max sense alloc, but only 255 max request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #if MPT_SENSE_BUFFER_ALLOC >= 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) # undef MPT_SENSE_BUFFER_ALLOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) # define MPT_SENSE_BUFFER_ALLOC 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) # define MPT_SENSE_BUFFER_SIZE 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) # define MPT_SENSE_BUFFER_SIZE MPT_SENSE_BUFFER_ALLOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define MPT_NAME_LENGTH 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define MPT_KOBJ_NAME_LEN 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define MPT_PROCFS_MPTBASEDIR "mpt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* chg it to "driver/fusion" ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define MPT_PROCFS_SUMMARY_ALL_NODE MPT_PROCFS_MPTBASEDIR "/summary"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define MPT_PROCFS_SUMMARY_ALL_PATHNAME "/proc/" MPT_PROCFS_SUMMARY_ALL_NODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define MPT_FW_REV_MAGIC_ID_STRING "FwRev="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define MPT_MAX_REQ_DEPTH 1023
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define MPT_DEFAULT_REQ_DEPTH 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define MPT_MIN_REQ_DEPTH 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define MPT_MAX_REPLY_DEPTH MPT_MAX_REQ_DEPTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define MPT_DEFAULT_REPLY_DEPTH 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define MPT_MIN_REPLY_DEPTH 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define MPT_MAX_REPLIES_PER_ISR 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define MPT_MAX_FRAME_SIZE 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define MPT_DEFAULT_FRAME_SIZE 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define MPT_REPLY_FRAME_SIZE 0x50 /* Must be a multiple of 8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define MPT_SG_REQ_128_SCALE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define MPT_SG_REQ_96_SCALE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define MPT_SG_REQ_64_SCALE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define CAN_SLEEP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define NO_SLEEP 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define MPT_COALESCING_TIMEOUT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * SCSI transfer rate defines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define MPT_ULTRA320 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define MPT_ULTRA160 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define MPT_ULTRA2 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define MPT_ULTRA 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define MPT_FAST 0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define MPT_SCSI 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define MPT_ASYNC 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define MPT_NARROW 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define MPT_WIDE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define C0_1030 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define XL_929 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * Try to keep these at 2^N-1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define MPT_FC_CAN_QUEUE 1024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define MPT_SCSI_CAN_QUEUE 127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define MPT_SAS_CAN_QUEUE 127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * Set the MAX_SGE value based on user input.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #ifdef CONFIG_FUSION_MAX_SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #if CONFIG_FUSION_MAX_SGE < 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define MPT_SCSI_SG_DEPTH 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #elif CONFIG_FUSION_MAX_SGE > 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define MPT_SCSI_SG_DEPTH 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define MPT_SCSI_SG_DEPTH CONFIG_FUSION_MAX_SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define MPT_SCSI_SG_DEPTH 40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #ifdef CONFIG_FUSION_MAX_FC_SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #if CONFIG_FUSION_MAX_FC_SGE < 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define MPT_SCSI_FC_SG_DEPTH 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #elif CONFIG_FUSION_MAX_FC_SGE > 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define MPT_SCSI_FC_SG_DEPTH 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define MPT_SCSI_FC_SG_DEPTH CONFIG_FUSION_MAX_FC_SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define MPT_SCSI_FC_SG_DEPTH 40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* debug print string length used for events and iocstatus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) # define EVENT_DESCR_STR_SZ 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define MPT_POLLING_INTERVAL 1000 /* in milliseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #ifdef __KERNEL__ /* { */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * Attempt semi-consistent error & warning msgs across
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * MPT drivers. NOTE: Users of these macro defs must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * themselves define their own MYNAM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define MYIOC_s_FMT MYNAM ": %s: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define MYIOC_s_DEBUG_FMT KERN_DEBUG MYNAM ": %s: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define MYIOC_s_INFO_FMT KERN_INFO MYNAM ": %s: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define MYIOC_s_NOTE_FMT KERN_NOTICE MYNAM ": %s: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define MYIOC_s_WARN_FMT KERN_WARNING MYNAM ": %s: WARNING - "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define MYIOC_s_ERR_FMT KERN_ERR MYNAM ": %s: ERROR - "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * ATTO UL4D associated structures and defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define ATTOFLAG_DISC 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define ATTOFLAG_TAGGED 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define ATTOFLAG_WIDE_ENB 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define ATTOFLAG_ID_ENB 0x0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define ATTOFLAG_LUN_ENB 0x0060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) typedef struct _ATTO_DEVICE_INFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) u8 Offset; /* 00h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) u8 Period; /* 01h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) u16 ATTOFlags; /* 02h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) } ATTO_DEVICE_INFO, MPI_POINTER PTR_ATTO_DEVICE_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) ATTODeviceInfo_t, MPI_POINTER pATTODeviceInfo_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) typedef struct _ATTO_CONFIG_PAGE_SCSI_PORT_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) CONFIG_PAGE_HEADER Header; /* 00h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u16 PortFlags; /* 04h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) u16 Unused1; /* 06h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) u32 Unused2; /* 08h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ATTO_DEVICE_INFO DeviceSettings[16]; /* 0Ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) } fATTO_CONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_ATTO_CONFIG_PAGE_SCSI_PORT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ATTO_SCSIPortPage2_t, MPI_POINTER pATTO_SCSIPortPage2_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * MPT protocol driver defs...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) typedef enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) MPTBASE_DRIVER, /* MPT base class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) MPTCTL_DRIVER, /* MPT ioctl class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) MPTSPI_DRIVER, /* MPT SPI host class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) MPTFC_DRIVER, /* MPT FC host class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) MPTSAS_DRIVER, /* MPT SAS host class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) MPTLAN_DRIVER, /* MPT LAN class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) MPTSTM_DRIVER, /* MPT SCSI target mode class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) MPTUNKNOWN_DRIVER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) } MPT_DRIVER_CLASS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) struct mpt_pci_driver{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) int (*probe) (struct pci_dev *dev, const struct pci_device_id *id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) void (*remove) (struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * MPT adapter / port / bus / device info structures...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) typedef union _MPT_FRAME_TRACKER {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) u32 arg1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) u32 pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) void *argp1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) } linkage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * NOTE: When request frames are free, on the linkage structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * contets are valid. All other values are invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * In particular, do NOT reply on offset [2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * (in words) being the * message context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * The message context must be reset (computed via base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * + an offset) prior to issuing any command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * NOTE2: On non-32-bit systems, where pointers are LARGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * using the linkage pointers destroys our sacred MsgContext
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * field contents. But we don't care anymore because these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * are now reset in mpt_put_msg_frame() just prior to sending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * a request off to the IOC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u32 __hdr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * The following _MUST_ match the location of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * MsgContext field in the MPT message headers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) u32 MsgContext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) u16 req_idx; /* Request index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) u8 cb_idx; /* callback function index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) u8 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) } fld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) } msgctxu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) } hwhdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * Remark: 32 bit identifier:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * 31-24: reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * 23-16: call back index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * 15-0 : request index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) } MPT_FRAME_TRACKER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * We might want to view/access a frame as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * 1) generic request header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * 2) SCSIIORequest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * 3) SCSIIOReply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * 4) MPIDefaultReply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * 5) frame tracker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) typedef struct _MPT_FRAME_HDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MPIHeader_t hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) SCSIIORequest_t scsireq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) SCSIIOReply_t sreply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) ConfigReply_t configreply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) MPIDefaultReply_t reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) MPT_FRAME_TRACKER frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) } MPT_FRAME_HDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define MPT_REQ_MSGFLAGS_DROPME 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) typedef struct _MPT_SGL_HDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) SGESimple32_t sge[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) } MPT_SGL_HDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) typedef struct _MPT_SGL64_HDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) SGESimple64_t sge[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) } MPT_SGL64_HDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * System interface register set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) typedef struct _SYSIF_REGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) u32 Doorbell; /* 00 System<->IOC Doorbell reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) u32 WriteSequence; /* 04 Write Sequence register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) u32 Diagnostic; /* 08 Diagnostic register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) u32 TestBase; /* 0C Test Base Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) u32 DiagRwData; /* 10 Read Write Data (fw download) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) u32 DiagRwAddress; /* 14 Read Write Address (fw download)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) u32 Reserved1[6]; /* 18-2F reserved for future use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) u32 IntStatus; /* 30 Interrupt Status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) u32 IntMask; /* 34 Interrupt Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) u32 Reserved2[2]; /* 38-3F reserved for future use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u32 RequestFifo; /* 40 Request Post/Free FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u32 ReplyFifo; /* 44 Reply Post/Free FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) u32 RequestHiPriFifo; /* 48 Hi Priority Request FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) u32 Reserved3; /* 4C-4F reserved for future use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) u32 HostIndex; /* 50 Host Index register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) u32 Reserved4[15]; /* 54-8F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) u32 Fubar; /* 90 For Fubar usage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u32 Reserved5[1050];/* 94-10F8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) u32 Reset_1078; /* 10FC Reset 1078 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) } SYSIF_REGS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * NOTE: Use MPI_{DOORBELL,WRITESEQ,DIAG}_xxx defs in lsi/mpi.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * in conjunction with SYSIF_REGS accesses!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * Dynamic Multi-Pathing specific stuff...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /* VirtTarget negoFlags field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) #define MPT_TARGET_NO_NEGO_WIDE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) #define MPT_TARGET_NO_NEGO_SYNC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #define MPT_TARGET_NO_NEGO_QAS 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define MPT_TAPE_NEGO_IDP 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) * VirtDevice - FC LUN device or SCSI target device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) typedef struct _VirtTarget {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) struct scsi_target *starget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) u8 tflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) u8 ioc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) u8 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) u8 channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) u8 minSyncFactor; /* 0xFF is async */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) u8 maxOffset; /* 0 if async */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) u8 maxWidth; /* 0 if narrow, 1 if wide */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) u8 negoFlags; /* bit field, see above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) u8 raidVolume; /* set, if RAID Volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) u8 type; /* byte 0 of Inquiry data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u8 deleted; /* target in process of being removed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) u8 inDMD; /* currently in the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) removal delay timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) u32 num_luns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) } VirtTarget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) typedef struct _VirtDevice {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) VirtTarget *vtarget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) u8 configured_lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) u64 lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) } VirtDevice;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * Fibre Channel (SCSI) target device and associated defines...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) #define MPT_TARGET_DEFAULT_DV_STATUS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) #define MPT_TARGET_FLAGS_VALID_NEGO 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #define MPT_TARGET_FLAGS_VALID_INQUIRY 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) #define MPT_TARGET_FLAGS_Q_YES 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #define MPT_TARGET_FLAGS_VALID_56 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) #define MPT_TARGET_FLAGS_SAF_TE_ISSUED 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #define MPT_TARGET_FLAGS_LED_ON 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) * IOCTL structure and associated defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #define MPTCTL_RESET_OK 0x01 /* Issue Bus Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #define MPT_MGMT_STATUS_RF_VALID 0x01 /* The Reply Frame is VALID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #define MPT_MGMT_STATUS_COMMAND_GOOD 0x02 /* Command Status GOOD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #define MPT_MGMT_STATUS_PENDING 0x04 /* command is pending */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) #define MPT_MGMT_STATUS_DID_IOCRESET 0x08 /* IOC Reset occurred
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) on the current*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) #define MPT_MGMT_STATUS_SENSE_VALID 0x10 /* valid sense info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) #define MPT_MGMT_STATUS_TIMER_ACTIVE 0x20 /* obsolete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #define MPT_MGMT_STATUS_FREE_MF 0x40 /* free the mf from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) complete routine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) #define INITIALIZE_MGMT_STATUS(status) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) status = MPT_MGMT_STATUS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) #define CLEAR_MGMT_STATUS(status) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) #define CLEAR_MGMT_PENDING_STATUS(status) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) status &= ~MPT_MGMT_STATUS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) #define SET_MGMT_MSG_CONTEXT(msg_context, value) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) msg_context = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) typedef struct _MPT_MGMT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) struct mutex mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) struct completion done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) u8 reply[MPT_DEFAULT_FRAME_SIZE]; /* reply frame data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) u8 sense[MPT_SENSE_BUFFER_ALLOC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) u8 status; /* current command status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) int completion_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) u32 msg_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) } MPT_MGMT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * Event Structure and define
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) #define MPTCTL_EVENT_LOG_SIZE (0x000000032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) typedef struct _mpt_ioctl_events {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) u32 event; /* Specified by define above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) u32 eventContext; /* Index or counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) u32 data[2]; /* First 8 bytes of Event Data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) } MPT_IOCTL_EVENTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) * CONFIGPARM status defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #define MPT_CONFIG_GOOD MPI_IOCSTATUS_SUCCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) #define MPT_CONFIG_ERROR 0x002F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * Substructure to store SCSI specific configuration page data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* dvStatus defines: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #define MPT_SCSICFG_USE_NVRAM 0x01 /* WriteSDP1 using NVRAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) #define MPT_SCSICFG_ALL_IDS 0x02 /* WriteSDP1 to all IDS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) /* #define MPT_SCSICFG_BLK_NEGO 0x10 WriteSDP1 with WDTR and SDTR disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) typedef struct _SpiCfgData {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) u32 PortFlags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) int *nvram; /* table of device NVRAM values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) IOCPage4_t *pIocPg4; /* SEP devices addressing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) dma_addr_t IocPg4_dma; /* Phys Addr of IOCPage4 data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) int IocPg4Sz; /* IOCPage4 size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) u8 minSyncFactor; /* 0xFF if async */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) u8 maxSyncOffset; /* 0 if async */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) u8 maxBusWidth; /* 0 if narrow, 1 if wide */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) u8 busType; /* SE, LVD, HD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) u8 sdp1version; /* SDP1 version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) u8 sdp1length; /* SDP1 length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) u8 sdp0version; /* SDP0 version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) u8 sdp0length; /* SDP0 length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) u8 dvScheduled; /* 1 if scheduled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) u8 noQas; /* Disable QAS for this adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) u8 Saf_Te; /* 1 to force all Processors as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) * SAF-TE if Inquiry data length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) * is too short to check for SAF-TE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) u8 bus_reset; /* 1 to allow bus reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) u8 rsvd[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }SpiCfgData;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) typedef struct _SasCfgData {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) u8 ptClear; /* 1 to automatically clear the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * persistent table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * 0 to disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) * automatic clearing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }SasCfgData;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) * Inactive volume link list of raid component data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) * @inactive_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) struct inactive_raid_component_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) u8 volumeID; /* volume target id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) u8 volumeBus; /* volume channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) IOC_3_PHYS_DISK d; /* phys disk info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) typedef struct _RaidCfgData {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) IOCPage2_t *pIocPg2; /* table of Raid Volumes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) IOCPage3_t *pIocPg3; /* table of physical disks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct mutex inactive_list_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) struct list_head inactive_list; /* link list for physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) disk that belong in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) inactive volumes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }RaidCfgData;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) typedef struct _FcCfgData {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /* will ultimately hold fc_port_page0 also */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) FCPortPage1_t *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) int pg_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) } fc_port_page1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) } FcCfgData;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) #define MPT_RPORT_INFO_FLAGS_REGISTERED 0x01 /* rport registered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) #define MPT_RPORT_INFO_FLAGS_MISSING 0x02 /* missing from DevPage0 scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * data allocated for each fc rport device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) struct mptfc_rport_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct fc_rport *rport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) struct scsi_target *starget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) FCDevicePage0_t pg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * MPT_SCSI_HOST defines - Used by the IOCTL and the SCSI drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * Private to the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) #define MPT_HOST_BUS_UNKNOWN (0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) #define MPT_HOST_TOO_MANY_TM (0x05)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) #define MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) #define MPT_HOST_NO_CHAIN (0xFFFFFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #define MPT_NVRAM_MASK_TIMEOUT (0x000000FF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) #define MPT_NVRAM_SYNC_MASK (0x0000FF00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) #define MPT_NVRAM_SYNC_SHIFT (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) #define MPT_NVRAM_DISCONNECT_ENABLE (0x00010000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) #define MPT_NVRAM_ID_SCAN_ENABLE (0x00020000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) #define MPT_NVRAM_LUN_SCAN_ENABLE (0x00040000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) #define MPT_NVRAM_TAG_QUEUE_ENABLE (0x00080000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) #define MPT_NVRAM_WIDE_DISABLE (0x00100000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) #define MPT_NVRAM_BOOT_CHOICE (0x00200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) typedef enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) FC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) SPI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) SAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) } BUS_TYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) typedef struct _MPT_SCSI_HOST {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) struct _MPT_ADAPTER *ioc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) ushort sel_timeout[MPT_MAX_FC_DEVICES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) char *info_kbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) long last_queue_full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) u16 spi_pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) struct list_head target_reset_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) } MPT_SCSI_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) typedef void (*MPT_ADD_SGE)(void *pAddr, u32 flagslength, dma_addr_t dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) typedef void (*MPT_ADD_CHAIN)(void *pAddr, u8 next, u16 length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) dma_addr_t dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) typedef void (*MPT_SCHEDULE_TARGET_RESET)(void *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) typedef void (*MPT_FLUSH_RUNNING_CMDS)(MPT_SCSI_HOST *hd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) * Adapter Structure - pci_dev specific. Maximum: MPT_MAX_ADAPTERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) typedef struct _MPT_ADAPTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) int id; /* Unique adapter id N {0,1,2,...} */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) int pci_irq; /* This irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) char name[MPT_NAME_LENGTH]; /* "iocN" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) const char *prod_name; /* "LSIFC9x9" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) #ifdef CONFIG_FUSION_LOGGING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* used in mpt_display_event_info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) char evStr[EVENT_DESCR_STR_SZ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) char board_name[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) char board_assembly[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) char board_tracer[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) u16 nvdata_version_persistent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) u16 nvdata_version_default;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) int debug_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) u8 io_missing_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) u16 device_missing_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) SYSIF_REGS __iomem *chip; /* == c8817000 (mmap) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) SYSIF_REGS __iomem *pio_chip; /* Programmed IO (downloadboot) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) u8 bus_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) u32 mem_phys; /* == f4020000 (mmap) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) u32 pio_mem_phys; /* Programmed IO (downloadboot) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) int mem_size; /* mmap memory size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) int number_of_buses;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) int devices_per_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) int alloc_total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) u32 last_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) int active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) u8 *alloc; /* frames alloc ptr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) dma_addr_t alloc_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) u32 alloc_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) MPT_FRAME_HDR *reply_frames; /* Reply msg frames - rounded up! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) u32 reply_frames_low_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) int reply_depth; /* Num Allocated reply frames */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) int reply_sz; /* Reply frame size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) int num_chain; /* Number of chain buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) MPT_ADD_SGE add_sge; /* Pointer to add_sge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) MPT_ADD_CHAIN add_chain; /* Pointer to add_chain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) /* Pool of buffers for chaining. ReqToChain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) * and ChainToChain track index of chain buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) * ChainBuffer (DMA) virt/phys addresses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) * FreeChainQ (lock) locking mechanisms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) int *ReqToChain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) int *RequestNB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) int *ChainToChain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) u8 *ChainBuffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) dma_addr_t ChainBufferDMA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) struct list_head FreeChainQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) spinlock_t FreeChainQlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) /* We (host driver) get to manage our own RequestQueue! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) dma_addr_t req_frames_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) MPT_FRAME_HDR *req_frames; /* Request msg frames - rounded up! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) u32 req_frames_low_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) int req_depth; /* Number of request frames */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) int req_sz; /* Request frame size (bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) spinlock_t FreeQlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) struct list_head FreeQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) /* Pool of SCSI sense buffers for commands coming from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) * the SCSI mid-layer. We have one 256 byte sense buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) * for each REQ entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) u8 *sense_buf_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) dma_addr_t sense_buf_pool_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) u32 sense_buf_low_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) u8 *HostPageBuffer; /* SAS - host page buffer support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) u32 HostPageBuffer_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) dma_addr_t HostPageBuffer_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) struct pci_dev *pcidev; /* struct pci_dev pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) int bars; /* bitmask of BAR's that must be configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) int msi_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) u8 __iomem *memmap; /* mmap address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) struct Scsi_Host *sh; /* Scsi Host pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) SpiCfgData spi_data; /* Scsi config. data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) RaidCfgData raid_data; /* Raid config. data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) SasCfgData sas_data; /* Sas config. data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) FcCfgData fc_data; /* Fc config. data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) struct proc_dir_entry *ioc_dentry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) struct _MPT_ADAPTER *alt_ioc; /* ptr to 929 bound adapter port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) u32 biosVersion; /* BIOS version from IO Unit Page 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) int eventTypes; /* Event logging parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) int eventContext; /* Next event context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) int eventLogSize; /* Max number of cached events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) struct _mpt_ioctl_events *events; /* pointer to event log */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) u8 *cached_fw; /* Pointer to FW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) dma_addr_t cached_fw_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) int hs_reply_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) #ifndef MFCNT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) u32 pad0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) u32 mfcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) u32 NB_for_64_byte_frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) u32 hs_req[MPT_MAX_FRAME_SIZE/sizeof(u32)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) u16 hs_reply[MPT_MAX_FRAME_SIZE/sizeof(u16)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) IOCFactsReply_t facts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) PortFactsReply_t pfacts[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) FCPortPage0_t fc_port_page0[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) LANPage0_t lan_cnfg_page0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) LANPage1_t lan_cnfg_page1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) u8 ir_firmware; /* =1 if IR firmware detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) * Description: errata_flag_1064
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) * If a PCIX read occurs within 1 or 2 cycles after the chip receives
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) * a split completion for a read data, an internal address pointer incorrectly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) * increments by 32 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) int errata_flag_1064;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) int aen_event_read_flag; /* flag to indicate event log was read*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) u8 FirstWhoInit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) u8 upload_fw; /* If set, do a fw upload */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) u8 NBShiftFactor; /* NB Shift Factor based on Block Size (Facts) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) u8 pad1[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) u8 DoneCtx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) u8 TaskCtx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) u8 InternalCtx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) struct net_device *netdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) struct list_head sas_topology;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) struct mutex sas_topology_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) struct workqueue_struct *fw_event_q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) struct list_head fw_event_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) spinlock_t fw_event_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) u8 fw_events_off; /* if '1', then ignore events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) char fw_event_q_name[MPT_KOBJ_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) struct mutex sas_discovery_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) u8 sas_discovery_runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) u8 sas_discovery_ignore_events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) /* port_info object for the host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) struct mptsas_portinfo *hba_port_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) u64 hba_port_sas_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) u16 hba_port_num_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) struct list_head sas_device_info_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) struct mutex sas_device_info_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) u8 old_sas_discovery_protocal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) u8 sas_discovery_quiesce_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) int sas_index; /* index refrencing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) MPT_MGMT sas_mgmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) MPT_MGMT mptbase_cmds; /* for sending config pages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) MPT_MGMT internal_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) MPT_MGMT taskmgmt_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) MPT_MGMT ioctl_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) spinlock_t taskmgmt_lock; /* diagnostic reset lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) int taskmgmt_in_progress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) u8 taskmgmt_quiesce_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) u8 ioc_reset_in_progress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) u8 reset_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) u8 wait_on_reset_completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) MPT_SCHEDULE_TARGET_RESET schedule_target_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) MPT_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) struct work_struct sas_persist_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) struct work_struct fc_setup_reset_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) struct list_head fc_rports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) struct work_struct fc_lsc_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) u8 fc_link_speed[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) spinlock_t fc_rescan_work_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) struct work_struct fc_rescan_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) char fc_rescan_work_q_name[MPT_KOBJ_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) struct workqueue_struct *fc_rescan_work_q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) /* driver forced bus resets count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) unsigned long hard_resets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) /* fw/external bus resets count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) unsigned long soft_resets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) /* cmd timeouts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) unsigned long timeouts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) struct scsi_cmnd **ScsiLookup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) spinlock_t scsi_lookup_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) u64 dma_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) u32 broadcast_aen_busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) char reset_work_q_name[MPT_KOBJ_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) struct workqueue_struct *reset_work_q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) struct delayed_work fault_reset_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) u8 sg_addr_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) u8 in_rescan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) u8 SGE_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) } MPT_ADAPTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) * New return value convention:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) * 1 = Ok to free associated request frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) * 0 = not Ok ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) typedef int (*MPT_CALLBACK)(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) typedef int (*MPT_EVHANDLER)(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) typedef int (*MPT_RESETHANDLER)(MPT_ADAPTER *ioc, int reset_phase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) /* reset_phase defs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) #define MPT_IOC_PRE_RESET 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) #define MPT_IOC_POST_RESET 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) #define MPT_IOC_SETUP_RESET 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) * Invent MPT host event (super-set of MPI Events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) * Fitted to 1030's 64-byte [max] request frame size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) typedef struct _MPT_HOST_EVENT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) EventNotificationReply_t MpiEvent; /* 8 32-bit words! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) u32 pad[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) void *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) } MPT_HOST_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) #define MPT_HOSTEVENT_IOC_BRINGUP 0x91
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) #define MPT_HOSTEVENT_IOC_RECOVER 0x92
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) /* Define the generic types based on the size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) * of the dma_addr_t type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) typedef struct _mpt_sge {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) u32 FlagsLength;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) dma_addr_t Address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) } MptSge_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) #define mpt_msg_flags(ioc) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) (ioc->sg_addr_size == sizeof(u64)) ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) #define MPT_SGE_FLAGS_64_BIT_ADDRESSING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) (MPI_SGE_FLAGS_64_BIT_ADDRESSING << MPI_SGE_FLAGS_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) * Funky (private) macros...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) #include "mptdebug.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) #define MPT_INDEX_2_MFPTR(ioc,idx) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) (MPT_FRAME_HDR*)( (u8*)(ioc)->req_frames + (ioc)->req_sz * (idx) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) #define MFPTR_2_MPT_INDEX(ioc,mf) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) (int)( ((u8*)mf - (u8*)(ioc)->req_frames) / (ioc)->req_sz )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) #define MPT_INDEX_2_RFPTR(ioc,idx) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) (MPT_FRAME_HDR*)( (u8*)(ioc)->reply_frames + (ioc)->req_sz * (idx) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) #define SCSI_STD_SENSE_BYTES 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) #define SCSI_STD_INQUIRY_BYTES 36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) #define SCSI_MAX_INQUIRY_BYTES 96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) * MPT_SCSI_HOST defines - Used by the IOCTL and the SCSI drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) * Private to the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) /* LOCAL structure and fields used when processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) * internally generated commands. These include:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) * bus scan, dv and config requests.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) typedef struct _MPT_LOCAL_REPLY {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) ConfigPageHeader_t header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) int completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) u8 sense[SCSI_STD_SENSE_BYTES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) u8 scsiStatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) u8 skip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) u32 pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) } MPT_LOCAL_REPLY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) /* The TM_STATE variable is used to provide strict single threading of TM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) * requests as well as communicate TM error conditions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) #define TM_STATE_NONE (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) #define TM_STATE_IN_PROGRESS (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) #define TM_STATE_ERROR (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) * More Dynamic Multi-Pathing stuff...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) /* Forward decl, a strange C thing, to prevent gcc compiler warnings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) struct scsi_cmnd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) * Generic structure passed to the base mpt_config function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) typedef struct _x_config_parms {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) ConfigExtendedPageHeader_t *ehdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) ConfigPageHeader_t *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) } cfghdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) dma_addr_t physAddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) u32 pageAddr; /* properly formatted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) u16 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) u8 action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) u8 dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) u8 timeout; /* seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) } CONFIGPARMS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) * Public entry points...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) extern int mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) extern void mpt_detach(struct pci_dev *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) extern int mpt_suspend(struct pci_dev *pdev, pm_message_t state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) extern int mpt_resume(struct pci_dev *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) extern u8 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) char *func_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) extern void mpt_deregister(u8 cb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) extern int mpt_event_register(u8 cb_idx, MPT_EVHANDLER ev_cbfunc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) extern void mpt_event_deregister(u8 cb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) extern int mpt_reset_register(u8 cb_idx, MPT_RESETHANDLER reset_func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) extern void mpt_reset_deregister(u8 cb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) extern int mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, u8 cb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) extern void mpt_device_driver_deregister(u8 cb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) extern MPT_FRAME_HDR *mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) extern void mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) extern void mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) extern void mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) extern int mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) extern int mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) extern u32 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) extern void mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buf, int *size, int len, int showlan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) extern int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) extern int mpt_Soft_Hard_ResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) extern int mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) extern int mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) extern void mpt_free_fw_memory(MPT_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) extern int mpt_findImVolumes(MPT_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) extern int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) extern int mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num, pRaidPhysDiskPage0_t phys_disk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) extern int mpt_raid_phys_disk_pg1(MPT_ADAPTER *ioc, u8 phys_disk_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) pRaidPhysDiskPage1_t phys_disk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) extern int mpt_raid_phys_disk_get_num_paths(MPT_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) u8 phys_disk_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) extern int mpt_set_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) extern void mpt_clear_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) extern void mpt_halt_firmware(MPT_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) * Public data decl's...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) extern struct list_head ioc_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) extern int mpt_fwfault_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) #endif /* } __KERNEL__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) #define CAST_U32_TO_PTR(x) ((void *)(u64)x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) #define CAST_PTR_TO_U32(x) ((u32)(u64)x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) #define CAST_U32_TO_PTR(x) ((void *)x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) #define CAST_PTR_TO_U32(x) ((u32)x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) #define MPT_PROTOCOL_FLAGS_c_c_c_c(pflags) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) ((pflags) & MPI_PORTFACTS_PROTOCOL_INITIATOR) ? 'I' : 'i', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) ((pflags) & MPI_PORTFACTS_PROTOCOL_TARGET) ? 'T' : 't', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) ((pflags) & MPI_PORTFACTS_PROTOCOL_LAN) ? 'L' : 'l', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) ((pflags) & MPI_PORTFACTS_PROTOCOL_LOGBUSADDR) ? 'B' : 'b'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) * Shifted SGE Defines - Use in SGE with FlagsLength member.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) * Otherwise, use MPI_xxx defines (refer to "lsi/mpi.h" header).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) * Defaults: 32 bit SGE, SYSTEM_ADDRESS if direction bit is 0, read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) #define MPT_TRANSFER_IOC_TO_HOST (0x00000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) #define MPT_TRANSFER_HOST_TO_IOC (0x04000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) #define MPT_SGE_FLAGS_LAST_ELEMENT (0x80000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) #define MPT_SGE_FLAGS_END_OF_BUFFER (0x40000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) #define MPT_SGE_FLAGS_LOCAL_ADDRESS (0x08000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) #define MPT_SGE_FLAGS_DIRECTION (0x04000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) #define MPT_SGE_FLAGS_END_OF_LIST (0x01000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) #define MPT_SGE_FLAGS_TRANSACTION_ELEMENT (0x00000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) #define MPT_SGE_FLAGS_SIMPLE_ELEMENT (0x10000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) #define MPT_SGE_FLAGS_CHAIN_ELEMENT (0x30000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) #define MPT_SGE_FLAGS_ELEMENT_MASK (0x30000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) #define MPT_SGE_FLAGS_SSIMPLE_READ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) (MPT_SGE_FLAGS_LAST_ELEMENT | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) MPT_SGE_FLAGS_END_OF_BUFFER | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) MPT_SGE_FLAGS_END_OF_LIST | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) MPT_SGE_FLAGS_SIMPLE_ELEMENT | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) MPT_TRANSFER_IOC_TO_HOST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) #define MPT_SGE_FLAGS_SSIMPLE_WRITE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) (MPT_SGE_FLAGS_LAST_ELEMENT | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) MPT_SGE_FLAGS_END_OF_BUFFER | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) MPT_SGE_FLAGS_END_OF_LIST | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) MPT_SGE_FLAGS_SIMPLE_ELEMENT | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) MPT_TRANSFER_HOST_TO_IOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) /*}-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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