Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2015 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *		http://www.samsung.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Exynos SROMC register definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #ifndef __EXYNOS_SROM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __EXYNOS_SROM_H __FILE__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define EXYNOS_SROMREG(x)		(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define EXYNOS_SROM_BW		EXYNOS_SROMREG(0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define EXYNOS_SROM_BC0		EXYNOS_SROMREG(0x4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define EXYNOS_SROM_BC1		EXYNOS_SROMREG(0x8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define EXYNOS_SROM_BC2		EXYNOS_SROMREG(0xc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define EXYNOS_SROM_BC3		EXYNOS_SROMREG(0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define EXYNOS_SROM_BC4		EXYNOS_SROMREG(0x14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define EXYNOS_SROM_BC5		EXYNOS_SROMREG(0x18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define EXYNOS_SROM_BW__DATAWIDTH__SHIFT	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define EXYNOS_SROM_BW__ADDRMODE__SHIFT		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define EXYNOS_SROM_BW__WAITENABLE__SHIFT	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define EXYNOS_SROM_BW__BYTEENABLE__SHIFT	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define EXYNOS_SROM_BW__CS_MASK			0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define EXYNOS_SROM_BW__NCS0__SHIFT		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define EXYNOS_SROM_BW__NCS1__SHIFT		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define EXYNOS_SROM_BW__NCS2__SHIFT		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define EXYNOS_SROM_BW__NCS3__SHIFT		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define EXYNOS_SROM_BW__NCS4__SHIFT		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define EXYNOS_SROM_BW__NCS5__SHIFT		20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* applies to same to BCS0 - BCS3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define EXYNOS_SROM_BCX__PMC__SHIFT		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define EXYNOS_SROM_BCX__TACP__SHIFT		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define EXYNOS_SROM_BCX__TCAH__SHIFT		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define EXYNOS_SROM_BCX__TCOH__SHIFT		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define EXYNOS_SROM_BCX__TACC__SHIFT		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define EXYNOS_SROM_BCX__TCOS__SHIFT		24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define EXYNOS_SROM_BCX__TACS__SHIFT		28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #endif /* __EXYNOS_SROM_H */