Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Atmel (Multi-port DDR-)SDRAM Controller driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Author: Alexandre Belloni <alexandre.belloni@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 2014 Atmel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct at91_ramc_caps {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	bool has_ddrck;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	bool has_mpddr_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static const struct at91_ramc_caps at91rm9200_caps = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static const struct at91_ramc_caps at91sam9g45_caps = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	.has_ddrck = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	.has_mpddr_clk = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static const struct at91_ramc_caps sama5d3_caps = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	.has_ddrck = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	.has_mpddr_clk = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static const struct of_device_id atmel_ramc_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	{ .compatible = "atmel,at91rm9200-sdramc", .data = &at91rm9200_caps, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	{ .compatible = "atmel,at91sam9260-sdramc", .data = &at91rm9200_caps, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	{ .compatible = "atmel,at91sam9g45-ddramc", .data = &at91sam9g45_caps, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	{ .compatible = "atmel,sama5d3-ddramc", .data = &sama5d3_caps, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int atmel_ramc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	const struct at91_ramc_caps *caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	caps = of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	if (caps->has_ddrck) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		clk = devm_clk_get(&pdev->dev, "ddrck");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		if (IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 			return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		clk_prepare_enable(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	if (caps->has_mpddr_clk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		clk = devm_clk_get(&pdev->dev, "mpddr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 			pr_err("AT91 RAMC: couldn't get mpddr clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 			return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 		clk_prepare_enable(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static struct platform_driver atmel_ramc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	.probe		= atmel_ramc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 		.name	= "atmel-ramc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 		.of_match_table = atmel_ramc_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) builtin_platform_driver(atmel_ramc_driver);