^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2005 Mike Isely <isely@pobox.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) This source file is specifically designed to interface with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) cx2584x, in kernels 2.6.16 or newer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "pvrusb2-cx2584x-v4l.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "pvrusb2-hdw-internal.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "pvrusb2-debug.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <media/drv-intf/cx25840.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct routing_scheme_item {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int aud;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct routing_scheme {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) const struct routing_scheme_item *def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static const struct routing_scheme_item routing_scheme0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) [PVR2_CVAL_INPUT_TV] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .vid = CX25840_COMPOSITE7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .aud = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) [PVR2_CVAL_INPUT_RADIO] = { /* Treat the same as composite */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .vid = CX25840_COMPOSITE3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) [PVR2_CVAL_INPUT_COMPOSITE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .vid = CX25840_COMPOSITE3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) [PVR2_CVAL_INPUT_SVIDEO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .vid = CX25840_SVIDEO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static const struct routing_scheme routing_def0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .def = routing_scheme0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .cnt = ARRAY_SIZE(routing_scheme0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* Specific to gotview device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static const struct routing_scheme_item routing_schemegv[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) [PVR2_CVAL_INPUT_TV] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .vid = CX25840_COMPOSITE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .aud = CX25840_AUDIO5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) [PVR2_CVAL_INPUT_RADIO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* line-in is used for radio and composite. A GPIO is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) used to switch between the two choices. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .vid = CX25840_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) [PVR2_CVAL_INPUT_COMPOSITE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .vid = CX25840_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) [PVR2_CVAL_INPUT_SVIDEO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .vid = (CX25840_SVIDEO_LUMA3|CX25840_SVIDEO_CHROMA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static const struct routing_scheme routing_defgv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .def = routing_schemegv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .cnt = ARRAY_SIZE(routing_schemegv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Specific to grabster av400 device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static const struct routing_scheme_item routing_schemeav400[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) [PVR2_CVAL_INPUT_COMPOSITE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .vid = CX25840_COMPOSITE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) [PVR2_CVAL_INPUT_SVIDEO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .vid = (CX25840_SVIDEO_LUMA2|CX25840_SVIDEO_CHROMA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static const struct routing_scheme routing_defav400 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .def = routing_schemeav400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .cnt = ARRAY_SIZE(routing_schemeav400),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static const struct routing_scheme_item routing_scheme160xxx[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) [PVR2_CVAL_INPUT_TV] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .vid = CX25840_COMPOSITE7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .aud = CX25840_AUDIO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) [PVR2_CVAL_INPUT_RADIO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .vid = CX25840_COMPOSITE4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .aud = CX25840_AUDIO6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) [PVR2_CVAL_INPUT_COMPOSITE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .vid = CX25840_COMPOSITE3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) [PVR2_CVAL_INPUT_SVIDEO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .vid = CX25840_SVIDEO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .aud = CX25840_AUDIO_SERIAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static const struct routing_scheme routing_def160xxx = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .def = routing_scheme160xxx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .cnt = ARRAY_SIZE(routing_scheme160xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static const struct routing_scheme *routing_schemes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) [PVR2_ROUTING_SCHEME_HAUPPAUGE] = &routing_def0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) [PVR2_ROUTING_SCHEME_GOTVIEW] = &routing_defgv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) [PVR2_ROUTING_SCHEME_AV400] = &routing_defav400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) [PVR2_ROUTING_SCHEME_HAUP160XXX] = &routing_def160xxx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) void pvr2_cx25840_subdev_update(struct pvr2_hdw *hdw, struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) pvr2_trace(PVR2_TRACE_CHIPS, "subdev cx2584x update...");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (hdw->input_dirty || hdw->force_dirty) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) enum cx25840_video_input vid_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) enum cx25840_audio_input aud_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) const struct routing_scheme *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned int sid = hdw->hdw_desc->signal_routing_scheme;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) sp = (sid < ARRAY_SIZE(routing_schemes)) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) routing_schemes[sid] : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if ((sp == NULL) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) (hdw->input_val < 0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) (hdw->input_val >= sp->cnt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) pvr2_trace(PVR2_TRACE_ERROR_LEGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) "*** WARNING *** subdev cx2584x set_input: Invalid routing scheme (%u) and/or input (%d)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) sid, hdw->input_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) vid_input = sp->def[hdw->input_val].vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) aud_input = sp->def[hdw->input_val].aud;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pvr2_trace(PVR2_TRACE_CHIPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) "subdev cx2584x set_input vid=0x%x aud=0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) vid_input, aud_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) sd->ops->video->s_routing(sd, (u32)vid_input, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) sd->ops->audio->s_routing(sd, (u32)aud_input, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }