Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *  Copyright (C) 2005 Mike Isely <isely@pobox.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include "pvrusb2-audio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include "pvrusb2-hdw-internal.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "pvrusb2-debug.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <media/drv-intf/msp3400.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct routing_scheme {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	const int *def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	unsigned int cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static const int routing_scheme0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	[PVR2_CVAL_INPUT_TV]        = MSP_INPUT_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	[PVR2_CVAL_INPUT_RADIO]     = MSP_INPUT(MSP_IN_SCART2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 						MSP_IN_TUNER1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 						MSP_DSP_IN_SCART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 						MSP_DSP_IN_SCART),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	[PVR2_CVAL_INPUT_COMPOSITE] = MSP_INPUT(MSP_IN_SCART1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 						MSP_IN_TUNER1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 						MSP_DSP_IN_SCART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 						MSP_DSP_IN_SCART),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	[PVR2_CVAL_INPUT_SVIDEO]    = MSP_INPUT(MSP_IN_SCART1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 						MSP_IN_TUNER1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 						MSP_DSP_IN_SCART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 						MSP_DSP_IN_SCART),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static const struct routing_scheme routing_def0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	.def = routing_scheme0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	.cnt = ARRAY_SIZE(routing_scheme0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static const struct routing_scheme *routing_schemes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	[PVR2_ROUTING_SCHEME_HAUPPAUGE] = &routing_def0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) void pvr2_msp3400_subdev_update(struct pvr2_hdw *hdw, struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	if (hdw->input_dirty || hdw->force_dirty) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		const struct routing_scheme *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		unsigned int sid = hdw->hdw_desc->signal_routing_scheme;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		u32 input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		pvr2_trace(PVR2_TRACE_CHIPS, "subdev msp3400 v4l2 set_stereo");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		sp = (sid < ARRAY_SIZE(routing_schemes)) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 			routing_schemes[sid] : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		if ((sp != NULL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		    (hdw->input_val >= 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		    (hdw->input_val < sp->cnt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 			input = sp->def[hdw->input_val];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 			pvr2_trace(PVR2_TRACE_ERROR_LEGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 				   "*** WARNING *** subdev msp3400 set_input: Invalid routing scheme (%u) and/or input (%d)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 				   sid, hdw->input_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 		sd->ops->audio->s_routing(sd, input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 			MSP_OUTPUT(MSP_SC_IN_DSP_SCART1), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }