^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Mirics MSi2500 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Mirics MSi3101 SDR Dongle driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * That driver is somehow based of pwc driver:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * (C) 1999-2004 Nemosoft Unv.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * (C) 2004-2006 Luc Saillard (luc@saillard.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * (C) 2011 Hans de Goede <hdegoede@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/div64.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <media/v4l2-ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <media/v4l2-event.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <media/videobuf2-v4l2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <media/videobuf2-vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static bool msi2500_emulated_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) module_param_named(emulated_formats, msi2500_emulated_fmt, bool, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MODULE_PARM_DESC(emulated_formats, "enable emulated formats (disappears in future)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * iConfiguration 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * bInterfaceNumber 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * bAlternateSetting 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * bNumEndpoints 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * bEndpointAddress 0x81 EP 1 IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * bmAttributes 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Transfer Type Isochronous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * wMaxPacketSize 0x1400 3x 1024 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * bInterval 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define MAX_ISO_BUFS (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define ISO_FRAMES_PER_DESC (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define ISO_MAX_FRAME_SIZE (3 * 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define ISO_BUFFER_SIZE (ISO_FRAMES_PER_DESC * ISO_MAX_FRAME_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define MAX_ISOC_ERRORS 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * TODO: These formats should be moved to V4L2 API. Formats are currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * disabled from formats[] table, not visible to userspace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* signed 12-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define MSI2500_PIX_FMT_SDR_S12 v4l2_fourcc('D', 'S', '1', '2')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* Mirics MSi2500 format 384 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define MSI2500_PIX_FMT_SDR_MSI2500_384 v4l2_fourcc('M', '3', '8', '4')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static const struct v4l2_frequency_band bands[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .tuner = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .type = V4L2_TUNER_ADC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .rangelow = 1200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .rangehigh = 15000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* stream formats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct msi2500_format {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u32 pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* format descriptions for capture and preview */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static struct msi2500_format formats[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .pixelformat = V4L2_SDR_FMT_CS8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .buffersize = 3 * 1008,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .pixelformat = MSI2500_PIX_FMT_SDR_MSI2500_384,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .pixelformat = MSI2500_PIX_FMT_SDR_S12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .pixelformat = V4L2_SDR_FMT_CS14LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .buffersize = 3 * 1008,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .pixelformat = V4L2_SDR_FMT_CU8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .buffersize = 3 * 1008,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .pixelformat = V4L2_SDR_FMT_CU16LE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .buffersize = 3 * 1008,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static const unsigned int NUM_FORMATS = ARRAY_SIZE(formats);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* intermediate buffers with raw data from the USB device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct msi2500_frame_buf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* common v4l buffer stuff -- must be first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct vb2_v4l2_buffer vb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct msi2500_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct video_device vdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct v4l2_device v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct v4l2_subdev *v4l2_subdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct spi_master *master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* videobuf2 queue and queued buffers list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct vb2_queue vb_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct list_head queued_bufs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) spinlock_t queued_bufs_lock; /* Protects queued_bufs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* Note if taking both locks v4l2_lock must always be locked first! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct mutex v4l2_lock; /* Protects everything else */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct mutex vb_queue_lock; /* Protects vb_queue and capt_file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Pointer to our usb_device, will be NULL after unplug */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct usb_device *udev; /* Both mutexes most be hold when setting! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned int f_adc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u32 pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) u32 buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned int num_formats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned int isoc_errors; /* number of contiguous ISOC errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned int vb_full; /* vb is full and packets dropped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct urb *urbs[MAX_ISO_BUFS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* Controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct v4l2_ctrl_handler hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) u32 next_sample; /* for track lost packets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) u32 sample; /* for sample rate calc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned long jiffies_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* Private functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static struct msi2500_frame_buf *msi2500_get_next_fill_buf(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct msi2500_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct msi2500_frame_buf *buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) spin_lock_irqsave(&dev->queued_bufs_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (list_empty(&dev->queued_bufs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) goto leave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) buf = list_entry(dev->queued_bufs.next, struct msi2500_frame_buf, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) list_del(&buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) leave:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) spin_unlock_irqrestore(&dev->queued_bufs_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * +===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * | 00-1023 | USB packet type '504'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * +===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * | 00- 03 | sequence number of first sample in that USB packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * | 04- 15 | garbage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * | 16-1023 | samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * signed 8-bit sample
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * 504 * 2 = 1008 samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * +===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * | 00-1023 | USB packet type '384'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * +===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * | 00- 03 | sequence number of first sample in that USB packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * | 04- 15 | garbage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * | 16- 175 | samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * | 176- 179 | control bits for previous samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * | 180- 339 | samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * | 340- 343 | control bits for previous samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * | 344- 503 | samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * | 504- 507 | control bits for previous samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * | 508- 667 | samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * | 668- 671 | control bits for previous samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * | 672- 831 | samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * | 832- 835 | control bits for previous samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * | 836- 995 | samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * | 996- 999 | control bits for previous samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * | 1000-1023 | garbage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * Bytes 4 - 7 could have some meaning?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * Control bits for previous samples is 32-bit field, containing 16 x 2-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * numbers. This results one 2-bit number for 8 samples. It is likely used for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * for bit shifting sample by given bits, increasing actual sampling resolution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * Number 2 (0b10) was never seen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * 6 * 16 * 2 * 4 = 768 samples. 768 * 4 = 3072 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * +===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * | 00-1023 | USB packet type '336'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * +===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * | 00- 03 | sequence number of first sample in that USB packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * | 04- 15 | garbage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * | 16-1023 | samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * signed 12-bit sample
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * +===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * | 00-1023 | USB packet type '252'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * +===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * | 00- 03 | sequence number of first sample in that USB packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * | 04- 15 | garbage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * | 16-1023 | samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * +---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * signed 14-bit sample
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int msi2500_convert_stream(struct msi2500_dev *dev, u8 *dst, u8 *src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) unsigned int src_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) unsigned int i, j, transactions, dst_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) u32 sample[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /* There could be 1-3 1024 byte transactions per packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) transactions = src_len / 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) for (i = 0; i < transactions; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) sample[i] = src[3] << 24 | src[2] << 16 | src[1] << 8 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) src[0] << 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (i == 0 && dev->next_sample != sample[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) dev_dbg_ratelimited(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) "%d samples lost, %d %08x:%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) sample[0] - dev->next_sample,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) src_len, dev->next_sample,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) sample[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * Dump all unknown 'garbage' data - maybe we will discover
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * someday if there is something rational...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) dev_dbg_ratelimited(dev->dev, "%*ph\n", 12, &src[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) src += 16; /* skip header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) switch (dev->pixelformat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) case V4L2_SDR_FMT_CU8: /* 504 x IQ samples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) s8 *s8src = (s8 *)src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 *u8dst = (u8 *)dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) for (j = 0; j < 1008; j++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) *u8dst++ = *s8src++ + 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) src += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) dst += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) dst_len += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) dev->next_sample = sample[i] + 504;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) case V4L2_SDR_FMT_CU16LE: /* 252 x IQ samples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) s16 *s16src = (s16 *)src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) u16 *u16dst = (u16 *)dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct {signed int x:14; } se; /* sign extension */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) unsigned int utmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) for (j = 0; j < 1008; j += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* sign extension from 14-bit to signed int */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) se.x = *s16src++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /* from signed int to unsigned int */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) utmp = se.x + 8192;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* from 14-bit to 16-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) *u16dst++ = utmp << 2 | utmp >> 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) src += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) dst += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) dst_len += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) dev->next_sample = sample[i] + 252;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) case MSI2500_PIX_FMT_SDR_MSI2500_384: /* 384 x IQ samples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* Dump unknown 'garbage' data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) dev_dbg_ratelimited(dev->dev, "%*ph\n", 24, &src[1000]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) memcpy(dst, src, 984);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) src += 984 + 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) dst += 984;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dst_len += 984;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) dev->next_sample = sample[i] + 384;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) case V4L2_SDR_FMT_CS8: /* 504 x IQ samples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) memcpy(dst, src, 1008);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) src += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) dst += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) dst_len += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) dev->next_sample = sample[i] + 504;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) case MSI2500_PIX_FMT_SDR_S12: /* 336 x IQ samples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) memcpy(dst, src, 1008);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) src += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) dst += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) dst_len += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) dev->next_sample = sample[i] + 336;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) case V4L2_SDR_FMT_CS14LE: /* 252 x IQ samples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) memcpy(dst, src, 1008);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) src += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) dst += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) dst_len += 1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) dev->next_sample = sample[i] + 252;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) /* calculate sample rate and output it in 10 seconds intervals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (unlikely(time_is_before_jiffies(dev->jiffies_next))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define MSECS 10000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) unsigned int msecs = jiffies_to_msecs(jiffies -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) dev->jiffies_next + msecs_to_jiffies(MSECS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) unsigned int samples = dev->next_sample - dev->sample;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) dev->jiffies_next = jiffies + msecs_to_jiffies(MSECS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) dev->sample = dev->next_sample;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) dev_dbg(dev->dev, "size=%u samples=%u msecs=%u sample rate=%lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) src_len, samples, msecs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) samples * 1000UL / msecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return dst_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) * This gets called for the Isochronous pipe (stream). This is done in interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * time, so it has to be fast, not crash, and not stall. Neat.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static void msi2500_isoc_handler(struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct msi2500_dev *dev = (struct msi2500_dev *)urb->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) int i, flen, fstatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) unsigned char *iso_buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) struct msi2500_frame_buf *fbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (unlikely(urb->status == -ENOENT ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) urb->status == -ECONNRESET ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) urb->status == -ESHUTDOWN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) dev_dbg(dev->dev, "URB (%p) unlinked %ssynchronously\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) urb, urb->status == -ENOENT ? "" : "a");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (unlikely(urb->status != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) dev_dbg(dev->dev, "called with status %d\n", urb->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) /* Give up after a number of contiguous errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (++dev->isoc_errors > MAX_ISOC_ERRORS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) dev_dbg(dev->dev, "Too many ISOC errors, bailing out\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) goto handler_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* Reset ISOC error counter. We did get here, after all. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) dev->isoc_errors = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /* Compact data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) for (i = 0; i < urb->number_of_packets; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) void *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* Check frame error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) fstatus = urb->iso_frame_desc[i].status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (unlikely(fstatus)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) dev_dbg_ratelimited(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) "frame=%d/%d has error %d skipping\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) i, urb->number_of_packets, fstatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /* Check if that frame contains data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) flen = urb->iso_frame_desc[i].actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (unlikely(flen == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) iso_buf = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /* Get free framebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) fbuf = msi2500_get_next_fill_buf(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (unlikely(fbuf == NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) dev->vb_full++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) dev_dbg_ratelimited(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) "videobuf is full, %d packets dropped\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) dev->vb_full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) /* fill framebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) ptr = vb2_plane_vaddr(&fbuf->vb.vb2_buf, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) flen = msi2500_convert_stream(dev, ptr, iso_buf, flen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) vb2_set_plane_payload(&fbuf->vb.vb2_buf, 0, flen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) vb2_buffer_done(&fbuf->vb.vb2_buf, VB2_BUF_STATE_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) handler_end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) i = usb_submit_urb(urb, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (unlikely(i != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) dev_dbg(dev->dev, "Error (%d) re-submitting urb\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) static void msi2500_iso_stop(struct msi2500_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) dev_dbg(dev->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /* Unlinking ISOC buffers one by one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) for (i = 0; i < MAX_ISO_BUFS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (dev->urbs[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) dev_dbg(dev->dev, "Unlinking URB %p\n", dev->urbs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) usb_kill_urb(dev->urbs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static void msi2500_iso_free(struct msi2500_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) dev_dbg(dev->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /* Freeing ISOC buffers one by one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) for (i = 0; i < MAX_ISO_BUFS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (dev->urbs[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) dev_dbg(dev->dev, "Freeing URB\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (dev->urbs[i]->transfer_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) usb_free_coherent(dev->udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) dev->urbs[i]->transfer_buffer_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) dev->urbs[i]->transfer_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) dev->urbs[i]->transfer_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) usb_free_urb(dev->urbs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) dev->urbs[i] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /* Both v4l2_lock and vb_queue_lock should be locked when calling this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) static void msi2500_isoc_cleanup(struct msi2500_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) dev_dbg(dev->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) msi2500_iso_stop(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) msi2500_iso_free(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /* Both v4l2_lock and vb_queue_lock should be locked when calling this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static int msi2500_isoc_init(struct msi2500_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) struct urb *urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) int i, j, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) dev_dbg(dev->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) dev->isoc_errors = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) ret = usb_set_interface(dev->udev, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* Allocate and init Isochronuous urbs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) for (i = 0; i < MAX_ISO_BUFS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (urb == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) msi2500_isoc_cleanup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) dev->urbs[i] = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) dev_dbg(dev->dev, "Allocated URB at 0x%p\n", urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) urb->interval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) urb->dev = dev->udev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) urb->pipe = usb_rcvisocpipe(dev->udev, 0x81);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) urb->transfer_buffer = usb_alloc_coherent(dev->udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ISO_BUFFER_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) GFP_KERNEL, &urb->transfer_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (urb->transfer_buffer == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) dev_err(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) "Failed to allocate urb buffer %d\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) msi2500_isoc_cleanup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) urb->transfer_buffer_length = ISO_BUFFER_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) urb->complete = msi2500_isoc_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) urb->context = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) urb->start_frame = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) urb->number_of_packets = ISO_FRAMES_PER_DESC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) for (j = 0; j < ISO_FRAMES_PER_DESC; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) urb->iso_frame_desc[j].offset = j * ISO_MAX_FRAME_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) urb->iso_frame_desc[j].length = ISO_MAX_FRAME_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) /* link */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) for (i = 0; i < MAX_ISO_BUFS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) ret = usb_submit_urb(dev->urbs[i], GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) dev_err(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) "usb_submit_urb %d failed with error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) i, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) msi2500_isoc_cleanup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) dev_dbg(dev->dev, "URB 0x%p submitted.\n", dev->urbs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) /* All is done... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /* Must be called with vb_queue_lock hold */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static void msi2500_cleanup_queued_bufs(struct msi2500_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) dev_dbg(dev->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) spin_lock_irqsave(&dev->queued_bufs_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) while (!list_empty(&dev->queued_bufs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct msi2500_frame_buf *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) buf = list_entry(dev->queued_bufs.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) struct msi2500_frame_buf, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) list_del(&buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) spin_unlock_irqrestore(&dev->queued_bufs_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) /* The user yanked out the cable... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static void msi2500_disconnect(struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) struct v4l2_device *v = usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) struct msi2500_dev *dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) container_of(v, struct msi2500_dev, v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) dev_dbg(dev->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) mutex_lock(&dev->vb_queue_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) mutex_lock(&dev->v4l2_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /* No need to keep the urbs around after disconnection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) dev->udev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) v4l2_device_disconnect(&dev->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) video_unregister_device(&dev->vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) spi_unregister_master(dev->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) mutex_unlock(&dev->v4l2_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) mutex_unlock(&dev->vb_queue_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) v4l2_device_put(&dev->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) static int msi2500_querycap(struct file *file, void *fh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) struct v4l2_capability *cap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) dev_dbg(dev->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) strscpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) strscpy(cap->card, dev->vdev.name, sizeof(cap->card));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) /* Videobuf2 operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static int msi2500_queue_setup(struct vb2_queue *vq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) unsigned int *nbuffers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) unsigned int *nplanes, unsigned int sizes[],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) struct device *alloc_devs[])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) struct msi2500_dev *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) dev_dbg(dev->dev, "nbuffers=%d\n", *nbuffers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) /* Absolute min and max number of buffers available for mmap() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) *nbuffers = clamp_t(unsigned int, *nbuffers, 8, 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) *nplanes = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) sizes[0] = PAGE_ALIGN(dev->buffersize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) dev_dbg(dev->dev, "nbuffers=%d sizes[0]=%d\n", *nbuffers, sizes[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static void msi2500_buf_queue(struct vb2_buffer *vb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) struct msi2500_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) struct msi2500_frame_buf *buf = container_of(vbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct msi2500_frame_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) vb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) /* Check the device has not disconnected between prep and queuing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (unlikely(!dev->udev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) spin_lock_irqsave(&dev->queued_bufs_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) list_add_tail(&buf->list, &dev->queued_bufs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) spin_unlock_irqrestore(&dev->queued_bufs_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) #define CMD_WREG 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) #define CMD_START_STREAMING 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) #define CMD_STOP_STREAMING 0x45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) #define CMD_READ_UNKNOWN 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) #define msi2500_dbg_usb_control_msg(_dev, _r, _t, _v, _i, _b, _l) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) char *_direction; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (_t & USB_DIR_IN) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) _direction = "<<<"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) _direction = ">>>"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) dev_dbg(_dev, "%02x %02x %02x %02x %02x %02x %02x %02x %s %*ph\n", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) _t, _r, _v & 0xff, _v >> 8, _i & 0xff, _i >> 8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) _l & 0xff, _l >> 8, _direction, _l, _b); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static int msi2500_ctrl_msg(struct msi2500_dev *dev, u8 cmd, u32 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) u8 request = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) u8 requesttype = USB_DIR_OUT | USB_TYPE_VENDOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) u16 value = (data >> 0) & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) u16 index = (data >> 16) & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) msi2500_dbg_usb_control_msg(dev->dev, request, requesttype,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) value, index, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) requesttype, value, index, NULL, 0, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) dev_err(dev->dev, "failed %d, cmd %02x, data %04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) ret, cmd, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) static int msi2500_set_usb_adc(struct msi2500_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) unsigned int f_vco, f_sr, div_n, k, k_cw, div_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) u32 reg3, reg4, reg7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) struct v4l2_ctrl *bandwidth_auto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) struct v4l2_ctrl *bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) f_sr = dev->f_adc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) /* set tuner, subdev, filters according to sampling rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) bandwidth_auto = v4l2_ctrl_find(&dev->hdl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) V4L2_CID_RF_TUNER_BANDWIDTH_AUTO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) if (v4l2_ctrl_g_ctrl(bandwidth_auto)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) bandwidth = v4l2_ctrl_find(&dev->hdl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) V4L2_CID_RF_TUNER_BANDWIDTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) v4l2_ctrl_s_ctrl(bandwidth, dev->f_adc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) /* select stream format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) switch (dev->pixelformat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) case V4L2_SDR_FMT_CU8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) reg7 = 0x000c9407; /* 504 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) case V4L2_SDR_FMT_CU16LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) reg7 = 0x00009407; /* 252 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) case V4L2_SDR_FMT_CS8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) reg7 = 0x000c9407; /* 504 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) case MSI2500_PIX_FMT_SDR_MSI2500_384:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) reg7 = 0x0000a507; /* 384 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) case MSI2500_PIX_FMT_SDR_S12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) reg7 = 0x00008507; /* 336 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) case V4L2_SDR_FMT_CS14LE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) reg7 = 0x00009407; /* 252 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) reg7 = 0x000c9407; /* 504 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) * Fractional-N synthesizer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) * +----------------------------------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) * v |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) * Fref +----+ +-------+ +-----+ +------+ +---+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) * ------> | PD | --> | VCO | --> | /2 | ------> | /N.F | <-- | K |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) * +----+ +-------+ +-----+ +------+ +---+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) * |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) * |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) * v
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) * +-------+ +-----+ Fout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * | /Rout | --> | /12 | ------>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) * +-------+ +-----+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) * Synthesizer config is just a educated guess...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * [7:0] 0x03, register address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) * [8] 1, power control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) * [9] ?, power control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) * [12:10] output divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) * [13] 0 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) * [14] 0 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) * [15] fractional MSB, bit 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) * [16:19] N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) * [23:20] ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) * [24:31] 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) * output divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) * val div
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * 0 - (invalid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * 1 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) * 2 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) * 3 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * 4 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * 5 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * 6 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * 7 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * VCO 202000000 - 720000000++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) #define F_REF 24000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) #define DIV_PRE_N 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) #define DIV_LO_OUT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) reg3 = 0x01000303;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) reg4 = 0x00000004;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) /* XXX: Filters? AGC? VCO band? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) if (f_sr < 6000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) reg3 |= 0x1 << 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) else if (f_sr < 7000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) reg3 |= 0x5 << 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) else if (f_sr < 8500000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) reg3 |= 0x9 << 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) reg3 |= 0xd << 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) for (div_out = 4; div_out < 16; div_out += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) f_vco = f_sr * div_out * DIV_LO_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) dev_dbg(dev->dev, "div_out=%u f_vco=%u\n", div_out, f_vco);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) if (f_vco >= 202000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) /* Calculate PLL integer and fractional control word. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) div_n = div_u64_rem(f_vco, DIV_PRE_N * F_REF, &k);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) k_cw = div_u64((u64) k * 0x200000, DIV_PRE_N * F_REF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) reg3 |= div_n << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) reg3 |= (div_out / 2 - 1) << 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) reg3 |= ((k_cw >> 20) & 0x000001) << 15; /* [20] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) reg4 |= ((k_cw >> 0) & 0x0fffff) << 8; /* [19:0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) dev_dbg(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) "f_sr=%u f_vco=%u div_n=%u k=%u div_out=%u reg3=%08x reg4=%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) f_sr, f_vco, div_n, k, div_out, reg3, reg4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00608008);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00000c05);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00020000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00480102);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) ret = msi2500_ctrl_msg(dev, CMD_WREG, 0x00f38008);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) ret = msi2500_ctrl_msg(dev, CMD_WREG, reg7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) ret = msi2500_ctrl_msg(dev, CMD_WREG, reg4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) ret = msi2500_ctrl_msg(dev, CMD_WREG, reg3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static int msi2500_start_streaming(struct vb2_queue *vq, unsigned int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) struct msi2500_dev *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) dev_dbg(dev->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) if (!dev->udev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) if (mutex_lock_interruptible(&dev->v4l2_lock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) return -ERESTARTSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) /* wake-up tuner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) v4l2_subdev_call(dev->v4l2_subdev, core, s_power, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) ret = msi2500_set_usb_adc(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) ret = msi2500_isoc_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) msi2500_cleanup_queued_bufs(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) ret = msi2500_ctrl_msg(dev, CMD_START_STREAMING, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) mutex_unlock(&dev->v4l2_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) static void msi2500_stop_streaming(struct vb2_queue *vq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) struct msi2500_dev *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) dev_dbg(dev->dev, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) mutex_lock(&dev->v4l2_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) if (dev->udev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) msi2500_isoc_cleanup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) msi2500_cleanup_queued_bufs(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) /* according to tests, at least 700us delay is required */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) if (!msi2500_ctrl_msg(dev, CMD_STOP_STREAMING, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) /* sleep USB IF / ADC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) msi2500_ctrl_msg(dev, CMD_WREG, 0x01000003);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) /* sleep tuner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) v4l2_subdev_call(dev->v4l2_subdev, core, s_power, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) mutex_unlock(&dev->v4l2_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) static const struct vb2_ops msi2500_vb2_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) .queue_setup = msi2500_queue_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) .buf_queue = msi2500_buf_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) .start_streaming = msi2500_start_streaming,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) .stop_streaming = msi2500_stop_streaming,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) .wait_prepare = vb2_ops_wait_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) .wait_finish = vb2_ops_wait_finish,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) static int msi2500_enum_fmt_sdr_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) struct v4l2_fmtdesc *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) dev_dbg(dev->dev, "index=%d\n", f->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) if (f->index >= dev->num_formats)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) f->pixelformat = formats[f->index].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) static int msi2500_g_fmt_sdr_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) (char *)&dev->pixelformat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) f->fmt.sdr.pixelformat = dev->pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) f->fmt.sdr.buffersize = dev->buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) static int msi2500_s_fmt_sdr_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) struct vb2_queue *q = &dev->vb_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) (char *)&f->fmt.sdr.pixelformat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) if (vb2_is_busy(q))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) for (i = 0; i < dev->num_formats; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) if (formats[i].pixelformat == f->fmt.sdr.pixelformat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) dev->pixelformat = formats[i].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) dev->buffersize = formats[i].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) f->fmt.sdr.buffersize = formats[i].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) dev->pixelformat = formats[0].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) dev->buffersize = formats[0].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) f->fmt.sdr.pixelformat = formats[0].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) f->fmt.sdr.buffersize = formats[0].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) static int msi2500_try_fmt_sdr_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) (char *)&f->fmt.sdr.pixelformat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) for (i = 0; i < dev->num_formats; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) if (formats[i].pixelformat == f->fmt.sdr.pixelformat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) f->fmt.sdr.buffersize = formats[i].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) f->fmt.sdr.pixelformat = formats[0].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) f->fmt.sdr.buffersize = formats[0].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) static int msi2500_s_tuner(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) const struct v4l2_tuner *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) dev_dbg(dev->dev, "index=%d\n", v->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) if (v->index == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) else if (v->index == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, s_tuner, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static int msi2500_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) dev_dbg(dev->dev, "index=%d\n", v->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) if (v->index == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) strscpy(v->name, "Mirics MSi2500", sizeof(v->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) v->type = V4L2_TUNER_ADC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) v->rangelow = 1200000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) v->rangehigh = 15000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) } else if (v->index == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, g_tuner, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) static int msi2500_g_frequency(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) struct v4l2_frequency *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) dev_dbg(dev->dev, "tuner=%d type=%d\n", f->tuner, f->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) if (f->tuner == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) f->frequency = dev->f_adc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) } else if (f->tuner == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) f->type = V4L2_TUNER_RF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, g_frequency, f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) static int msi2500_s_frequency(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) const struct v4l2_frequency *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) dev_dbg(dev->dev, "tuner=%d type=%d frequency=%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) f->tuner, f->type, f->frequency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) if (f->tuner == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) dev->f_adc = clamp_t(unsigned int, f->frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) bands[0].rangelow,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) bands[0].rangehigh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) dev_dbg(dev->dev, "ADC frequency=%u Hz\n", dev->f_adc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) ret = msi2500_set_usb_adc(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) } else if (f->tuner == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) ret = v4l2_subdev_call(dev->v4l2_subdev, tuner, s_frequency, f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) static int msi2500_enum_freq_bands(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) struct v4l2_frequency_band *band)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) struct msi2500_dev *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) dev_dbg(dev->dev, "tuner=%d type=%d index=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) band->tuner, band->type, band->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) if (band->tuner == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) if (band->index >= ARRAY_SIZE(bands)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) *band = bands[band->index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) } else if (band->tuner == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) ret = v4l2_subdev_call(dev->v4l2_subdev, tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) enum_freq_bands, band);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) static const struct v4l2_ioctl_ops msi2500_ioctl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) .vidioc_querycap = msi2500_querycap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) .vidioc_enum_fmt_sdr_cap = msi2500_enum_fmt_sdr_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) .vidioc_g_fmt_sdr_cap = msi2500_g_fmt_sdr_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) .vidioc_s_fmt_sdr_cap = msi2500_s_fmt_sdr_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) .vidioc_try_fmt_sdr_cap = msi2500_try_fmt_sdr_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) .vidioc_reqbufs = vb2_ioctl_reqbufs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) .vidioc_create_bufs = vb2_ioctl_create_bufs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) .vidioc_querybuf = vb2_ioctl_querybuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) .vidioc_qbuf = vb2_ioctl_qbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) .vidioc_dqbuf = vb2_ioctl_dqbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) .vidioc_streamon = vb2_ioctl_streamon,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) .vidioc_streamoff = vb2_ioctl_streamoff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) .vidioc_g_tuner = msi2500_g_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) .vidioc_s_tuner = msi2500_s_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) .vidioc_g_frequency = msi2500_g_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) .vidioc_s_frequency = msi2500_s_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) .vidioc_enum_freq_bands = msi2500_enum_freq_bands,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) .vidioc_log_status = v4l2_ctrl_log_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) static const struct v4l2_file_operations msi2500_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) .open = v4l2_fh_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) .release = vb2_fop_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) .read = vb2_fop_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) .poll = vb2_fop_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) .mmap = vb2_fop_mmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) .unlocked_ioctl = video_ioctl2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) static const struct video_device msi2500_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) .name = "Mirics MSi3101 SDR Dongle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) .release = video_device_release_empty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) .fops = &msi2500_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) .ioctl_ops = &msi2500_ioctl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) static void msi2500_video_release(struct v4l2_device *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) struct msi2500_dev *dev = container_of(v, struct msi2500_dev, v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) v4l2_ctrl_handler_free(&dev->hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) v4l2_device_unregister(&dev->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) kfree(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) static int msi2500_transfer_one_message(struct spi_master *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) struct spi_message *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) struct msi2500_dev *dev = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) struct spi_transfer *t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) list_for_each_entry(t, &m->transfers, transfer_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) dev_dbg(dev->dev, "msg=%*ph\n", t->len, t->tx_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) data = 0x09; /* reg 9 is SPI adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) data |= ((u8 *)t->tx_buf)[0] << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) data |= ((u8 *)t->tx_buf)[1] << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) data |= ((u8 *)t->tx_buf)[2] << 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) ret = msi2500_ctrl_msg(dev, CMD_WREG, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) m->status = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) spi_finalize_current_message(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) static int msi2500_probe(struct usb_interface *intf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) struct msi2500_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) struct spi_master *master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) static struct spi_board_info board_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) .modalias = "msi001",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) .bus_num = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) .chip_select = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) .max_speed_hz = 12000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) dev = kzalloc(sizeof(*dev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) mutex_init(&dev->v4l2_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) mutex_init(&dev->vb_queue_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) spin_lock_init(&dev->queued_bufs_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) INIT_LIST_HEAD(&dev->queued_bufs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) dev->dev = &intf->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) dev->udev = interface_to_usbdev(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) dev->f_adc = bands[0].rangelow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) dev->pixelformat = formats[0].pixelformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) dev->buffersize = formats[0].buffersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) dev->num_formats = NUM_FORMATS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) if (!msi2500_emulated_fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) dev->num_formats -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) /* Init videobuf2 queue structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) dev->vb_queue.type = V4L2_BUF_TYPE_SDR_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) dev->vb_queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) dev->vb_queue.drv_priv = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) dev->vb_queue.buf_struct_size = sizeof(struct msi2500_frame_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) dev->vb_queue.ops = &msi2500_vb2_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) dev->vb_queue.mem_ops = &vb2_vmalloc_memops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) dev->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) ret = vb2_queue_init(&dev->vb_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) dev_err(dev->dev, "Could not initialize vb2 queue\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) goto err_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) /* Init video_device structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) dev->vdev = msi2500_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) dev->vdev.queue = &dev->vb_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) dev->vdev.queue->lock = &dev->vb_queue_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) video_set_drvdata(&dev->vdev, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) /* Register the v4l2_device structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) dev->v4l2_dev.release = msi2500_video_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) ret = v4l2_device_register(&intf->dev, &dev->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) dev_err(dev->dev, "Failed to register v4l2-device (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) goto err_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) /* SPI master adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) master = spi_alloc_master(dev->dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) if (master == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) goto err_unregister_v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) dev->master = master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) master->bus_num = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) master->num_chipselect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) master->transfer_one_message = msi2500_transfer_one_message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) spi_master_set_devdata(master, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) ret = spi_register_master(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) spi_master_put(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) goto err_unregister_v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) /* load v4l2 subdevice */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) sd = v4l2_spi_new_subdev(&dev->v4l2_dev, master, &board_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) dev->v4l2_subdev = sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) if (sd == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) dev_err(dev->dev, "cannot get v4l2 subdevice\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) goto err_unregister_master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) /* Register controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) v4l2_ctrl_handler_init(&dev->hdl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) if (dev->hdl.error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) ret = dev->hdl.error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) dev_err(dev->dev, "Could not initialize controls\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) goto err_free_controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) /* currently all controls are from subdev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) v4l2_ctrl_add_handler(&dev->hdl, sd->ctrl_handler, NULL, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) dev->v4l2_dev.ctrl_handler = &dev->hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) dev->vdev.v4l2_dev = &dev->v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) dev->vdev.lock = &dev->v4l2_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) dev->vdev.device_caps = V4L2_CAP_SDR_CAPTURE | V4L2_CAP_STREAMING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) V4L2_CAP_READWRITE | V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) ret = video_register_device(&dev->vdev, VFL_TYPE_SDR, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) dev_err(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) "Failed to register as video device (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) goto err_unregister_v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) dev_info(dev->dev, "Registered as %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) video_device_node_name(&dev->vdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) dev_notice(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) "SDR API is still slightly experimental and functionality changes may follow\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) err_free_controls:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) v4l2_ctrl_handler_free(&dev->hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) err_unregister_master:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) spi_unregister_master(dev->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) err_unregister_v4l2_dev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) v4l2_device_unregister(&dev->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) err_free_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) kfree(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) /* USB device ID list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) static const struct usb_device_id msi2500_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) {USB_DEVICE(0x1df7, 0x2500)}, /* Mirics MSi3101 SDR Dongle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) {USB_DEVICE(0x2040, 0xd300)}, /* Hauppauge WinTV 133559 LF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) MODULE_DEVICE_TABLE(usb, msi2500_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) /* USB subsystem interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) static struct usb_driver msi2500_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) .name = KBUILD_MODNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) .probe = msi2500_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) .disconnect = msi2500_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) .id_table = msi2500_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) module_usb_driver(msi2500_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) MODULE_DESCRIPTION("Mirics MSi3101 SDR Dongle");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags