^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Hauppauge HD PVR USB driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2008 Janne Grunau (j@jannau.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * IR device registration code is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2010 Andy Walls <awalls@md.metrocast.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #if IS_ENABLED(CONFIG_I2C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "hdpvr.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define CTRL_READ_REQUEST 0xb8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CTRL_WRITE_REQUEST 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define REQTYPE_I2C_READ 0xb1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define REQTYPE_I2C_WRITE 0xb0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define REQTYPE_I2C_WRITE_STATT 0xd0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define Z8F0811_IR_TX_I2C_ADDR 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define Z8F0811_IR_RX_I2C_ADDR 0x71
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct i2c_client *hdpvr_register_ir_i2c(struct hdpvr_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct IR_i2c_init_data *init_data = &dev->ir_i2c_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct i2c_board_info info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) I2C_BOARD_INFO("ir_z8f0811_hdpvr", Z8F0811_IR_RX_I2C_ADDR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* Our default information for ir-kbd-i2c.c to use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) init_data->ir_codes = RC_MAP_HAUPPAUGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) init_data->type = RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC6_MCE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) RC_PROTO_BIT_RC6_6A_32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) init_data->name = "HD-PVR";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) init_data->polling_interval = 405; /* ms, duplicated from Windows */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) info.platform_data = init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return i2c_new_client_device(&dev->i2c_adapter, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int hdpvr_i2c_read(struct hdpvr_device *dev, int bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unsigned char addr, char *wdata, int wlen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) char *data, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if ((len > sizeof(dev->i2c_buf)) || (wlen > sizeof(dev->i2c_buf)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (wlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) memcpy(dev->i2c_buf, wdata, wlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) (bus << 8) | addr, 0, dev->i2c_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) wlen, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) REQTYPE_I2C_READ, CTRL_READ_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) (bus << 8) | addr, 0, dev->i2c_buf, len, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (ret == len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) memcpy(data, dev->i2c_buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) } else if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int hdpvr_i2c_write(struct hdpvr_device *dev, int bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned char addr, char *data, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (len > sizeof(dev->i2c_buf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) memcpy(dev->i2c_buf, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) (bus << 8) | addr, 0, dev->i2c_buf, len, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) REQTYPE_I2C_WRITE_STATT, CTRL_READ_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 0, 0, dev->i2c_buf, 2, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if ((ret == 2) && (dev->i2c_buf[1] == (len - 1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) else if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int hdpvr_transfer(struct i2c_adapter *i2c_adapter, struct i2c_msg *msgs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct hdpvr_device *dev = i2c_get_adapdata(i2c_adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int retval = 0, addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) mutex_lock(&dev->i2c_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) addr = msgs[0].addr << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (num == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (msgs[0].flags & I2C_M_RD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) retval = hdpvr_i2c_read(dev, 1, addr, NULL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) msgs[0].buf, msgs[0].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) retval = hdpvr_i2c_write(dev, 1, addr, msgs[0].buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) msgs[0].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) } else if (num == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (msgs[0].addr != msgs[1].addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) v4l2_warn(&dev->v4l2_dev, "refusing 2-phase i2c xfer with conflicting target addresses\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) retval = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if ((msgs[0].flags & I2C_M_RD) || !(msgs[1].flags & I2C_M_RD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) v4l2_warn(&dev->v4l2_dev, "refusing complex xfer with r0=%d, r1=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) msgs[0].flags & I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) msgs[1].flags & I2C_M_RD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) retval = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * Write followed by atomic read is the only complex xfer that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * we actually support here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) retval = hdpvr_i2c_read(dev, 1, addr, msgs[0].buf, msgs[0].len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) msgs[1].buf, msgs[1].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) v4l2_warn(&dev->v4l2_dev, "refusing %d-phase i2c xfer\n", num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) mutex_unlock(&dev->i2c_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return retval ? retval : num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static u32 hdpvr_functionality(struct i2c_adapter *adapter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct i2c_algorithm hdpvr_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .master_xfer = hdpvr_transfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .functionality = hdpvr_functionality,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static const struct i2c_adapter hdpvr_i2c_adapter_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .name = "Hauppauge HD PVR I2C",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .algo = &hdpvr_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int hdpvr_activate_ir(struct hdpvr_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) char buffer[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) mutex_lock(&dev->i2c_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) hdpvr_i2c_read(dev, 0, 0x54, NULL, 0, buffer, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) buffer[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) buffer[1] = 0x8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) hdpvr_i2c_write(dev, 1, 0x54, buffer, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) buffer[1] = 0x18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) hdpvr_i2c_write(dev, 1, 0x54, buffer, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) mutex_unlock(&dev->i2c_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int hdpvr_register_i2c_adapter(struct hdpvr_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) hdpvr_activate_ir(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) dev->i2c_adapter = hdpvr_i2c_adapter_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) dev->i2c_adapter.dev.parent = &dev->udev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) i2c_set_adapdata(&dev->i2c_adapter, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return i2c_add_adapter(&dev->i2c_adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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