^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Syntek STK1135 subdriver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2013 Ondrej Zary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on Syntekdriver (stk11xx) by Nicolas VIVIEN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * http://syntekdriver.sourceforge.net
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define MODULE_NAME "stk1135"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "gspca.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "stk1135.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MODULE_AUTHOR("Ondrej Zary");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MODULE_DESCRIPTION("Syntek STK1135 USB Camera Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* specific webcam descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct sd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct gspca_dev gspca_dev; /* !! must be the first item */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u8 pkt_seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u8 sensor_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) bool flip_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u8 flip_debounce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct v4l2_ctrl *hflip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct v4l2_ctrl *vflip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static const struct v4l2_pix_format stk1135_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* default mode (this driver supports variable resolution) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .bytesperline = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .sizeimage = 640 * 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .colorspace = V4L2_COLORSPACE_SRGB},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* -- read a register -- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static u8 reg_r(struct gspca_dev *gspca_dev, u16 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct usb_device *dev = gspca_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (gspca_dev->usb_err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) gspca_dev->usb_buf, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) gspca_dbg(gspca_dev, D_USBI, "reg_r 0x%x=0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) index, gspca_dev->usb_buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) pr_err("reg_r 0x%x err %d\n", index, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) gspca_dev->usb_err = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return gspca_dev->usb_buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* -- write a register -- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static void reg_w(struct gspca_dev *gspca_dev, u16 index, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct usb_device *dev = gspca_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (gspca_dev->usb_err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) gspca_dbg(gspca_dev, D_USBO, "reg_w 0x%x:=0x%02x\n", index, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) pr_err("reg_w 0x%x err %d\n", index, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) gspca_dev->usb_err = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static void reg_w_mask(struct gspca_dev *gspca_dev, u16 index, u8 val, u8 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) val = (reg_r(gspca_dev, index) & ~mask) | (val & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) reg_w(gspca_dev, index, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* this function is called at probe time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static int sd_config(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) gspca_dev->cam.cam_mode = stk1135_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) gspca_dev->cam.nmodes = ARRAY_SIZE(stk1135_modes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int stk1135_serial_wait_ready(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) val = reg_r(gspca_dev, STK1135_REG_SICTL + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (i++ > 500) { /* maximum retry count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) pr_err("serial bus timeout: status=0x%02x\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* repeat if BUSY or WRITE/READ not finished */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) } while ((val & 0x10) || !(val & 0x05));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static u8 sensor_read_8(struct gspca_dev *gspca_dev, u8 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) reg_w(gspca_dev, STK1135_REG_SBUSR, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* begin read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) reg_w(gspca_dev, STK1135_REG_SICTL, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* wait until finished */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (stk1135_serial_wait_ready(gspca_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) pr_err("Sensor read failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return reg_r(gspca_dev, STK1135_REG_SBUSR + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static u16 sensor_read_16(struct gspca_dev *gspca_dev, u8 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return (sensor_read_8(gspca_dev, addr) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) sensor_read_8(gspca_dev, 0xf1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static void sensor_write_8(struct gspca_dev *gspca_dev, u8 addr, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* load address and data registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) reg_w(gspca_dev, STK1135_REG_SBUSW, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) reg_w(gspca_dev, STK1135_REG_SBUSW + 1, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* begin write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) reg_w(gspca_dev, STK1135_REG_SICTL, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* wait until finished */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (stk1135_serial_wait_ready(gspca_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pr_err("Sensor write failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static void sensor_write_16(struct gspca_dev *gspca_dev, u8 addr, u16 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) sensor_write_8(gspca_dev, addr, data >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) sensor_write_8(gspca_dev, 0xf1, data & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static void sensor_set_page(struct gspca_dev *gspca_dev, u8 page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (page != sd->sensor_page) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) sensor_write_16(gspca_dev, 0xf0, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) sd->sensor_page = page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static u16 sensor_read(struct gspca_dev *gspca_dev, u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) sensor_set_page(gspca_dev, reg >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return sensor_read_16(gspca_dev, reg & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static void sensor_write(struct gspca_dev *gspca_dev, u16 reg, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) sensor_set_page(gspca_dev, reg >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) sensor_write_16(gspca_dev, reg & 0xff, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static void sensor_write_mask(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) u16 reg, u16 val, u16 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) val = (sensor_read(gspca_dev, reg) & ~mask) | (val & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) sensor_write(gspca_dev, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct sensor_val {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) u16 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* configure MT9M112 sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static void stk1135_configure_mt9m112(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const struct sensor_val cfg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /* restart&reset, chip enable, reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) { 0x00d, 0x000b }, { 0x00d, 0x0008 }, { 0x035, 0x0022 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* mode ctl: AWB on, AE both, clip aper corr, defect corr, AE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) { 0x106, 0x700e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) { 0x2dd, 0x18e0 }, /* B-R thresholds, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* AWB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) { 0x21f, 0x0180 }, /* Cb and Cr limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) { 0x220, 0xc814 }, { 0x221, 0x8080 }, /* lum limits, RGB gain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) { 0x222, 0xa078 }, { 0x223, 0xa078 }, /* R, B limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) { 0x224, 0x5f20 }, { 0x228, 0xea02 }, /* mtx adj lim, adv ctl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) { 0x229, 0x867a }, /* wide gates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* Color correction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /* imager gains base, delta, delta signs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) { 0x25e, 0x594c }, { 0x25f, 0x4d51 }, { 0x260, 0x0002 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* AWB adv ctl 2, gain offs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) { 0x2ef, 0x0008 }, { 0x2f2, 0x0000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* base matrix signs, scale K1-5, K6-9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) { 0x202, 0x00ee }, { 0x203, 0x3923 }, { 0x204, 0x0724 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* base matrix coef */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) { 0x209, 0x00cd }, { 0x20a, 0x0093 }, { 0x20b, 0x0004 },/*K1-3*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) { 0x20c, 0x005c }, { 0x20d, 0x00d9 }, { 0x20e, 0x0053 },/*K4-6*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) { 0x20f, 0x0008 }, { 0x210, 0x0091 }, { 0x211, 0x00cf },/*K7-9*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) { 0x215, 0x0000 }, /* delta mtx signs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* delta matrix coef */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) { 0x216, 0x0000 }, { 0x217, 0x0000 }, { 0x218, 0x0000 },/*D1-3*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) { 0x219, 0x0000 }, { 0x21a, 0x0000 }, { 0x21b, 0x0000 },/*D4-6*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) { 0x21c, 0x0000 }, { 0x21d, 0x0000 }, { 0x21e, 0x0000 },/*D7-9*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* enable & disable manual WB to apply color corr. settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) { 0x106, 0xf00e }, { 0x106, 0x700e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /* Lens shading correction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) { 0x180, 0x0007 }, /* control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* vertical knee 0, 2+1, 4+3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) { 0x181, 0xde13 }, { 0x182, 0xebe2 }, { 0x183, 0x00f6 }, /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) { 0x184, 0xe114 }, { 0x185, 0xeadd }, { 0x186, 0xfdf6 }, /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) { 0x187, 0xe511 }, { 0x188, 0xede6 }, { 0x189, 0xfbf7 }, /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* horizontal knee 0, 2+1, 4+3, 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) { 0x18a, 0xd613 }, { 0x18b, 0xedec }, /* R .. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) { 0x18c, 0xf9f2 }, { 0x18d, 0x0000 }, /* .. R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) { 0x18e, 0xd815 }, { 0x18f, 0xe9ea }, /* G .. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) { 0x190, 0xf9f1 }, { 0x191, 0x0002 }, /* .. G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) { 0x192, 0xde10 }, { 0x193, 0xefef }, /* B .. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) { 0x194, 0xfbf4 }, { 0x195, 0x0002 }, /* .. B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* vertical knee 6+5, 8+7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) { 0x1b6, 0x0e06 }, { 0x1b7, 0x2713 }, /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) { 0x1b8, 0x1106 }, { 0x1b9, 0x2713 }, /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) { 0x1ba, 0x0c03 }, { 0x1bb, 0x2a0f }, /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* horizontal knee 7+6, 9+8, 10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) { 0x1bc, 0x1208 }, { 0x1bd, 0x1a16 }, { 0x1be, 0x0022 }, /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) { 0x1bf, 0x150a }, { 0x1c0, 0x1c1a }, { 0x1c1, 0x002d }, /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) { 0x1c2, 0x1109 }, { 0x1c3, 0x1414 }, { 0x1c4, 0x002a }, /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) { 0x106, 0x740e }, /* enable lens shading correction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* Gamma correction - context A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) { 0x153, 0x0b03 }, { 0x154, 0x4722 }, { 0x155, 0xac82 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) { 0x156, 0xdac7 }, { 0x157, 0xf5e9 }, { 0x158, 0xff00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /* Gamma correction - context B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) { 0x1dc, 0x0b03 }, { 0x1dd, 0x4722 }, { 0x1de, 0xac82 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) { 0x1df, 0xdac7 }, { 0x1e0, 0xf5e9 }, { 0x1e1, 0xff00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* output format: RGB, invert output pixclock, output bayer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) { 0x13a, 0x4300 }, { 0x19b, 0x4300 }, /* for context A, B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) { 0x108, 0x0180 }, /* format control - enable bayer row flip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) { 0x22f, 0xd100 }, { 0x29c, 0xd100 }, /* AE A, B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* default prg conf, prg ctl - by 0x2d2, prg advance - PA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) { 0x2d2, 0x0000 }, { 0x2cc, 0x0004 }, { 0x2cb, 0x0001 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) { 0x22e, 0x0c3c }, { 0x267, 0x1010 }, /* AE tgt ctl, gain lim */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* PLL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) { 0x065, 0xa000 }, /* clk ctl - enable PLL (clear bit 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) { 0x066, 0x2003 }, { 0x067, 0x0501 }, /* PLL M=128, N=3, P=1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) { 0x065, 0x2000 }, /* disable PLL bypass (clear bit 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) { 0x005, 0x01b8 }, { 0x007, 0x00d8 }, /* horiz blanking B, A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* AE line size, shutter delay limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) { 0x239, 0x06c0 }, { 0x23b, 0x040e }, /* for context A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) { 0x23a, 0x06c0 }, { 0x23c, 0x0564 }, /* for context B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* shutter width basis 60Hz, 50Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) { 0x257, 0x0208 }, { 0x258, 0x0271 }, /* for context A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) { 0x259, 0x0209 }, { 0x25a, 0x0271 }, /* for context B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) { 0x25c, 0x120d }, { 0x25d, 0x1712 }, /* flicker 60Hz, 50Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) { 0x264, 0x5e1c }, /* reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /* flicker, AE gain limits, gain zone limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) { 0x25b, 0x0003 }, { 0x236, 0x7810 }, { 0x237, 0x8304 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) { 0x008, 0x0021 }, /* vert blanking A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) u16 width, height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) for (i = 0; i < ARRAY_SIZE(cfg); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) sensor_write(gspca_dev, cfg[i].reg, cfg[i].val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* set output size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) width = gspca_dev->pixfmt.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) height = gspca_dev->pixfmt.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (width <= 640 && height <= 512) { /* context A (half readout speed)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) sensor_write(gspca_dev, 0x1a7, width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) sensor_write(gspca_dev, 0x1aa, height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /* set read mode context A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) sensor_write(gspca_dev, 0x0c8, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* set resize, read mode, vblank, hblank context A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) sensor_write(gspca_dev, 0x2c8, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) } else { /* context B (full readout speed) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) sensor_write(gspca_dev, 0x1a1, width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) sensor_write(gspca_dev, 0x1a4, height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* set read mode context B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) sensor_write(gspca_dev, 0x0c8, 0x0008);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* set resize, read mode, vblank, hblank context B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) sensor_write(gspca_dev, 0x2c8, 0x040b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static void stk1135_configure_clock(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /* configure SCLKOUT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) reg_w(gspca_dev, STK1135_REG_TMGEN, 0x12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* set 1 clock per pixel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* and positive edge clocked pulse high when pixel counter = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) reg_w(gspca_dev, STK1135_REG_TCP1 + 0, 0x41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) reg_w(gspca_dev, STK1135_REG_TCP1 + 1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) reg_w(gspca_dev, STK1135_REG_TCP1 + 2, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) reg_w(gspca_dev, STK1135_REG_TCP1 + 3, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) /* enable CLKOUT for sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) reg_w(gspca_dev, STK1135_REG_SENSO + 0, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* disable STOP clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) reg_w(gspca_dev, STK1135_REG_SENSO + 1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /* set lower 8 bits of PLL feedback divider */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) reg_w(gspca_dev, STK1135_REG_SENSO + 3, 0x07);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* set other PLL parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) reg_w(gspca_dev, STK1135_REG_PLLFD, 0x06);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* enable timing generator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) reg_w(gspca_dev, STK1135_REG_TMGEN, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* enable PLL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) reg_w(gspca_dev, STK1135_REG_SENSO + 2, 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /* set serial interface clock divider (30MHz/0x1f*16+2) = 60240 kHz) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) reg_w(gspca_dev, STK1135_REG_SICTL + 2, 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /* wait a while for sensor to catch up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) udelay(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static void stk1135_camera_disable(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) /* set capture end Y position to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) reg_w(gspca_dev, STK1135_REG_CIEPO + 2, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) reg_w(gspca_dev, STK1135_REG_CIEPO + 3, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) /* disable capture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) reg_w_mask(gspca_dev, STK1135_REG_SCTRL, 0x00, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /* enable sensor standby and diasble chip enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) sensor_write_mask(gspca_dev, 0x00d, 0x0004, 0x000c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /* disable PLL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) reg_w_mask(gspca_dev, STK1135_REG_SENSO + 2, 0x00, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /* disable timing generator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) reg_w(gspca_dev, STK1135_REG_TMGEN, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /* enable STOP clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) reg_w(gspca_dev, STK1135_REG_SENSO + 1, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* disable CLKOUT for sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) reg_w(gspca_dev, STK1135_REG_SENSO, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /* disable sensor (GPIO5) and enable GPIO0,3,6 (?) - sensor standby? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) reg_w(gspca_dev, STK1135_REG_GCTRL, 0x49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* this function is called at probe and resume time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static int sd_init(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) u16 sensor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) char *sensor_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /* set GPIO3,4,5,6 direction to output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) reg_w(gspca_dev, STK1135_REG_GCTRL + 2, 0x78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /* enable sensor (GPIO5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) reg_w(gspca_dev, STK1135_REG_GCTRL, (1 << 5));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /* disable ROM interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) reg_w(gspca_dev, STK1135_REG_GCTRL + 3, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* enable interrupts from GPIO8 (flip sensor) and GPIO9 (???) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) reg_w(gspca_dev, STK1135_REG_ICTRL + 1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) reg_w(gspca_dev, STK1135_REG_ICTRL + 3, 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* enable remote wakeup from GPIO9 (???) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) reg_w(gspca_dev, STK1135_REG_RMCTL + 1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) reg_w(gspca_dev, STK1135_REG_RMCTL + 3, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) /* reset serial interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) reg_w(gspca_dev, STK1135_REG_SICTL, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) reg_w(gspca_dev, STK1135_REG_SICTL, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) /* set sensor address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) reg_w(gspca_dev, STK1135_REG_SICTL + 3, 0xba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) /* disable alt 2-wire serial interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) reg_w(gspca_dev, STK1135_REG_ASIC + 3, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) stk1135_configure_clock(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) /* read sensor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) sd->sensor_page = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) sensor_id = sensor_read(gspca_dev, 0x000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) switch (sensor_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) case 0x148c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) sensor_name = "MT9M112";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) sensor_name = "unknown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) pr_info("Detected sensor type %s (0x%x)\n", sensor_name, sensor_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) stk1135_camera_disable(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return gspca_dev->usb_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /* -- start the camera -- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static int sd_start(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) u16 width, height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /* enable sensor (GPIO5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) reg_w(gspca_dev, STK1135_REG_GCTRL, (1 << 5));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) stk1135_configure_clock(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) /* set capture start position X = 0, Y = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) reg_w(gspca_dev, STK1135_REG_CISPO + 0, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) reg_w(gspca_dev, STK1135_REG_CISPO + 1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) reg_w(gspca_dev, STK1135_REG_CISPO + 2, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) reg_w(gspca_dev, STK1135_REG_CISPO + 3, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /* set capture end position */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) width = gspca_dev->pixfmt.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) height = gspca_dev->pixfmt.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) reg_w(gspca_dev, STK1135_REG_CIEPO + 0, width & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) reg_w(gspca_dev, STK1135_REG_CIEPO + 1, width >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) reg_w(gspca_dev, STK1135_REG_CIEPO + 2, height & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) reg_w(gspca_dev, STK1135_REG_CIEPO + 3, height >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /* set 8-bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) reg_w(gspca_dev, STK1135_REG_SCTRL, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) stk1135_configure_mt9m112(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* enable capture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) reg_w_mask(gspca_dev, STK1135_REG_SCTRL, 0x80, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) if (gspca_dev->usb_err >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) gspca_dbg(gspca_dev, D_STREAM, "camera started alt: 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) gspca_dev->alt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) sd->pkt_seq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return gspca_dev->usb_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static void sd_stopN(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) struct usb_device *dev = gspca_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) usb_set_interface(dev, gspca_dev->iface, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) stk1135_camera_disable(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) gspca_dbg(gspca_dev, D_STREAM, "camera stopped\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static void sd_pkt_scan(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) u8 *data, /* isoc packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) int len) /* iso packet length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) int skip = sizeof(struct stk1135_pkt_header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) bool flip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) enum gspca_packet_type pkt_type = INTER_PACKET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) struct stk1135_pkt_header *hdr = (void *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) u8 seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (len < 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) gspca_dbg(gspca_dev, D_PACK, "received short packet (less than 4 bytes)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* GPIO 8 is flip sensor (1 = normal position, 0 = flipped to back) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) flip = !(le16_to_cpu(hdr->gpio) & (1 << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* it's a switch, needs software debounce */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (sd->flip_status != flip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) sd->flip_debounce++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) sd->flip_debounce = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /* check sequence number (not present in new frame packets) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (!(hdr->flags & STK1135_HDR_FRAME_START)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) seq = hdr->seq & STK1135_HDR_SEQ_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (seq != sd->pkt_seq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) gspca_dbg(gspca_dev, D_PACK, "received out-of-sequence packet\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) /* resync sequence and discard packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) sd->pkt_seq = seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) gspca_dev->last_packet_type = DISCARD_PACKET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) sd->pkt_seq++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (sd->pkt_seq > STK1135_HDR_SEQ_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) sd->pkt_seq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) if (len == sizeof(struct stk1135_pkt_header))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (hdr->flags & STK1135_HDR_FRAME_START) { /* new frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) skip = 8; /* the header is longer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) gspca_frame_add(gspca_dev, LAST_PACKET, data, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) pkt_type = FIRST_PACKET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) gspca_frame_add(gspca_dev, pkt_type, data + skip, len - skip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) static void sethflip(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (sd->flip_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) val = !val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) sensor_write_mask(gspca_dev, 0x020, val ? 0x0002 : 0x0000 , 0x0002);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static void setvflip(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (sd->flip_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) val = !val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) sensor_write_mask(gspca_dev, 0x020, val ? 0x0001 : 0x0000 , 0x0001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static void stk1135_dq_callback(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (sd->flip_debounce > 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) sd->flip_status = !sd->flip_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) sethflip(gspca_dev, v4l2_ctrl_g_ctrl(sd->hflip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) setvflip(gspca_dev, v4l2_ctrl_g_ctrl(sd->vflip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) struct gspca_dev *gspca_dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) gspca_dev->usb_err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (!gspca_dev->streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) case V4L2_CID_HFLIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) sethflip(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) case V4L2_CID_VFLIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) setvflip(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return gspca_dev->usb_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) static const struct v4l2_ctrl_ops sd_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .s_ctrl = sd_s_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) static int sd_init_controls(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) gspca_dev->vdev.ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) v4l2_ctrl_handler_init(hdl, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) V4L2_CID_HFLIP, 0, 1, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) V4L2_CID_VFLIP, 0, 1, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) if (hdl->error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) pr_err("Could not initialize controls\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static void stk1135_try_fmt(struct gspca_dev *gspca_dev, struct v4l2_format *fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) fmt->fmt.pix.width = clamp(fmt->fmt.pix.width, 32U, 1280U);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) fmt->fmt.pix.height = clamp(fmt->fmt.pix.height, 32U, 1024U);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* round up to even numbers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) fmt->fmt.pix.width += (fmt->fmt.pix.width & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) fmt->fmt.pix.height += (fmt->fmt.pix.height & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) fmt->fmt.pix.bytesperline = fmt->fmt.pix.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) fmt->fmt.pix.sizeimage = fmt->fmt.pix.width * fmt->fmt.pix.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static int stk1135_enum_framesizes(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) struct v4l2_frmsizeenum *fsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (fsize->index != 0 || fsize->pixel_format != V4L2_PIX_FMT_SBGGR8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) fsize->stepwise.min_width = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) fsize->stepwise.min_height = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) fsize->stepwise.max_width = 1280;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) fsize->stepwise.max_height = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) fsize->stepwise.step_width = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) fsize->stepwise.step_height = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) /* sub-driver description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) static const struct sd_desc sd_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .name = MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) .config = sd_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) .init = sd_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .init_controls = sd_init_controls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .start = sd_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .stopN = sd_stopN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .pkt_scan = sd_pkt_scan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) .dq_callback = stk1135_dq_callback,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .try_fmt = stk1135_try_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .enum_framesizes = stk1135_enum_framesizes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) /* -- module initialisation -- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) static const struct usb_device_id device_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {USB_DEVICE(0x174f, 0x6a31)}, /* ASUS laptop, MT9M112 sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) MODULE_DEVICE_TABLE(usb, device_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) /* -- device connect -- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static int sd_probe(struct usb_interface *intf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static struct usb_driver sd_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) .name = MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) .id_table = device_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .probe = sd_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) .disconnect = gspca_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .suspend = gspca_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .resume = gspca_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) .reset_resume = gspca_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) module_usb_driver(sd_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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