^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SPCA505 chip based cameras initialization data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * V4L2 by Jean-Francis Moine <http://moinejf.free.fr>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define MODULE_NAME "spca505"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "gspca.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) MODULE_DESCRIPTION("GSPCA/SPCA505 USB Camera Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* specific webcam descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct sd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct gspca_dev gspca_dev; /* !! must be the first item */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u8 subtype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define IntelPCCameraPro 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define Nxultra 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static const struct v4l2_pix_format vga_mode[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {160, 120, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .bytesperline = 160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .sizeimage = 160 * 120 * 3 / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .colorspace = V4L2_COLORSPACE_SRGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .priv = 4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {176, 144, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .bytesperline = 176,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .sizeimage = 176 * 144 * 3 / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .colorspace = V4L2_COLORSPACE_SRGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .priv = 3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {320, 240, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .bytesperline = 320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .sizeimage = 320 * 240 * 3 / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .colorspace = V4L2_COLORSPACE_SRGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .priv = 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {352, 288, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .bytesperline = 352,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .sizeimage = 352 * 288 * 3 / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .colorspace = V4L2_COLORSPACE_SRGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .priv = 1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {640, 480, V4L2_PIX_FMT_SPCA505, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .bytesperline = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .sizeimage = 640 * 480 * 3 / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .colorspace = V4L2_COLORSPACE_SRGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .priv = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define SPCA50X_OFFSET_DATA 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define SPCA50X_REG_USB 0x02 /* spca505 501 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define SPCA50X_USB_CTRL 0x00 /* spca505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define SPCA50X_CUSB_ENABLE 0x01 /* spca505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define SPCA50X_REG_GLOBAL 0x03 /* spca505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define SPCA50X_GMISC0_IDSEL 0x01 /* Global control device ID select spca505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define SPCA50X_GLOBAL_MISC0 0x00 /* Global control miscellaneous 0 spca505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define SPCA50X_GLOBAL_MISC1 0x01 /* 505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define SPCA50X_GLOBAL_MISC3 0x03 /* 505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define SPCA50X_GMISC3_SAA7113RST 0x20 /* Not sure about this one spca505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* Image format and compression control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define SPCA50X_REG_COMPRESS 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * Data to initialize a SPCA505. Common to the CCD and external modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static const u8 spca505_init_data[][3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* bmRequest,value,index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {SPCA50X_REG_GLOBAL, SPCA50X_GMISC3_SAA7113RST, SPCA50X_GLOBAL_MISC3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* Sensor reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {SPCA50X_REG_GLOBAL, 0x00, SPCA50X_GLOBAL_MISC3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {SPCA50X_REG_GLOBAL, 0x00, SPCA50X_GLOBAL_MISC1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* Block USB reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {SPCA50X_REG_GLOBAL, SPCA50X_GMISC0_IDSEL, SPCA50X_GLOBAL_MISC0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {0x05, 0x01, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* Maybe power down some stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {0x05, 0x0f, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Setup internal CCD ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {0x06, 0x10, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {0x06, 0x00, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {0x06, 0x00, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {0x06, 0x00, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {0x06, 0x10, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {0x06, 0x00, 0x0d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {0x06, 0x00, 0x0e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {0x06, 0x00, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {0x06, 0x10, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {0x06, 0x02, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {0x06, 0x00, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {0x06, 0x04, 0x13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {0x06, 0x02, 0x14},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {0x06, 0x8a, 0x51},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {0x06, 0x40, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {0x06, 0xb6, 0x53},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {0x06, 0x3d, 0x54},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Data to initialize the camera using the internal CCD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static const u8 spca505_open_data_ccd[][3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* bmRequest,value,index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* Internal CCD data set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {0x03, 0x04, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* This could be a reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {0x03, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* Setup compression and image registers. 0x6 and 0x7 seem to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) related to H&V hold, and are resolution mode specific */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {0x04, 0x10, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* DIFF(0x50), was (0x10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {0x04, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {0x04, 0x00, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {0x04, 0x20, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {0x04, 0x20, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {0x08, 0x0a, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* DIFF (0x4a), was (0xa) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {0x05, 0x00, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {0x05, 0x00, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {0x05, 0x00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {0x05, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {0x05, 0x00, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {0x05, 0x00, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {0x05, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {0x05, 0x80, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {0x05, 0xe0, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {0x05, 0x20, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {0x05, 0xa0, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {0x05, 0x0, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {0x05, 0x02, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {0x05, 0x10, 0x46},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {0x05, 0x8, 0x4a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {0x03, 0x08, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* DIFF (0x3,0x28,0x3) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {0x03, 0x08, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {0x03, 0x0c, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* DIFF not written */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {0x03, 0x21, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* DIFF (0x39) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* Extra block copied from init to hopefully ensure CCD is in a sane state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {0x06, 0x10, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {0x06, 0x00, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {0x06, 0x00, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {0x06, 0x00, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {0x06, 0x10, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {0x06, 0x00, 0x0d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {0x06, 0x00, 0x0e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {0x06, 0x00, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {0x06, 0x10, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {0x06, 0x02, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {0x06, 0x00, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {0x06, 0x04, 0x13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {0x06, 0x02, 0x14},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {0x06, 0x8a, 0x51},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {0x06, 0x40, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {0x06, 0xb6, 0x53},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {0x06, 0x3d, 0x54},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* End of extra block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {0x06, 0x3f, 0x1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* Block skipped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {0x06, 0x10, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {0x06, 0x64, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {0x06, 0x10, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {0x06, 0x00, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {0x06, 0x00, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {0x06, 0x00, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {0x06, 0x10, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {0x06, 0x00, 0x0d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {0x06, 0x00, 0x0e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {0x06, 0x00, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {0x06, 0x10, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {0x06, 0x02, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {0x06, 0x00, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {0x06, 0x04, 0x13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {0x06, 0x02, 0x14},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {0x06, 0x8a, 0x51},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {0x06, 0x40, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {0x06, 0xb6, 0x53},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {0x06, 0x3d, 0x54},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {0x06, 0x60, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {0x06, 0x20, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {0x06, 0x15, 0x59},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {0x06, 0x05, 0x5a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {0x05, 0x01, 0xc0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {0x05, 0x10, 0xcb},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {0x05, 0x80, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {0x05, 0x0, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /* 4 was 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {0x05, 0x80, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {0x05, 0x04, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {0x05, 0x0, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {0x05, 0x00, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {0x05, 0x40, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {0x05, 0x17, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {0x05, 0x80, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {0x05, 0x06, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {0x05, 0x80, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {0x05, 0x04, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {0x03, 0x4c, 0x3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {0x03, 0x18, 0x1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {0x06, 0x70, 0x51},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {0x06, 0xbe, 0x53},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {0x06, 0x71, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {0x06, 0x20, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {0x06, 0x05, 0x59},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {0x06, 0x15, 0x5a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {0x04, 0x00, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* Compress = OFF (0x1 to turn on) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {0x04, 0x12, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {0x04, 0x21, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {0x04, 0x10, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {0x04, 0x21, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {0x04, 0x05, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* was 5 (Image Type ? ) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {0x04, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {0x06, 0x3f, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {0x04, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {0x04, 0x00, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {0x04, 0x40, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {0x04, 0x40, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {0x06, 0x1c, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {0x06, 0xe2, 0x19},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {0x06, 0x1c, 0x1b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {0x06, 0xe2, 0x1d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {0x06, 0xaa, 0x1f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {0x06, 0x70, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {0x05, 0x01, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {0x05, 0x00, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {0x05, 0x01, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {0x05, 0x05, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {0x05, 0x00, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {0x05, 0x00, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {0x06, 0x70, 0x51},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {0x06, 0xbe, 0x53},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * Made by Tomasz Zablocki (skalamandra@poczta.onet.pl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * SPCA505b chip based cameras initialization data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /* jfm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define initial_brightness 0x7f /* 0x0(white)-0xff(black) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* #define initial_brightness 0x0 //0x0(white)-0xff(black) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * Data to initialize a SPCA505. Common to the CCD and external modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static const u8 spca505b_init_data[][3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {0x02, 0x00, 0x00}, /* init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {0x02, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {0x02, 0x00, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {0x02, 0x00, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {0x02, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {0x02, 0x00, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {0x02, 0x00, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {0x02, 0x00, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {0x02, 0x00, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {0x02, 0x00, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {0x03, 0x00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {0x03, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {0x03, 0x00, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {0x03, 0x00, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {0x03, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {0x03, 0x00, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {0x03, 0x00, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {0x04, 0x00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {0x04, 0x00, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {0x04, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {0x04, 0x00, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {0x04, 0x00, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {0x04, 0x00, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {0x04, 0x00, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {0x04, 0x00, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {0x04, 0x00, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {0x04, 0x00, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {0x04, 0x00, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {0x07, 0x00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {0x07, 0x00, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {0x08, 0x00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {0x08, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {0x08, 0x00, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {0x06, 0x18, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {0x06, 0xfc, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {0x06, 0xfc, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {0x06, 0xfc, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {0x06, 0x18, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {0x06, 0xfc, 0x0d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {0x06, 0xfc, 0x0e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {0x06, 0xfc, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {0x06, 0x18, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {0x06, 0xfe, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {0x06, 0x00, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {0x06, 0x00, 0x14},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {0x06, 0x00, 0x13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {0x06, 0x28, 0x51},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {0x06, 0xff, 0x53},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {0x02, 0x00, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {0x03, 0x00, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {0x03, 0x10, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * Data to initialize the camera using the internal CCD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static const u8 spca505b_open_data_ccd[][3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* {0x02,0x00,0x00}, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {0x03, 0x04, 0x01}, /* rst */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {0x03, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {0x03, 0x00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) {0x03, 0x21, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {0x03, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {0x03, 0x00, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {0x03, 0x18, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {0x03, 0x08, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {0x03, 0x1c, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {0x03, 0x5c, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {0x03, 0x5c, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) {0x03, 0x18, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /* same as 505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {0x04, 0x10, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {0x04, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {0x04, 0x00, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) {0x04, 0x20, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {0x04, 0x20, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {0x08, 0x0a, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {0x05, 0x00, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) {0x05, 0x00, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {0x05, 0x00, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) {0x05, 0x6f, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) {0x05, initial_brightness >> 6, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {0x05, (initial_brightness << 2) & 0xff, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) {0x05, 0x00, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {0x05, 0x01, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {0x05, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {0x05, 0x03, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {0x05, 0xe0, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {0x05, 0x20, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {0x05, 0xa0, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {0x05, 0x00, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {0x05, 0x02, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {0x05, 0x80, 0x14}, /* max exposure off (0=on) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {0x05, 0x01, 0xb0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {0x05, 0x01, 0xbf},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {0x03, 0x02, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) {0x05, 0x10, 0x46},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {0x05, 0x08, 0x4a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {0x06, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {0x06, 0x10, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) {0x06, 0x64, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {0x06, 0x18, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {0x06, 0xfc, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {0x06, 0xfc, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) {0x06, 0xfc, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {0x04, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {0x06, 0x18, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {0x06, 0xfc, 0x0d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {0x06, 0xfc, 0x0e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) {0x06, 0xfc, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) {0x06, 0x11, 0x10}, /* contrast */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {0x06, 0x00, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {0x06, 0xfe, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {0x06, 0x00, 0x13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {0x06, 0x00, 0x14},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {0x06, 0x9d, 0x51},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {0x06, 0x40, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {0x06, 0x7c, 0x53},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {0x06, 0x40, 0x54},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {0x06, 0x02, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {0x06, 0x03, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {0x06, 0x15, 0x59},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) {0x06, 0x05, 0x5a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) {0x06, 0x03, 0x56},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) {0x06, 0x02, 0x3f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {0x06, 0x00, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) {0x06, 0x39, 0x41},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {0x06, 0x69, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {0x06, 0x87, 0x43},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {0x06, 0x9e, 0x44},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {0x06, 0xb1, 0x45},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {0x06, 0xbf, 0x46},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {0x06, 0xcc, 0x47},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {0x06, 0xd5, 0x48},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {0x06, 0xdd, 0x49},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) {0x06, 0xe3, 0x4a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) {0x06, 0xe8, 0x4b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {0x06, 0xed, 0x4c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {0x06, 0xf2, 0x4d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {0x06, 0xf7, 0x4e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {0x06, 0xfc, 0x4f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) {0x06, 0xff, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) {0x05, 0x01, 0xc0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {0x05, 0x10, 0xcb},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {0x05, 0x40, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {0x05, 0x04, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) {0x05, 0x40, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {0x05, 0x09, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {0x05, 0xc0, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) {0x05, 0x09, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {0x05, 0x40, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {0x05, 0x59, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) {0x04, 0x00, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) {0x05, 0x80, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {0x05, 0xec, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) {0x05, 0x0, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {0x06, 0x02, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {0x06, 0x01, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {0x06, 0x15, 0x59},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {0x06, 0x0a, 0x5a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {0x06, 0x01, 0x57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) {0x06, 0x8a, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) {0x06, 0x0a, 0x6c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {0x06, 0x30, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {0x06, 0x20, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {0x06, 0x00, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) {0x05, 0x8c, 0x25},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {0x06, 0x4d, 0x51}, /* maybe saturation (4d) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) {0x06, 0x84, 0x53}, /* making green (84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {0x06, 0x00, 0x57}, /* sharpness (1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) {0x06, 0x18, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {0x06, 0xfc, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {0x06, 0xfc, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) {0x06, 0xfc, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) {0x06, 0x18, 0x0c}, /* maybe hue (18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {0x06, 0xfc, 0x0d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {0x06, 0xfc, 0x0e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {0x06, 0xfc, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {0x06, 0x18, 0x10}, /* maybe contrast (18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {0x05, 0x01, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {0x04, 0x00, 0x08}, /* compression */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) {0x04, 0x12, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {0x04, 0x21, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {0x04, 0x10, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {0x04, 0x21, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) {0x04, 0x1d, 0x00}, /* imagetype (1d) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) {0x04, 0x41, 0x01}, /* hardware snapcontrol */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {0x04, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) {0x04, 0x00, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) {0x04, 0x10, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) {0x04, 0x10, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {0x04, 0x40, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {0x04, 0x40, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {0x04, 0x00, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {0x04, 0x00, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) {0x06, 0x1c, 0x17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) {0x06, 0xe2, 0x19},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {0x06, 0x1c, 0x1b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) {0x06, 0xe2, 0x1d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {0x06, 0x5f, 0x1f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) {0x06, 0x32, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {0x05, initial_brightness >> 6, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {0x05, (initial_brightness << 2) & 0xff, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {0x05, 0x06, 0xc1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) {0x05, 0x58, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) {0x05, 0x00, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {0x05, 0x00, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) static int reg_write(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) u16 req, u16 index, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct usb_device *dev = gspca_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) ret = usb_control_msg(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) usb_sndctrlpipe(dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) USB_TYPE_VENDOR | USB_RECIP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) value, index, NULL, 0, 500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) gspca_dbg(gspca_dev, D_USBO, "reg write: 0x%02x,0x%02x:0x%02x, %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) req, index, value, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) pr_err("reg write: error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /* returns: negative is error, pos or zero is data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static int reg_read(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) u16 req, /* bRequest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) u16 index) /* wIndex */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) ret = usb_control_msg(gspca_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) usb_rcvctrlpipe(gspca_dev->dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 0, /* value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) gspca_dev->usb_buf, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 500); /* timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) return (gspca_dev->usb_buf[1] << 8) + gspca_dev->usb_buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static int write_vector(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) const u8 data[][3])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) int ret, i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) while (data[i][0] != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) ret = reg_write(gspca_dev, data[i][0], data[i][2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) data[i][1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) /* this function is called at probe time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) static int sd_config(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) struct cam *cam;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) cam = &gspca_dev->cam;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) cam->cam_mode = vga_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) sd->subtype = id->driver_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (sd->subtype != IntelPCCameraPro)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) cam->nmodes = ARRAY_SIZE(vga_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) else /* no 640x480 for IntelPCCameraPro */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) cam->nmodes = ARRAY_SIZE(vga_mode) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) /* this function is called at probe and resume time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static int sd_init(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (write_vector(gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) sd->subtype == Nxultra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ? spca505b_init_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) : spca505_init_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static void setbrightness(struct gspca_dev *gspca_dev, s32 brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) reg_write(gspca_dev, 0x05, 0x00, (255 - brightness) >> 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) reg_write(gspca_dev, 0x05, 0x01, (255 - brightness) << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) static int sd_start(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) int ret, mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static u8 mode_tb[][3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /* r00 r06 r07 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) {0x00, 0x10, 0x10}, /* 640x480 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) {0x01, 0x1a, 0x1a}, /* 352x288 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) {0x02, 0x1c, 0x1d}, /* 320x240 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) {0x04, 0x34, 0x34}, /* 176x144 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) {0x05, 0x40, 0x40} /* 160x120 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (sd->subtype == Nxultra)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) write_vector(gspca_dev, spca505b_open_data_ccd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) write_vector(gspca_dev, spca505_open_data_ccd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) ret = reg_read(gspca_dev, 0x06, 0x16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) gspca_err(gspca_dev, "register read failed err: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) if (ret != 0x0101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) pr_err("After vector read returns 0x%04x should be 0x0101\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) ret = reg_write(gspca_dev, 0x06, 0x16, 0x0a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) reg_write(gspca_dev, 0x05, 0xc2, 0x12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) /* necessary because without it we can see stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) * only once after loading module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /* stopping usb registers Tomasz change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) reg_write(gspca_dev, 0x02, 0x00, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) mode = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) reg_write(gspca_dev, SPCA50X_REG_COMPRESS, 0x00, mode_tb[mode][0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) reg_write(gspca_dev, SPCA50X_REG_COMPRESS, 0x06, mode_tb[mode][1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) reg_write(gspca_dev, SPCA50X_REG_COMPRESS, 0x07, mode_tb[mode][2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) return reg_write(gspca_dev, SPCA50X_REG_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) SPCA50X_USB_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) SPCA50X_CUSB_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) static void sd_stopN(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) /* Disable ISO packet machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) reg_write(gspca_dev, 0x02, 0x00, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) /* called on streamoff with alt 0 and on disconnect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static void sd_stop0(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) if (!gspca_dev->present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) /* This maybe reset or power control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) reg_write(gspca_dev, 0x03, 0x03, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) reg_write(gspca_dev, 0x03, 0x01, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) reg_write(gspca_dev, 0x03, 0x00, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) reg_write(gspca_dev, 0x05, 0x10, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) reg_write(gspca_dev, 0x05, 0x11, 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static void sd_pkt_scan(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) u8 *data, /* isoc packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) int len) /* iso packet length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) switch (data[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) case 0: /* start of frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) data += SPCA50X_OFFSET_DATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) len -= SPCA50X_OFFSET_DATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) gspca_frame_add(gspca_dev, FIRST_PACKET, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) case 0xff: /* drop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) data += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) len -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) struct gspca_dev *gspca_dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) gspca_dev->usb_err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) if (!gspca_dev->streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) case V4L2_CID_BRIGHTNESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) setbrightness(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) return gspca_dev->usb_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) static const struct v4l2_ctrl_ops sd_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) .s_ctrl = sd_s_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) static int sd_init_controls(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) gspca_dev->vdev.ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) v4l2_ctrl_handler_init(hdl, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) V4L2_CID_BRIGHTNESS, 0, 255, 1, 127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if (hdl->error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) pr_err("Could not initialize controls\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) return hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) /* sub-driver description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static const struct sd_desc sd_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) .name = MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .config = sd_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) .init_controls = sd_init_controls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) .init = sd_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .start = sd_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .stopN = sd_stopN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .stop0 = sd_stop0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .pkt_scan = sd_pkt_scan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) /* -- module initialisation -- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) static const struct usb_device_id device_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) {USB_DEVICE(0x041e, 0x401d), .driver_info = Nxultra},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) {USB_DEVICE(0x0733, 0x0430), .driver_info = IntelPCCameraPro},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) /*fixme: may be UsbGrabberPV321 BRIDGE_SPCA506 SENSOR_SAA7113 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) MODULE_DEVICE_TABLE(usb, device_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) /* -- device connect -- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) static int sd_probe(struct usb_interface *intf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) static struct usb_driver sd_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .name = MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .id_table = device_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) .probe = sd_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) .disconnect = gspca_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) .suspend = gspca_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) .resume = gspca_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) .reset_resume = gspca_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) module_usb_driver(sd_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags