^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ov534-ov7xxx gspca driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 Antonio Ospite <ospite@studenti.unina.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2008 Jim Paris <jim@jtan.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2009 Jean-Francois Moine http://moinejf.free.fr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Based on a prototype written by Mark Ferrell <majortrips@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * USB protocol reverse engineered by Jim Paris <jim@jtan.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * https://jim.sh/svn/jim/devl/playstation/ps3/eye/test/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * PS3 Eye camera enhanced by Richard Kaswy http://kaswy.free.fr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * PS3 Eye camera - brightness, contrast, awb, agc, aec controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * added by Max Thrun <bear24rw@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * PS3 Eye camera - FPS range extended by Joseph Howse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * <josephhowse@nummist.com> https://nummist.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MODULE_NAME "ov534"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "gspca.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/fixp-arith.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define OV534_REG_ADDRESS 0xf1 /* sensor address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define OV534_REG_SUBADDR 0xf2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define OV534_REG_WRITE 0xf3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define OV534_REG_READ 0xf4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define OV534_REG_OPERATION 0xf5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define OV534_REG_STATUS 0xf6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define OV534_OP_WRITE_3 0x37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define OV534_OP_WRITE_2 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define OV534_OP_READ_2 0xf9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define CTRL_TIMEOUT 500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define DEFAULT_FRAME_RATE 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MODULE_AUTHOR("Antonio Ospite <ospite@studenti.unina.it>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MODULE_DESCRIPTION("GSPCA/OV534 USB Camera Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* specific webcam descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct sd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct gspca_dev gspca_dev; /* !! must be the first item */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct v4l2_ctrl_handler ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct v4l2_ctrl *hue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct v4l2_ctrl *saturation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct v4l2_ctrl *brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct v4l2_ctrl *contrast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct { /* gain control cluster */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct v4l2_ctrl *autogain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct v4l2_ctrl *gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct v4l2_ctrl *autowhitebalance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct { /* exposure control cluster */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct v4l2_ctrl *autoexposure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct v4l2_ctrl *exposure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct v4l2_ctrl *sharpness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct v4l2_ctrl *hflip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct v4l2_ctrl *vflip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct v4l2_ctrl *plfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) __u32 last_pts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u16 last_fid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u8 frame_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u8 sensor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) enum sensors {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) SENSOR_OV767x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) SENSOR_OV772x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) NSENSORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int sd_start(struct gspca_dev *gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void sd_stopN(struct gspca_dev *gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static const struct v4l2_pix_format ov772x_mode[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {320, 240, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .bytesperline = 320 * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .sizeimage = 320 * 240 * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .colorspace = V4L2_COLORSPACE_SRGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .priv = 1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {640, 480, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .bytesperline = 640 * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .sizeimage = 640 * 480 * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .colorspace = V4L2_COLORSPACE_SRGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .priv = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {320, 240, V4L2_PIX_FMT_SGRBG8, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .bytesperline = 320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .sizeimage = 320 * 240,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .colorspace = V4L2_COLORSPACE_SRGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .priv = 1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {640, 480, V4L2_PIX_FMT_SGRBG8, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .bytesperline = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .sizeimage = 640 * 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .colorspace = V4L2_COLORSPACE_SRGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .priv = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static const struct v4l2_pix_format ov767x_mode[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .bytesperline = 320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .sizeimage = 320 * 240 * 3 / 8 + 590,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .colorspace = V4L2_COLORSPACE_JPEG},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .bytesperline = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .sizeimage = 640 * 480 * 3 / 8 + 590,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .colorspace = V4L2_COLORSPACE_JPEG},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static const u8 qvga_rates[] = {187, 150, 137, 125, 100, 75, 60, 50, 37, 30};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const u8 vga_rates[] = {60, 50, 40, 30, 15};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static const struct framerates ov772x_framerates[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { /* 320x240 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .rates = qvga_rates,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .nrates = ARRAY_SIZE(qvga_rates),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { /* 640x480 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .rates = vga_rates,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .nrates = ARRAY_SIZE(vga_rates),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { /* 320x240 SGBRG8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .rates = qvga_rates,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .nrates = ARRAY_SIZE(qvga_rates),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) { /* 640x480 SGBRG8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .rates = vga_rates,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .nrates = ARRAY_SIZE(vga_rates),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct reg_array {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) const u8 (*val)[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const u8 bridge_init_767x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* comments from the ms-win file apollo7670.set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* str1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {0xf1, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {0x88, 0xf8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {0x89, 0xff},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {0x76, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {0x92, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {0x95, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {0xe2, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {0xe7, 0x3e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {0x8d, 0x1c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {0x8e, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {0x8f, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {0x1f, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {0xc3, 0xf9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {0x89, 0xff},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {0x88, 0xf8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {0x76, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {0x92, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {0x93, 0x18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {0x1c, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {0x1d, 0x48},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {0x1d, 0xff},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {0x1d, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {0x1d, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {0x1c, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {0x1d, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {0x1d, 0x0e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {0xc0, 0x50}, /* HSize 640 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {0xc1, 0x3c}, /* VSize 480 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {0x34, 0x05}, /* enable Audio Suspend mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {0xc2, 0x0c}, /* Input YUV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {0xc3, 0xf9}, /* enable PRE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {0x34, 0x05}, /* enable Audio Suspend mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {0xe7, 0x2e}, /* this solves failure of "SuspendResumeTest" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {0x31, 0xf9}, /* enable 1.8V Suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {0x35, 0x02}, /* turn on JPEG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {0xd9, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {0x25, 0x42}, /* GPIO[8]:Input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {0x94, 0x11}, /* If the default setting is loaded when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * system boots up, this flag is closed here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static const u8 sensor_init_767x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {0x12, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {0x11, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {0x3a, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {0x12, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {0x17, 0x13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {0x18, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {0x32, 0xb6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {0x19, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {0x1a, 0x7a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {0x03, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {0x0c, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {0x3e, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {0x70, 0x3a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {0x71, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {0x72, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {0x73, 0xf0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {0xa2, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {0x7a, 0x2a}, /* set Gamma=1.6 below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {0x7b, 0x12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {0x7c, 0x1d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {0x7d, 0x2d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {0x7e, 0x45},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {0x7f, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {0x80, 0x59},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {0x81, 0x62},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {0x82, 0x6b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {0x83, 0x73},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {0x84, 0x7b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {0x85, 0x8a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {0x86, 0x98},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {0x87, 0xb2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {0x88, 0xca},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {0x89, 0xe0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {0x13, 0xe0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {0x00, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {0x10, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {0x0d, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {0x14, 0x38}, /* gain max 16x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {0xa5, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {0xab, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {0x24, 0x95},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {0x25, 0x33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {0x26, 0xe3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {0x9f, 0x78},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {0xa0, 0x68},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {0xa1, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {0xa6, 0xd8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {0xa7, 0xd8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {0xa8, 0xf0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {0xa9, 0x90},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {0xaa, 0x94},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {0x13, 0xe5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {0x0e, 0x61},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {0x0f, 0x4b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {0x16, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {0x21, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {0x22, 0x91},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {0x29, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {0x33, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {0x35, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {0x37, 0x1d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {0x38, 0x71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {0x39, 0x2a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {0x3c, 0x78},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {0x4d, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {0x4e, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {0x69, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {0x6b, 0x4a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {0x74, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {0x8d, 0x4f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {0x8e, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {0x8f, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {0x90, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {0x91, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {0x96, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {0x9a, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {0xb0, 0x84},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {0xb1, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {0xb2, 0x0e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {0xb3, 0x82},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {0xb8, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {0x43, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {0x44, 0xf0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {0x45, 0x34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {0x46, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {0x47, 0x28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {0x48, 0x3a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {0x59, 0x88},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {0x5a, 0x88},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {0x5b, 0x44},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {0x5c, 0x67},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {0x5d, 0x49},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {0x5e, 0x0e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {0x6c, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {0x6d, 0x55},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {0x6e, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {0x6f, 0x9f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {0x6a, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {0x01, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {0x02, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {0x13, 0xe7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {0x4f, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {0x50, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {0x51, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {0x52, 0x22},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {0x53, 0x5e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {0x54, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {0x58, 0x9e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {0x41, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {0x3f, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {0x75, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {0x76, 0xe1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {0x4c, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {0x77, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {0x3d, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {0x4b, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {0xc9, 0x60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {0x41, 0x38}, /* jfm: auto sharpness + auto de-noise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {0x56, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {0x34, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {0x3b, 0xc2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {0xa4, 0x8a}, /* Night mode trigger point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {0x96, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {0x97, 0x30},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {0x98, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {0x99, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {0x9a, 0x84},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {0x9b, 0x29},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {0x9c, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {0x9d, 0x4c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {0x9e, 0x3f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {0x78, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {0x79, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {0xc8, 0xf0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {0x79, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {0xc8, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {0x79, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {0xc8, 0x7e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {0x79, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {0xc8, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {0x79, 0x0b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {0xc8, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {0x79, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {0xc8, 0x0f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {0x79, 0x0d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {0xc8, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {0x79, 0x09},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {0xc8, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {0x79, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {0xc8, 0xc0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {0x79, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {0xc8, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {0x79, 0x26},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static const u8 bridge_start_vga_767x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* str59 JPG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {0x94, 0xaa},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {0xf1, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {0xe5, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {0xc0, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {0xc1, 0x3c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {0xc2, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {0x35, 0x02}, /* turn on JPEG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {0xd9, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {0xda, 0x00}, /* for higher clock rate(30fps) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {0x34, 0x05}, /* enable Audio Suspend mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {0xc3, 0xf9}, /* enable PRE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {0x8c, 0x00}, /* CIF VSize LSB[2:0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {0x8d, 0x1c}, /* output YUV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /* {0x34, 0x05}, * enable Audio Suspend mode (?) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {0x50, 0x00}, /* H/V divider=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) {0x51, 0xa0}, /* input H=640/4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {0x52, 0x3c}, /* input V=480/4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {0x53, 0x00}, /* offset X=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {0x54, 0x00}, /* offset Y=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) {0x55, 0x00}, /* H/V size[8]=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {0x57, 0x00}, /* H-size[9]=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {0x5c, 0x00}, /* output size[9:8]=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {0x5a, 0xa0}, /* output H=640/4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {0x5b, 0x78}, /* output V=480/4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {0x1c, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {0x1d, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {0x94, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static const u8 sensor_start_vga_767x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {0x11, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {0x1e, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {0x19, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {0x1a, 0x7a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static const u8 bridge_start_qvga_767x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /* str86 JPG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {0x94, 0xaa},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) {0xf1, 0x42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {0xe5, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) {0xc0, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {0xc1, 0x60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) {0xc2, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) {0x35, 0x02}, /* turn on JPEG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {0xd9, 0x10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) {0xc0, 0x50}, /* CIF HSize 640 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {0xc1, 0x3c}, /* CIF VSize 480 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {0x8c, 0x00}, /* CIF VSize LSB[2:0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {0x8d, 0x1c}, /* output YUV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {0x34, 0x05}, /* enable Audio Suspend mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {0xc2, 0x4c}, /* output YUV and Enable DCW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {0xc3, 0xf9}, /* enable PRE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {0x1c, 0x00}, /* indirect addressing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {0x1d, 0x48}, /* output YUV422 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {0x50, 0x89}, /* H/V divider=/2; plus DCW AVG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {0x51, 0xa0}, /* DCW input H=640/4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {0x52, 0x78}, /* DCW input V=480/4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {0x53, 0x00}, /* offset X=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) {0x54, 0x00}, /* offset Y=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {0x55, 0x00}, /* H/V size[8]=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {0x57, 0x00}, /* H-size[9]=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {0x5c, 0x00}, /* DCW output size[9:8]=0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {0x5a, 0x50}, /* DCW output H=320/4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) {0x5b, 0x3c}, /* DCW output V=240/4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {0x1c, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {0x1d, 0x0a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {0x94, 0x11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static const u8 sensor_start_qvga_767x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {0x11, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {0x1e, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {0x19, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) {0x1a, 0x7a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static const u8 bridge_init_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) { 0x88, 0xf8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) { 0x89, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) { 0x76, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) { 0x92, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) { 0x93, 0x18 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) { 0x94, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) { 0x95, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) { 0xe2, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) { 0xe7, 0x3e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) { 0x96, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) { 0x97, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) { 0x97, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) { 0x97, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) { 0x97, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) { 0x97, 0x3f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) { 0x97, 0x4a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) { 0x97, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) { 0x97, 0x15 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) { 0x97, 0x0b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) { 0x8e, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) { 0x1f, 0x81 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) { 0x34, 0x05 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) { 0xe3, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) { 0x89, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) { 0x76, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) { 0xe7, 0x2e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) { 0x31, 0xf9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) { 0x25, 0x42 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) { 0x21, 0xf0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) { 0x1c, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) { 0x1d, 0x08 }, /* turn on UVC header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) { 0x1d, 0x0e }, /* .. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static const u8 sensor_init_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) { 0x12, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /*fixme: better have a delay?*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) { 0x3d, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) { 0x17, 0x26 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) { 0x18, 0xa0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) { 0x19, 0x07 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) { 0x1a, 0xf0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) { 0x32, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) { 0x29, 0xa0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) { 0x2c, 0xf0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) { 0x65, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) { 0x42, 0x7f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) { 0x63, 0xaa }, /* AWB - was e0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) { 0x64, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) { 0x66, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) { 0x13, 0xf0 }, /* com8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) { 0x0d, 0x41 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) { 0x0f, 0xc5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) { 0x14, 0x11 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) { 0x22, 0x7f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) { 0x23, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) { 0x24, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) { 0x25, 0x30 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) { 0x26, 0xa1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) { 0x2a, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) { 0x2b, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) { 0x6b, 0xaa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) { 0x13, 0xff }, /* AWB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) { 0x90, 0x05 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) { 0x91, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) { 0x92, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) { 0x93, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) { 0x94, 0x60 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) { 0x95, 0x3c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) { 0x96, 0x24 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) { 0x97, 0x1e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) { 0x98, 0x62 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) { 0x99, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) { 0x9a, 0x1e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) { 0x9b, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) { 0x9c, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) { 0x9e, 0x81 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) { 0xa6, 0x07 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) { 0x7e, 0x0c },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) { 0x7f, 0x16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) { 0x80, 0x2a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) { 0x81, 0x4e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) { 0x82, 0x61 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) { 0x83, 0x6f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) { 0x84, 0x7b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) { 0x85, 0x86 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) { 0x86, 0x8e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) { 0x87, 0x97 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) { 0x88, 0xa4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) { 0x89, 0xaf },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) { 0x8a, 0xc5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) { 0x8b, 0xd7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) { 0x8c, 0xe8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) { 0x8d, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) { 0x2b, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) { 0x22, 0x7f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) { 0x23, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) { 0x11, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) { 0x64, 0xff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) { 0x0d, 0x41 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) { 0x14, 0x41 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) { 0x0e, 0xcd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) { 0xac, 0xbf },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) { 0x8e, 0x00 }, /* De-noise threshold */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static const u8 bridge_start_vga_yuyv_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {0x88, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {0x1c, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) {0x1d, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) {0x1d, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) {0x1d, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {0x1d, 0x58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) {0x8d, 0x1c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {0x8e, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) {0xc0, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) {0xc1, 0x3c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) {0xc2, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {0xc3, 0x69},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) static const u8 sensor_start_vga_yuyv_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) {0x12, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {0x17, 0x26},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {0x18, 0xa0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {0x19, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) {0x1a, 0xf0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) {0x29, 0xa0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) {0x2c, 0xf0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {0x65, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) {0x67, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) static const u8 bridge_start_qvga_yuyv_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {0x88, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) {0x1c, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) {0x1d, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {0x1d, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {0x1d, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) {0x1d, 0x4b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) {0x8d, 0x1c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {0x8e, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) {0xc0, 0x28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {0xc1, 0x1e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {0xc2, 0x0c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) {0xc3, 0x69},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static const u8 sensor_start_qvga_yuyv_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {0x12, 0x40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {0x17, 0x3f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {0x18, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) {0x19, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) {0x1a, 0x78},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) {0x29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {0x2c, 0x78},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) {0x65, 0x2f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) {0x67, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) static const u8 bridge_start_vga_gbrg_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) {0x88, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) {0x1c, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {0x1d, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) {0x1d, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) {0x1d, 0x2c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) {0x8d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) {0x8e, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) {0xc0, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) {0xc1, 0x3c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) {0xc2, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) {0xc3, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static const u8 sensor_start_vga_gbrg_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {0x12, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) {0x17, 0x26},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) {0x18, 0xa0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) {0x19, 0x07},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {0x1a, 0xf0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) {0x29, 0xa0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) {0x2c, 0xf0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) {0x65, 0x20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) {0x67, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) static const u8 bridge_start_qvga_gbrg_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) {0x88, 0x08},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) {0x1c, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) {0x1d, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) {0x1d, 0x4b},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {0x1d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {0x8d, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {0x8e, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {0xc0, 0x28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) {0xc1, 0x1e},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {0xc2, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) {0xc3, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static const u8 sensor_start_qvga_gbrg_772x[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) {0x12, 0x41},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {0x17, 0x3f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) {0x18, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) {0x19, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {0x1a, 0x78},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {0x29, 0x50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) {0x2c, 0x78},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {0x65, 0x2f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) {0x67, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) static void ov534_reg_write(struct gspca_dev *gspca_dev, u16 reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) struct usb_device *udev = gspca_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (gspca_dev->usb_err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) gspca_dbg(gspca_dev, D_USBO, "SET 01 0000 %04x %02x\n", reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) gspca_dev->usb_buf[0] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) ret = usb_control_msg(udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) usb_sndctrlpipe(udev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) pr_err("write failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) gspca_dev->usb_err = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static u8 ov534_reg_read(struct gspca_dev *gspca_dev, u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) struct usb_device *udev = gspca_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) if (gspca_dev->usb_err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) ret = usb_control_msg(udev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) usb_rcvctrlpipe(udev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) gspca_dbg(gspca_dev, D_USBI, "GET 01 0000 %04x %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) reg, gspca_dev->usb_buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) pr_err("read failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) gspca_dev->usb_err = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) * Make sure the result is zeroed to avoid uninitialized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) * values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) gspca_dev->usb_buf[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) return gspca_dev->usb_buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) /* Two bits control LED: 0x21 bit 7 and 0x23 bit 7.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) * (direction and output)? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static void ov534_set_led(struct gspca_dev *gspca_dev, int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) gspca_dbg(gspca_dev, D_CONF, "led status: %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) data = ov534_reg_read(gspca_dev, 0x21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) data |= 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) ov534_reg_write(gspca_dev, 0x21, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) data = ov534_reg_read(gspca_dev, 0x23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) data |= 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) data &= ~0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) ov534_reg_write(gspca_dev, 0x23, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) if (!status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) data = ov534_reg_read(gspca_dev, 0x21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) data &= ~0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) ov534_reg_write(gspca_dev, 0x21, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) static int sccb_check_status(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) for (i = 0; i < 5; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) usleep_range(10000, 20000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) data = ov534_reg_read(gspca_dev, OV534_REG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) switch (data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) case 0x00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) case 0x04:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) case 0x03:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) gspca_err(gspca_dev, "sccb status 0x%02x, attempt %d/5\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) data, i + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) static void sccb_reg_write(struct gspca_dev *gspca_dev, u8 reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) gspca_dbg(gspca_dev, D_USBO, "sccb write: %02x %02x\n", reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) ov534_reg_write(gspca_dev, OV534_REG_SUBADDR, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) ov534_reg_write(gspca_dev, OV534_REG_WRITE, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) if (!sccb_check_status(gspca_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) pr_err("sccb_reg_write failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) gspca_dev->usb_err = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) static u8 sccb_reg_read(struct gspca_dev *gspca_dev, u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) ov534_reg_write(gspca_dev, OV534_REG_SUBADDR, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (!sccb_check_status(gspca_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) pr_err("sccb_reg_read failed 1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_READ_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (!sccb_check_status(gspca_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) pr_err("sccb_reg_read failed 2\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) return ov534_reg_read(gspca_dev, OV534_REG_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) /* output a bridge sequence (reg - val) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static void reg_w_array(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) const u8 (*data)[2], int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) while (--len >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) ov534_reg_write(gspca_dev, (*data)[0], (*data)[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) data++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) /* output a sensor sequence (reg - val) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static void sccb_w_array(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) const u8 (*data)[2], int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) while (--len >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if ((*data)[0] != 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) sccb_reg_write(gspca_dev, (*data)[0], (*data)[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) sccb_reg_read(gspca_dev, (*data)[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) sccb_reg_write(gspca_dev, 0xff, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) data++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) /* ov772x specific controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) static void set_frame_rate(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) struct rate_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) u8 fps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) u8 r11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) u8 r0d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) u8 re5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) const struct rate_s *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) static const struct rate_s rate_0[] = { /* 640x480 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) {60, 0x01, 0xc1, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) {50, 0x01, 0x41, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) {40, 0x02, 0xc1, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) {30, 0x04, 0x81, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) {15, 0x03, 0x41, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) static const struct rate_s rate_1[] = { /* 320x240 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) /* {205, 0x01, 0xc1, 0x02}, * 205 FPS: video is partly corrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) {187, 0x01, 0x81, 0x02}, /* 187 FPS or below: video is valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) {150, 0x01, 0xc1, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) {137, 0x02, 0xc1, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) {125, 0x02, 0x81, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) {100, 0x02, 0xc1, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) {75, 0x03, 0xc1, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) {60, 0x04, 0xc1, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) {50, 0x02, 0x41, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) {37, 0x03, 0x41, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) {30, 0x04, 0x41, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) if (sd->sensor != SENSOR_OV772x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) if (gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) r = rate_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) i = ARRAY_SIZE(rate_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) r = rate_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) i = ARRAY_SIZE(rate_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) while (--i > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) if (sd->frame_rate >= r->fps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) r++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) sccb_reg_write(gspca_dev, 0x11, r->r11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) sccb_reg_write(gspca_dev, 0x0d, r->r0d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) ov534_reg_write(gspca_dev, 0xe5, r->re5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) gspca_dbg(gspca_dev, D_PROBE, "frame_rate: %d\n", r->fps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) static void sethue(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) if (sd->sensor == SENSOR_OV767x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) /* TBD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) s16 huesin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) s16 huecos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) /* According to the datasheet the registers expect HUESIN and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) * HUECOS to be the result of the trigonometric functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) * scaled by 0x80.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) * The 0x7fff here represents the maximum absolute value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) * returned byt fixp_sin and fixp_cos, so the scaling will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) * consider the result like in the interval [-1.0, 1.0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) huesin = fixp_sin16(val) * 0x80 / 0x7fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) huecos = fixp_cos16(val) * 0x80 / 0x7fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) if (huesin < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) sccb_reg_write(gspca_dev, 0xab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) sccb_reg_read(gspca_dev, 0xab) | 0x2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) huesin = -huesin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) sccb_reg_write(gspca_dev, 0xab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) sccb_reg_read(gspca_dev, 0xab) & ~0x2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) sccb_reg_write(gspca_dev, 0xa9, (u8)huecos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) sccb_reg_write(gspca_dev, 0xaa, (u8)huesin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) static void setsaturation(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) if (sd->sensor == SENSOR_OV767x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) static u8 color_tb[][6] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) {0x42, 0x42, 0x00, 0x11, 0x30, 0x41},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) {0x52, 0x52, 0x00, 0x16, 0x3c, 0x52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) {0x66, 0x66, 0x00, 0x1b, 0x4b, 0x66},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) {0x80, 0x80, 0x00, 0x22, 0x5e, 0x80},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) {0x9a, 0x9a, 0x00, 0x29, 0x71, 0x9a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) {0xb8, 0xb8, 0x00, 0x31, 0x87, 0xb8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) {0xdd, 0xdd, 0x00, 0x3b, 0xa2, 0xdd},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) for (i = 0; i < ARRAY_SIZE(color_tb[0]); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) sccb_reg_write(gspca_dev, 0x4f + i, color_tb[val][i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) sccb_reg_write(gspca_dev, 0xa7, val); /* U saturation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) sccb_reg_write(gspca_dev, 0xa8, val); /* V saturation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) if (sd->sensor == SENSOR_OV767x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) val = 0x80 - val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) sccb_reg_write(gspca_dev, 0x55, val); /* bright */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) sccb_reg_write(gspca_dev, 0x9b, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) if (sd->sensor == SENSOR_OV767x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) sccb_reg_write(gspca_dev, 0x56, val); /* contras */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) sccb_reg_write(gspca_dev, 0x9c, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) static void setgain(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) switch (val & 0x30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) case 0x00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) val &= 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) case 0x10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) val &= 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) val |= 0x30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) case 0x20:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) val &= 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) val |= 0x70;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) /* case 0x30: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) val &= 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) val |= 0xf0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) sccb_reg_write(gspca_dev, 0x00, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) static s32 getgain(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) return sccb_reg_read(gspca_dev, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) static void setexposure(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) if (sd->sensor == SENSOR_OV767x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) /* set only aec[9:2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) sccb_reg_write(gspca_dev, 0x10, val); /* aech */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) /* 'val' is one byte and represents half of the exposure value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) * we are going to set into registers, a two bytes value:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) * MSB: ((u16) val << 1) >> 8 == val >> 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) * LSB: ((u16) val << 1) & 0xff == val << 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) sccb_reg_write(gspca_dev, 0x08, val >> 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) sccb_reg_write(gspca_dev, 0x10, val << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) static s32 getexposure(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) if (sd->sensor == SENSOR_OV767x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) /* get only aec[9:2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) return sccb_reg_read(gspca_dev, 0x10); /* aech */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) u8 hi = sccb_reg_read(gspca_dev, 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) u8 lo = sccb_reg_read(gspca_dev, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) return (hi << 8 | lo) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) static void setagc(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) if (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) sccb_reg_write(gspca_dev, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) sccb_reg_read(gspca_dev, 0x13) | 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) sccb_reg_write(gspca_dev, 0x64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) sccb_reg_read(gspca_dev, 0x64) | 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) sccb_reg_write(gspca_dev, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) sccb_reg_read(gspca_dev, 0x13) & ~0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) sccb_reg_write(gspca_dev, 0x64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) sccb_reg_read(gspca_dev, 0x64) & ~0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) static void setawb(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) if (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) sccb_reg_write(gspca_dev, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) sccb_reg_read(gspca_dev, 0x13) | 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) if (sd->sensor == SENSOR_OV772x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) sccb_reg_write(gspca_dev, 0x63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) sccb_reg_read(gspca_dev, 0x63) | 0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) sccb_reg_write(gspca_dev, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) sccb_reg_read(gspca_dev, 0x13) & ~0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) if (sd->sensor == SENSOR_OV772x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) sccb_reg_write(gspca_dev, 0x63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) sccb_reg_read(gspca_dev, 0x63) & ~0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) static void setaec(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) data = sd->sensor == SENSOR_OV767x ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) 0x05 : /* agc + aec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) 0x01; /* agc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) case V4L2_EXPOSURE_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) sccb_reg_write(gspca_dev, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) sccb_reg_read(gspca_dev, 0x13) | data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) case V4L2_EXPOSURE_MANUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) sccb_reg_write(gspca_dev, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) sccb_reg_read(gspca_dev, 0x13) & ~data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) static void setsharpness(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) sccb_reg_write(gspca_dev, 0x91, val); /* Auto de-noise threshold */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) sccb_reg_write(gspca_dev, 0x8e, val); /* De-noise threshold */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) if (sd->sensor == SENSOR_OV767x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) val = sccb_reg_read(gspca_dev, 0x1e); /* mvfp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) val &= ~0x30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) if (hflip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) val |= 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) if (vflip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) val |= 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) sccb_reg_write(gspca_dev, 0x1e, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) val = sccb_reg_read(gspca_dev, 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) val &= ~0xc0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) if (hflip == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) val |= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) if (vflip == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) val |= 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) sccb_reg_write(gspca_dev, 0x0c, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) static void setlightfreq(struct gspca_dev *gspca_dev, s32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) val = val ? 0x9e : 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (sd->sensor == SENSOR_OV767x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) sccb_reg_write(gspca_dev, 0x2a, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) val = 0x9d; /* insert dummy to 25fps for 50Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) sccb_reg_write(gspca_dev, 0x2b, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) /* this function is called at probe time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) static int sd_config(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) struct cam *cam;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) cam = &gspca_dev->cam;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) cam->cam_mode = ov772x_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) cam->nmodes = ARRAY_SIZE(ov772x_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) sd->frame_rate = DEFAULT_FRAME_RATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) static int ov534_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) struct sd *sd = container_of(ctrl->handler, struct sd, ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) struct gspca_dev *gspca_dev = &sd->gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) case V4L2_CID_AUTOGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) gspca_dev->usb_err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) if (ctrl->val && sd->gain && gspca_dev->streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) sd->gain->val = getgain(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) return gspca_dev->usb_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) case V4L2_CID_EXPOSURE_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) gspca_dev->usb_err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) if (ctrl->val == V4L2_EXPOSURE_AUTO && sd->exposure &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) gspca_dev->streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) sd->exposure->val = getexposure(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) return gspca_dev->usb_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) static int ov534_s_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) struct sd *sd = container_of(ctrl->handler, struct sd, ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) struct gspca_dev *gspca_dev = &sd->gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) gspca_dev->usb_err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) if (!gspca_dev->streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) case V4L2_CID_HUE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) sethue(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) case V4L2_CID_SATURATION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) setsaturation(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) case V4L2_CID_BRIGHTNESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) setbrightness(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) case V4L2_CID_CONTRAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) setcontrast(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) case V4L2_CID_AUTOGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) /* case V4L2_CID_GAIN: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) setagc(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) if (!gspca_dev->usb_err && !ctrl->val && sd->gain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) setgain(gspca_dev, sd->gain->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) case V4L2_CID_AUTO_WHITE_BALANCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) setawb(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) case V4L2_CID_EXPOSURE_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) /* case V4L2_CID_EXPOSURE: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) setaec(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) if (!gspca_dev->usb_err && ctrl->val == V4L2_EXPOSURE_MANUAL &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) sd->exposure)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) setexposure(gspca_dev, sd->exposure->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) case V4L2_CID_SHARPNESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) setsharpness(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) case V4L2_CID_HFLIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) case V4L2_CID_VFLIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) sethvflip(gspca_dev, sd->hflip->val, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) case V4L2_CID_POWER_LINE_FREQUENCY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) setlightfreq(gspca_dev, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) return gspca_dev->usb_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) static const struct v4l2_ctrl_ops ov534_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) .g_volatile_ctrl = ov534_g_volatile_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) .s_ctrl = ov534_s_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) static int sd_init_controls(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) struct v4l2_ctrl_handler *hdl = &sd->ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) /* parameters with different values between the supported sensors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) int saturation_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) int saturation_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) int saturation_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) int brightness_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) int brightness_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) int brightness_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) int contrast_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) int contrast_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) int exposure_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) int exposure_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) int exposure_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) int hflip_def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) if (sd->sensor == SENSOR_OV767x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) saturation_min = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) saturation_max = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) saturation_def = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) brightness_min = -127;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) brightness_max = 127;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) brightness_def = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) contrast_max = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) contrast_def = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) exposure_min = 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) exposure_max = 0x60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) exposure_def = 0x13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) hflip_def = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) saturation_min = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) saturation_max = 255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) saturation_def = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) brightness_min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) brightness_max = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) brightness_def = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) contrast_max = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) contrast_def = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) exposure_min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) exposure_max = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) exposure_def = 120;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) hflip_def = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) gspca_dev->vdev.ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) v4l2_ctrl_handler_init(hdl, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) if (sd->sensor == SENSOR_OV772x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) sd->hue = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) V4L2_CID_HUE, -90, 90, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) sd->saturation = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) V4L2_CID_SATURATION, saturation_min, saturation_max, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) saturation_def);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) sd->brightness = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) V4L2_CID_BRIGHTNESS, brightness_min, brightness_max, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) brightness_def);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) sd->contrast = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) V4L2_CID_CONTRAST, 0, contrast_max, 1, contrast_def);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) if (sd->sensor == SENSOR_OV772x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) sd->autogain = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) sd->gain = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) V4L2_CID_GAIN, 0, 63, 1, 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) sd->autoexposure = v4l2_ctrl_new_std_menu(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) V4L2_CID_EXPOSURE_AUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) V4L2_EXPOSURE_MANUAL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) V4L2_EXPOSURE_AUTO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) sd->exposure = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) V4L2_CID_EXPOSURE, exposure_min, exposure_max, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) exposure_def);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) sd->autowhitebalance = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) if (sd->sensor == SENSOR_OV772x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) sd->sharpness = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) V4L2_CID_SHARPNESS, 0, 63, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) sd->hflip = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) V4L2_CID_HFLIP, 0, 1, 1, hflip_def);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) sd->vflip = v4l2_ctrl_new_std(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) V4L2_CID_VFLIP, 0, 1, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) sd->plfreq = v4l2_ctrl_new_std_menu(hdl, &ov534_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) V4L2_CID_POWER_LINE_FREQUENCY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) V4L2_CID_POWER_LINE_FREQUENCY_50HZ, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) V4L2_CID_POWER_LINE_FREQUENCY_DISABLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) if (hdl->error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) pr_err("Could not initialize controls\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) return hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) if (sd->sensor == SENSOR_OV772x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) v4l2_ctrl_auto_cluster(2, &sd->autogain, 0, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) v4l2_ctrl_auto_cluster(2, &sd->autoexposure, V4L2_EXPOSURE_MANUAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) /* this function is called at probe and resume time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) static int sd_init(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) u16 sensor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) static const struct reg_array bridge_init[NSENSORS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) [SENSOR_OV767x] = {bridge_init_767x, ARRAY_SIZE(bridge_init_767x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) [SENSOR_OV772x] = {bridge_init_772x, ARRAY_SIZE(bridge_init_772x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) static const struct reg_array sensor_init[NSENSORS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) [SENSOR_OV767x] = {sensor_init_767x, ARRAY_SIZE(sensor_init_767x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) [SENSOR_OV772x] = {sensor_init_772x, ARRAY_SIZE(sensor_init_772x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) /* reset bridge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) ov534_reg_write(gspca_dev, 0xe7, 0x3a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) ov534_reg_write(gspca_dev, 0xe0, 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) /* initialize the sensor address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) ov534_reg_write(gspca_dev, OV534_REG_ADDRESS, 0x42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) /* reset sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) sccb_reg_write(gspca_dev, 0x12, 0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) usleep_range(10000, 20000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) /* probe the sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) sccb_reg_read(gspca_dev, 0x0a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) sensor_id = sccb_reg_read(gspca_dev, 0x0a) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) sccb_reg_read(gspca_dev, 0x0b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) sensor_id |= sccb_reg_read(gspca_dev, 0x0b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) gspca_dbg(gspca_dev, D_PROBE, "Sensor ID: %04x\n", sensor_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) if ((sensor_id & 0xfff0) == 0x7670) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) sd->sensor = SENSOR_OV767x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) gspca_dev->cam.cam_mode = ov767x_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) gspca_dev->cam.nmodes = ARRAY_SIZE(ov767x_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) sd->sensor = SENSOR_OV772x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) gspca_dev->cam.bulk = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) gspca_dev->cam.bulk_size = 16384;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) gspca_dev->cam.bulk_nurbs = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) gspca_dev->cam.mode_framerates = ov772x_framerates;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) /* initialize */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) reg_w_array(gspca_dev, bridge_init[sd->sensor].val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) bridge_init[sd->sensor].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) ov534_set_led(gspca_dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) sccb_w_array(gspca_dev, sensor_init[sd->sensor].val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) sensor_init[sd->sensor].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) sd_stopN(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) /* set_frame_rate(gspca_dev); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) return gspca_dev->usb_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) static int sd_start(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) static const struct reg_array bridge_start[NSENSORS][4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) [SENSOR_OV767x] = {{bridge_start_qvga_767x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) ARRAY_SIZE(bridge_start_qvga_767x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) {bridge_start_vga_767x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) ARRAY_SIZE(bridge_start_vga_767x)}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) [SENSOR_OV772x] = {{bridge_start_qvga_yuyv_772x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) ARRAY_SIZE(bridge_start_qvga_yuyv_772x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) {bridge_start_vga_yuyv_772x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) ARRAY_SIZE(bridge_start_vga_yuyv_772x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) {bridge_start_qvga_gbrg_772x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) ARRAY_SIZE(bridge_start_qvga_gbrg_772x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) {bridge_start_vga_gbrg_772x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) ARRAY_SIZE(bridge_start_vga_gbrg_772x)} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) static const struct reg_array sensor_start[NSENSORS][4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) [SENSOR_OV767x] = {{sensor_start_qvga_767x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) ARRAY_SIZE(sensor_start_qvga_767x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) {sensor_start_vga_767x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) ARRAY_SIZE(sensor_start_vga_767x)}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) [SENSOR_OV772x] = {{sensor_start_qvga_yuyv_772x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) ARRAY_SIZE(sensor_start_qvga_yuyv_772x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) {sensor_start_vga_yuyv_772x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) ARRAY_SIZE(sensor_start_vga_yuyv_772x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) {sensor_start_qvga_gbrg_772x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) ARRAY_SIZE(sensor_start_qvga_gbrg_772x)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) {sensor_start_vga_gbrg_772x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) ARRAY_SIZE(sensor_start_vga_gbrg_772x)} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) /* (from ms-win trace) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) if (sd->sensor == SENSOR_OV767x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) sccb_reg_write(gspca_dev, 0x1e, 0x04);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) /* black sun enable ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) mode = gspca_dev->curr_mode; /* 0: 320x240, 1: 640x480 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) reg_w_array(gspca_dev, bridge_start[sd->sensor][mode].val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) bridge_start[sd->sensor][mode].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) sccb_w_array(gspca_dev, sensor_start[sd->sensor][mode].val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) sensor_start[sd->sensor][mode].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) set_frame_rate(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) if (sd->hue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) sethue(gspca_dev, v4l2_ctrl_g_ctrl(sd->hue));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) setsaturation(gspca_dev, v4l2_ctrl_g_ctrl(sd->saturation));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) if (sd->autogain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) setagc(gspca_dev, v4l2_ctrl_g_ctrl(sd->autogain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) setawb(gspca_dev, v4l2_ctrl_g_ctrl(sd->autowhitebalance));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) setaec(gspca_dev, v4l2_ctrl_g_ctrl(sd->autoexposure));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) if (sd->gain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) setgain(gspca_dev, v4l2_ctrl_g_ctrl(sd->gain));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) setexposure(gspca_dev, v4l2_ctrl_g_ctrl(sd->exposure));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) setbrightness(gspca_dev, v4l2_ctrl_g_ctrl(sd->brightness));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) setcontrast(gspca_dev, v4l2_ctrl_g_ctrl(sd->contrast));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) if (sd->sharpness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) setsharpness(gspca_dev, v4l2_ctrl_g_ctrl(sd->sharpness));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) sethvflip(gspca_dev, v4l2_ctrl_g_ctrl(sd->hflip),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) v4l2_ctrl_g_ctrl(sd->vflip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) setlightfreq(gspca_dev, v4l2_ctrl_g_ctrl(sd->plfreq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) ov534_set_led(gspca_dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) ov534_reg_write(gspca_dev, 0xe0, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) return gspca_dev->usb_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) static void sd_stopN(struct gspca_dev *gspca_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) ov534_reg_write(gspca_dev, 0xe0, 0x09);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) ov534_set_led(gspca_dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) /* Values for bmHeaderInfo (Video and Still Image Payload Headers, 2.4.3.3) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) #define UVC_STREAM_EOH (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) #define UVC_STREAM_ERR (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) #define UVC_STREAM_STI (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) #define UVC_STREAM_RES (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) #define UVC_STREAM_SCR (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) #define UVC_STREAM_PTS (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) #define UVC_STREAM_EOF (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) #define UVC_STREAM_FID (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) static void sd_pkt_scan(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) u8 *data, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) __u32 this_pts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) u16 this_fid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) int remaining_len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) int payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) payload_len = gspca_dev->cam.bulk ? 2048 : 2040;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) len = min(remaining_len, payload_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) /* Payloads are prefixed with a UVC-style header. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) consider a frame to start when the FID toggles, or the PTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) changes. A frame ends when EOF is set, and we've received
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) the correct number of bytes. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) /* Verify UVC header. Header length is always 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) if (data[0] != 12 || len < 12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) gspca_dbg(gspca_dev, D_PACK, "bad header\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) goto discard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) /* Check errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) if (data[1] & UVC_STREAM_ERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) gspca_dbg(gspca_dev, D_PACK, "payload error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) goto discard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) /* Extract PTS and FID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) if (!(data[1] & UVC_STREAM_PTS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) gspca_dbg(gspca_dev, D_PACK, "PTS not present\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) goto discard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) this_pts = (data[5] << 24) | (data[4] << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) | (data[3] << 8) | data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) this_fid = (data[1] & UVC_STREAM_FID) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) /* If PTS or FID has changed, start a new frame. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) if (this_pts != sd->last_pts || this_fid != sd->last_fid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) if (gspca_dev->last_packet_type == INTER_PACKET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) gspca_frame_add(gspca_dev, LAST_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) sd->last_pts = this_pts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) sd->last_fid = this_fid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) gspca_frame_add(gspca_dev, FIRST_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) data + 12, len - 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) /* If this packet is marked as EOF, end the frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) } else if (data[1] & UVC_STREAM_EOF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) sd->last_pts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) if (gspca_dev->pixfmt.pixelformat != V4L2_PIX_FMT_JPEG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) && gspca_dev->image_len + len - 12 !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) gspca_dev->pixfmt.sizeimage) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) gspca_dbg(gspca_dev, D_PACK, "wrong sized frame\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) goto discard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) gspca_frame_add(gspca_dev, LAST_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) data + 12, len - 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) /* Add the data from this payload */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) gspca_frame_add(gspca_dev, INTER_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) data + 12, len - 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) /* Done this payload */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) goto scan_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) discard:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) /* Discard data until a new frame starts. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) gspca_dev->last_packet_type = DISCARD_PACKET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) scan_next:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) remaining_len -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) data += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) } while (remaining_len > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) /* get stream parameters (framerate) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) static void sd_get_streamparm(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) struct v4l2_streamparm *parm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) struct v4l2_captureparm *cp = &parm->parm.capture;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) struct v4l2_fract *tpf = &cp->timeperframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) tpf->numerator = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) tpf->denominator = sd->frame_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) /* set stream parameters (framerate) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) static void sd_set_streamparm(struct gspca_dev *gspca_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) struct v4l2_streamparm *parm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) struct v4l2_captureparm *cp = &parm->parm.capture;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) struct v4l2_fract *tpf = &cp->timeperframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) struct sd *sd = (struct sd *) gspca_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) if (tpf->numerator == 0 || tpf->denominator == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) sd->frame_rate = DEFAULT_FRAME_RATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) sd->frame_rate = tpf->denominator / tpf->numerator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) if (gspca_dev->streaming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) set_frame_rate(gspca_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) /* Return the actual framerate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) tpf->numerator = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) tpf->denominator = sd->frame_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) /* sub-driver description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) static const struct sd_desc sd_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) .name = MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) .config = sd_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) .init = sd_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) .init_controls = sd_init_controls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) .start = sd_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) .stopN = sd_stopN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) .pkt_scan = sd_pkt_scan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) .get_streamparm = sd_get_streamparm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) .set_streamparm = sd_set_streamparm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) /* -- module initialisation -- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) static const struct usb_device_id device_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) {USB_DEVICE(0x1415, 0x2000)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) {USB_DEVICE(0x06f8, 0x3002)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) MODULE_DEVICE_TABLE(usb, device_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) /* -- device connect -- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) static int sd_probe(struct usb_interface *intf, const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) static struct usb_driver sd_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) .name = MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) .id_table = device_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) .probe = sd_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) .disconnect = gspca_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) .suspend = gspca_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) .resume = gspca_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) .reset_resume = gspca_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) module_usb_driver(sd_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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