Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2005-2006 Micronas USA Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * This is the private include file for the go7007 driver.  It should not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * be included by anybody but the driver itself, and especially not by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * user-space applications.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <media/v4l2-fh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <media/videobuf2-v4l2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) struct go7007;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /* IDs to activate board-specific support code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define GO7007_BOARDID_MATRIX_II	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define GO7007_BOARDID_MATRIX_RELOAD	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define GO7007_BOARDID_STAR_TREK	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define GO7007_BOARDID_PCI_VOYAGER	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define GO7007_BOARDID_XMEN		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define GO7007_BOARDID_XMEN_II		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define GO7007_BOARDID_XMEN_III		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define GO7007_BOARDID_MATRIX_REV	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define GO7007_BOARDID_PX_M402U		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define GO7007_BOARDID_PX_TV402U	9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define GO7007_BOARDID_LIFEVIEW_LR192	10 /* TV Walker Ultra */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define GO7007_BOARDID_ENDURA		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define GO7007_BOARDID_ADLINK_MPG24	12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define GO7007_BOARDID_SENSORAY_2250	13 /* Sensoray 2250/2251 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define GO7007_BOARDID_ADS_USBAV_709    14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /* Various characteristics of each board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define GO7007_BOARD_HAS_AUDIO		(1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define GO7007_BOARD_USE_ONBOARD_I2C	(1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define GO7007_BOARD_HAS_TUNER		(1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) /* Characteristics of sensor devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define GO7007_SENSOR_VALID_POLAR	(1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define GO7007_SENSOR_HREF_POLAR	(1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define GO7007_SENSOR_VREF_POLAR	(1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define GO7007_SENSOR_FIELD_ID_POLAR	(1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define GO7007_SENSOR_BIT_WIDTH		(1<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define GO7007_SENSOR_VALID_ENABLE	(1<<5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define GO7007_SENSOR_656		(1<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define GO7007_SENSOR_CONFIG_MASK	0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define GO7007_SENSOR_TV		(1<<7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define GO7007_SENSOR_VBI		(1<<8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define GO7007_SENSOR_SCALING		(1<<9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define GO7007_SENSOR_SAA7115		(1<<10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /* Characteristics of audio sensor devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define GO7007_AUDIO_I2S_MODE_1		(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define GO7007_AUDIO_I2S_MODE_2		(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define GO7007_AUDIO_I2S_MODE_3		(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define GO7007_AUDIO_BCLK_POLAR		(1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define GO7007_AUDIO_WORD_14		(14<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define GO7007_AUDIO_WORD_16		(16<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define GO7007_AUDIO_ONE_CHANNEL	(1<<11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define GO7007_AUDIO_I2S_MASTER		(1<<16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define GO7007_AUDIO_OKI_MODE		(1<<17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define GO7007_CID_CUSTOM_BASE		(V4L2_CID_DETECT_CLASS_BASE + 0x1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define V4L2_CID_PIXEL_THRESHOLD0	(GO7007_CID_CUSTOM_BASE+1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define V4L2_CID_MOTION_THRESHOLD0	(GO7007_CID_CUSTOM_BASE+2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define V4L2_CID_MB_THRESHOLD0		(GO7007_CID_CUSTOM_BASE+3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define V4L2_CID_PIXEL_THRESHOLD1	(GO7007_CID_CUSTOM_BASE+4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define V4L2_CID_MOTION_THRESHOLD1	(GO7007_CID_CUSTOM_BASE+5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define V4L2_CID_MB_THRESHOLD1		(GO7007_CID_CUSTOM_BASE+6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define V4L2_CID_PIXEL_THRESHOLD2	(GO7007_CID_CUSTOM_BASE+7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define V4L2_CID_MOTION_THRESHOLD2	(GO7007_CID_CUSTOM_BASE+8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define V4L2_CID_MB_THRESHOLD2		(GO7007_CID_CUSTOM_BASE+9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define V4L2_CID_PIXEL_THRESHOLD3	(GO7007_CID_CUSTOM_BASE+10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define V4L2_CID_MOTION_THRESHOLD3	(GO7007_CID_CUSTOM_BASE+11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define V4L2_CID_MB_THRESHOLD3		(GO7007_CID_CUSTOM_BASE+12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) struct go7007_board_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	int hpi_buffer_cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	unsigned int sensor_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	int sensor_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	int sensor_height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	int sensor_framerate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	int sensor_h_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	int sensor_v_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	unsigned int audio_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	int audio_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	int audio_bclk_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int audio_main_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	int num_i2c_devs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct go_i2c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		const char *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		unsigned int is_video:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		unsigned int is_audio:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		int addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	} i2c_devs[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	int num_inputs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		int video_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		int audio_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	} inputs[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	int video_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	int num_aud_inputs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		int audio_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	} aud_inputs[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct go7007_hpi_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	int (*interface_reset)(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	int (*write_interrupt)(struct go7007 *go, int addr, int data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	int (*read_interrupt)(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	int (*stream_start)(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	int (*stream_stop)(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	int (*send_firmware)(struct go7007 *go, u8 *data, int len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	int (*send_command)(struct go7007 *go, unsigned int cmd, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	void (*release)(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* The video buffer size must be a multiple of PAGE_SIZE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define	GO7007_BUF_PAGES	(128 * 1024 / PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define	GO7007_BUF_SIZE		(GO7007_BUF_PAGES << PAGE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct go7007_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	struct vb2_v4l2_buffer vb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	unsigned int frame_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	u32 modet_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define GO7007_RATIO_1_1	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define GO7007_RATIO_4_3	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define GO7007_RATIO_16_9	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) enum go7007_parser_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	STATE_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	STATE_00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	STATE_00_00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	STATE_00_00_01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	STATE_FF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	STATE_VBI_LEN_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	STATE_VBI_LEN_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	STATE_MODET_MAP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	STATE_UNPARSED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct go7007 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	u8 bus_info[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	const struct go7007_board_info *board_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	unsigned int board_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	int tuner_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	int channel_number; /* for multi-channel boards like Adlink PCI-MPG24 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	char name[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	struct video_device vdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	void *boot_fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	unsigned boot_fw_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	struct v4l2_device v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	struct v4l2_ctrl_handler hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	struct v4l2_ctrl *mpeg_video_encoding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	struct v4l2_ctrl *mpeg_video_gop_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	struct v4l2_ctrl *mpeg_video_gop_closure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	struct v4l2_ctrl *mpeg_video_bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	struct v4l2_ctrl *mpeg_video_aspect_ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	struct v4l2_ctrl *mpeg_video_b_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	struct v4l2_ctrl *mpeg_video_rep_seqheader;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	struct v4l2_ctrl *modet_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	enum { STATUS_INIT, STATUS_ONLINE, STATUS_SHUTDOWN } status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	spinlock_t spinlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	struct mutex hw_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	struct mutex serialize_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	int audio_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	struct v4l2_subdev *sd_video;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	struct v4l2_subdev *sd_audio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	u8 usb_buf[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	/* Video input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	int input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	int aud_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	enum { GO7007_STD_NTSC, GO7007_STD_PAL, GO7007_STD_OTHER } standard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	v4l2_std_id std;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	int sensor_framerate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	int width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	int height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	int encoder_h_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	int encoder_v_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	unsigned int encoder_h_halve:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	unsigned int encoder_v_halve:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	unsigned int encoder_subsample:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	/* Encoder config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	u32 format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	int bitrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	int fps_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	int pali;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	int aspect_ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	int gop_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	unsigned int ipb:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	unsigned int closed_gop:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	unsigned int repeat_seqhead:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	unsigned int seq_header_enable:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	unsigned int gop_header_enable:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	unsigned int dvd_mode:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	unsigned int interlace_coding:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	/* Motion detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	unsigned int modet_enable:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		unsigned int enable:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		int pixel_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		int motion_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		int mb_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	} modet[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	unsigned char modet_map[1624];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	unsigned char active_map[216];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	u32 modet_event_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	/* Video streaming */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	struct mutex queue_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	struct vb2_queue vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	enum go7007_parser_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	int parse_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	u16 modet_word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	int seen_frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	u32 next_seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	struct list_head vidq_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	wait_queue_head_t frame_waitq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	struct go7007_buffer *active_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	/* Audio streaming */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	void (*audio_deliver)(struct go7007 *go, u8 *buf, int length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	void *snd_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	/* I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	int i2c_adapter_online;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	struct i2c_adapter i2c_adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	/* HPI driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	const struct go7007_hpi_ops *hpi_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	void *hpi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	int interrupt_available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	wait_queue_head_t interrupt_waitq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	unsigned short interrupt_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	unsigned short interrupt_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static inline struct go7007 *to_go7007(struct v4l2_device *v4l2_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	return container_of(v4l2_dev, struct go7007, v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* All of these must be called with the hpi_lock mutex held! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define go7007_interface_reset(go) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 			((go)->hpi_ops->interface_reset(go))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define	go7007_write_interrupt(go, x, y) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			((go)->hpi_ops->write_interrupt)((go), (x), (y))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define go7007_stream_start(go) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			((go)->hpi_ops->stream_start(go))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define go7007_stream_stop(go) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			((go)->hpi_ops->stream_stop(go))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define	go7007_send_firmware(go, x, y) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			((go)->hpi_ops->send_firmware)((go), (x), (y))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define go7007_write_addr(go, x, y) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			((go)->hpi_ops->write_interrupt)((go), (x)|0x8000, (y))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* go7007-driver.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) int go7007_read_addr(struct go7007 *go, u16 addr, u16 *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) int go7007_read_interrupt(struct go7007 *go, u16 *value, u16 *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) int go7007_boot_encoder(struct go7007 *go, int init_i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int go7007_reset_encoder(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) int go7007_register_encoder(struct go7007 *go, unsigned num_i2c_devs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) int go7007_start_encoder(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) void go7007_parse_video_stream(struct go7007 *go, u8 *buf, int length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) struct go7007 *go7007_alloc(const struct go7007_board_info *board,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 					struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) void go7007_update_board(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /* go7007-fw.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) int go7007_construct_fw_image(struct go7007 *go, u8 **fw, int *fwlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /* go7007-i2c.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int go7007_i2c_init(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int go7007_i2c_remove(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* go7007-v4l2.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int go7007_v4l2_init(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) int go7007_v4l2_ctrl_init(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) void go7007_v4l2_remove(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /* snd-go7007.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) int go7007_snd_init(struct go7007 *go);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) int go7007_snd_remove(struct go7007 *go);