^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // em28xx-video.c - driver for Empia EM2800/EM2820/2840 USB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // video capture devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // Markus Rechberger <mrechberger@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // Mauro Carvalho Chehab <mchehab@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) // Sascha Sommer <saschasommer@freenet.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) // Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) // Some parts based on SN9C10x PC Camera Controllers GPL driver made
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) // by Luca Risolia <luca.risolia@studio.unibo.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) // This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) // it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) // the Free Software Foundation; either version 2 of the License, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) // (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) // This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) // but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) // GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "em28xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/bitmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include "em28xx-v4l.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <media/v4l2-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <media/v4l2-ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <media/v4l2-event.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <media/drv-intf/msp3400.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <media/tuner.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define DRIVER_AUTHOR "Ludovico Cavedon <cavedon@sssup.it>, " \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) "Markus Rechberger <mrechberger@gmail.com>, " \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) "Mauro Carvalho Chehab <mchehab@kernel.org>, " \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) "Sascha Sommer <saschasommer@freenet.de>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static unsigned int isoc_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) module_param(isoc_debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MODULE_PARM_DESC(isoc_debug, "enable debug messages [isoc transfers]");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static unsigned int disable_vbi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) module_param(disable_vbi, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MODULE_PARM_DESC(disable_vbi, "disable vbi support");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int alt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) module_param(alt, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define em28xx_videodbg(fmt, arg...) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (video_debug) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) dev_printk(KERN_DEBUG, &dev->intf->dev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) "video: %s: " fmt, __func__, ## arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define em28xx_isocdbg(fmt, arg...) do {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (isoc_debug) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) dev_printk(KERN_DEBUG, &dev->intf->dev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) "isoc: %s: " fmt, __func__, ## arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MODULE_AUTHOR(DRIVER_AUTHOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MODULE_DESCRIPTION(DRIVER_DESC " - v4l2 interface");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MODULE_VERSION(EM28XX_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define EM25XX_FRMDATAHDR_BYTE1 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define EM25XX_FRMDATAHDR_BYTE2_STILL_IMAGE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define EM25XX_FRMDATAHDR_BYTE2_FRAME_END 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define EM25XX_FRMDATAHDR_BYTE2_FRAME_ID 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define EM25XX_FRMDATAHDR_BYTE2_MASK (EM25XX_FRMDATAHDR_BYTE2_STILL_IMAGE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) EM25XX_FRMDATAHDR_BYTE2_FRAME_END | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) EM25XX_FRMDATAHDR_BYTE2_FRAME_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static unsigned int video_nr[] = {[0 ... (EM28XX_MAXBOARDS - 1)] = -1U };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static unsigned int vbi_nr[] = {[0 ... (EM28XX_MAXBOARDS - 1)] = -1U };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static unsigned int radio_nr[] = {[0 ... (EM28XX_MAXBOARDS - 1)] = -1U };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) module_param_array(video_nr, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) module_param_array(vbi_nr, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) module_param_array(radio_nr, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MODULE_PARM_DESC(video_nr, "video device numbers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MODULE_PARM_DESC(radio_nr, "radio device numbers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static unsigned int video_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) module_param(video_debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* supported video standards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static struct em28xx_fmt format[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .fourcc = V4L2_PIX_FMT_YUYV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .depth = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .reg = EM28XX_OUTFMT_YUV422_Y0UY1V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .fourcc = V4L2_PIX_FMT_RGB565,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .depth = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .reg = EM28XX_OUTFMT_RGB_16_656,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .fourcc = V4L2_PIX_FMT_SRGGB8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .depth = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .reg = EM28XX_OUTFMT_RGB_8_RGRG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .fourcc = V4L2_PIX_FMT_SBGGR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .depth = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .reg = EM28XX_OUTFMT_RGB_8_BGBG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .fourcc = V4L2_PIX_FMT_SGRBG8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .depth = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .reg = EM28XX_OUTFMT_RGB_8_GRGR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .fourcc = V4L2_PIX_FMT_SGBRG8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .depth = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .reg = EM28XX_OUTFMT_RGB_8_GBGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .fourcc = V4L2_PIX_FMT_YUV411P,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .depth = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .reg = EM28XX_OUTFMT_YUV411,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /*FIXME: maxw should be dependent of alt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static inline unsigned int norm_maxw(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (dev->is_webcam)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return v4l2->sensor_xres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (dev->board.max_range_640_480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return 640;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return 720;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static inline unsigned int norm_maxh(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (dev->is_webcam)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return v4l2->sensor_yres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (dev->board.max_range_640_480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return 480;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return (v4l2->norm & V4L2_STD_625_50) ? 576 : 480;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int em28xx_vbi_supported(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* Modprobe option to manually disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (disable_vbi == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (dev->is_webcam)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* FIXME: check subdevices for VBI support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (dev->chip_id == CHIP_ID_EM2860 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) dev->chip_id == CHIP_ID_EM2883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* Version of em28xx that does not support VBI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * em28xx_wake_i2c()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * configure i2c attached devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static void em28xx_wake_i2c(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct v4l2_device *v4l2_dev = &dev->v4l2->v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) v4l2_device_call_all(v4l2_dev, 0, core, reset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) v4l2_device_call_all(v4l2_dev, 0, video, s_routing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) INPUT(dev->ctl_input)->vmux, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int em28xx_colorlevels_set_default(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) em28xx_write_reg(dev, EM28XX_R20_YGAIN, CONTRAST_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) em28xx_write_reg(dev, EM28XX_R21_YOFFSET, BRIGHTNESS_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) em28xx_write_reg(dev, EM28XX_R22_UVGAIN, SATURATION_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) em28xx_write_reg(dev, EM28XX_R23_UOFFSET, BLUE_BALANCE_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) em28xx_write_reg(dev, EM28XX_R24_VOFFSET, RED_BALANCE_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, SHARPNESS_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static int em28xx_set_outfmt(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) u8 fmt, vinctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) fmt = v4l2->format->reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (!dev->is_em25xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) fmt |= 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * NOTE: it's not clear if this is really needed !
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * The datasheets say bit 5 is a reserved bit and devices seem to work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * fine without it. But the Windows driver sets it for em2710/50+em28xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * devices and we've always been setting it, too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * em2765 (em25xx, em276x/7x/8x) devices do NOT work with this bit set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * it's likely used for an additional (compressed ?) format there.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ret = em28xx_write_reg(dev, EM28XX_R27_OUTFMT, fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, v4l2->vinmode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) vinctrl = v4l2->vinctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (em28xx_vbi_supported(dev) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) vinctrl |= EM28XX_VINCTRL_VBI_RAW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) v4l2->vbi_width / 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, v4l2->vbi_height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (v4l2->norm & V4L2_STD_525_60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* NTSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) } else if (v4l2->norm & V4L2_STD_625_50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* PAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x07);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u8 ymin, u8 ymax)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) em28xx_videodbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) xmin, ymin, xmax, ymax);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static void em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u16 width, u16 height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) u8 cwidth = width >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) u8 cheight = height >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 overflow = (height >> 9 & 0x02) | (width >> 10 & 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /* NOTE: size limit: 2047x1023 = 2MPix */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) em28xx_videodbg("capture area set to (%d,%d): %dx%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) hstart, vstart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ((overflow & 2) << 9 | cwidth << 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ((overflow & 1) << 10 | cheight << 2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /* FIXME: function/meaning of these registers ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* FIXME: align width+height to multiples of 4 ?! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) if (dev->is_em25xx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) em28xx_write_reg(dev, 0x34, width >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) em28xx_write_reg(dev, 0x35, height >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) u8 mode = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* the em2800 scaler only supports scaling down to 50% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (dev->board.is_em2800) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) buf[0] = h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) buf[1] = h >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) buf[0] = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) buf[1] = v >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * it seems that both H and V scalers must be active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * to work correctly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) mode = (h || v) ? 0x30 : 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return em28xx_write_reg(dev, EM28XX_R26_COMPR, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* FIXME: this only function read values from dev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static int em28xx_resolution_set(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) int width = norm_maxw(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) int height = norm_maxh(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* Properly setup VBI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) v4l2->vbi_width = 720;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (v4l2->norm & V4L2_STD_525_60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) v4l2->vbi_height = 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) v4l2->vbi_height = 18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) em28xx_set_outfmt(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * If we don't set the start position to 2 in VBI mode, we end up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * with line 20/21 being YUYV encoded instead of being in 8-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * greyscale. The core of the issue is that line 21 (and line 23 for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * PAL WSS) are inside of active video region, and as a result they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * get the pixelformatting associated with that area. So by cropping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * it out, we end up with the same format as the rest of the VBI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (em28xx_vbi_supported(dev) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) em28xx_capture_area_set(dev, 0, 2, width, height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) em28xx_capture_area_set(dev, 0, 0, width, height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return em28xx_scaler_set(dev, v4l2->hscale, v4l2->vscale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /* Set USB alternate setting for analog video */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int em28xx_set_alternate(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct usb_device *udev = interface_to_usbdev(dev->intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) unsigned int min_pkt_size = v4l2->width * 2 + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * NOTE: for isoc transfers, only alt settings > 0 are allowed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * bulk transfers seem to work only with alt=0 !
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) dev->alt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (alt > 0 && alt < dev->num_alt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) em28xx_videodbg("alternate forced to %d\n", dev->alt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) dev->alt = alt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) goto set_alt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (dev->analog_xfer_bulk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) goto set_alt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * When image size is bigger than a certain value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * the frame size should be increased, otherwise, only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) * green screen will be received.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (v4l2->width * 2 * v4l2->height > 720 * 240 * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) min_pkt_size *= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) for (i = 0; i < dev->num_alt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /* stop when the selected alt setting offers enough bandwidth */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (dev->alt_max_pkt_size_isoc[i] >= min_pkt_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) dev->alt = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * otherwise make sure that we end up with the maximum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * bandwidth because the min_pkt_size equation might be wrong.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) } else if (dev->alt_max_pkt_size_isoc[i] >
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) dev->alt_max_pkt_size_isoc[dev->alt])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) dev->alt = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) set_alt:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * NOTE: for bulk transfers, we need to call usb_set_interface()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * even if the previous settings were the same. Otherwise streaming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * fails with all urbs having status = -EOVERFLOW !
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (dev->analog_xfer_bulk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) dev->max_pkt_size = 512; /* USB 2.0 spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) dev->packet_multiplier = EM28XX_BULK_PACKET_MULTIPLIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) } else { /* isoc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) em28xx_videodbg("minimum isoc packet size: %u (alt=%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) min_pkt_size, dev->alt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) dev->max_pkt_size =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) dev->alt_max_pkt_size_isoc[dev->alt];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) dev->packet_multiplier = EM28XX_NUM_ISOC_PACKETS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) em28xx_videodbg("setting alternate %d with wMaxPacketSize=%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) dev->alt, dev->max_pkt_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) err = usb_set_interface(udev, dev->ifnum, dev->alt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) "cannot change alternate number to %d (error=%i)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) dev->alt, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) * DMA and thread functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * Finish the current buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) static inline void finish_buffer(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) struct em28xx_buffer *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) em28xx_isocdbg("[%p/%d] wakeup\n", buf, buf->top_field);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) buf->vb.sequence = dev->v4l2->field_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (dev->v4l2->progressive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) buf->vb.field = V4L2_FIELD_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) buf->vb.field = V4L2_FIELD_INTERLACED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) buf->vb.vb2_buf.timestamp = ktime_get_ns();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) * Copy picture data from USB buffer to videobuf buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static void em28xx_copy_video(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) struct em28xx_buffer *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) unsigned char *usb_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) unsigned long len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) void *fieldstart, *startwrite, *startread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) int linesdone, currlinedone, offset, lencopy, remain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) int bytesperline = v4l2->width << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (buf->pos + len > buf->length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) len = buf->length - buf->pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) startread = usb_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) remain = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (v4l2->progressive || buf->top_field)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) fieldstart = buf->vb_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) else /* interlaced mode, even nr. of lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) fieldstart = buf->vb_buf + bytesperline;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) linesdone = buf->pos / bytesperline;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) currlinedone = buf->pos % bytesperline;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (v4l2->progressive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) offset = linesdone * bytesperline + currlinedone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) offset = linesdone * bytesperline * 2 + currlinedone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) startwrite = fieldstart + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) lencopy = bytesperline - currlinedone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) lencopy = lencopy > remain ? remain : lencopy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) if ((char *)startwrite + lencopy > (char *)buf->vb_buf + buf->length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) em28xx_isocdbg("Overflow of %zu bytes past buffer end (1)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) ((char *)startwrite + lencopy) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) ((char *)buf->vb_buf + buf->length));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) remain = (char *)buf->vb_buf + buf->length -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) (char *)startwrite;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) lencopy = remain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (lencopy <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) memcpy(startwrite, startread, lencopy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) remain -= lencopy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) while (remain > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) if (v4l2->progressive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) startwrite += lencopy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) startwrite += lencopy + bytesperline;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) startread += lencopy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (bytesperline > remain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) lencopy = remain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) lencopy = bytesperline;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) if ((char *)startwrite + lencopy > (char *)buf->vb_buf +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) buf->length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) em28xx_isocdbg("Overflow of %zu bytes past buffer end(2)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) ((char *)startwrite + lencopy) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) ((char *)buf->vb_buf + buf->length));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) remain = (char *)buf->vb_buf + buf->length -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) (char *)startwrite;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) lencopy = remain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (lencopy <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) memcpy(startwrite, startread, lencopy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) remain -= lencopy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) buf->pos += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * Copy VBI data from USB buffer to videobuf buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static void em28xx_copy_vbi(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct em28xx_buffer *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) unsigned char *usb_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) unsigned long len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) unsigned int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (buf->pos + len > buf->length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) len = buf->length - buf->pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) offset = buf->pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) /* Make sure the bottom field populates the second half of the frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (buf->top_field == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) offset += dev->v4l2->vbi_width * dev->v4l2->vbi_height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) memcpy(buf->vb_buf + offset, usb_buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) buf->pos += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static inline void print_err_status(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) int packet, int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) char *errmsg = "Unknown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) switch (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) case -ENOENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) errmsg = "unlinked synchronously";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) case -ECONNRESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) errmsg = "unlinked asynchronously";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) case -ENOSR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) errmsg = "Buffer error (overrun)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) case -EPIPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) errmsg = "Stalled (device not responding)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) case -EOVERFLOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) errmsg = "Babble (bad cable?)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) case -EPROTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) errmsg = "Bit-stuff error (bad cable?)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) case -EILSEQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) errmsg = "CRC/Timeout (could be anything)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) case -ETIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) errmsg = "Device does not respond";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (packet < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) em28xx_isocdbg("URB status %d [%s].\n", status, errmsg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) em28xx_isocdbg("URB packet %d, status %d [%s].\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) packet, status, errmsg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * get the next available buffer from dma queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) static inline struct em28xx_buffer *get_next_buf(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) struct em28xx_dmaqueue *dma_q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) struct em28xx_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (list_empty(&dma_q->active)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) em28xx_isocdbg("No active queue to serve\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) /* Get the next buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) buf = list_entry(dma_q->active.next, struct em28xx_buffer, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) /* Cleans up buffer - Useful for testing for frame/URB loss */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) list_del(&buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) buf->pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) buf->vb_buf = buf->mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) * Finish the current buffer if completed and prepare for the next field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) static struct em28xx_buffer *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) finish_field_prepare_next(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) struct em28xx_buffer *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) struct em28xx_dmaqueue *dma_q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (v4l2->progressive || v4l2->top_field) { /* Brand new frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) if (buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) finish_buffer(dev, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) buf = get_next_buf(dev, dma_q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) buf->top_field = v4l2->top_field;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) buf->pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) return buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) * Process data packet according to the em2710/em2750/em28xx frame data format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static inline void process_frame_data_em28xx(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) unsigned char *data_pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) unsigned int data_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) struct em28xx_buffer *buf = dev->usb_ctl.vid_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) struct em28xx_buffer *vbi_buf = dev->usb_ctl.vbi_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) struct em28xx_dmaqueue *dma_q = &dev->vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * capture type 0 = vbi start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * capture type 1 = vbi in progress
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) * capture type 2 = video start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) * capture type 3 = video in progress
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (data_len >= 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) * NOTE: Headers are always 4 bytes and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) * never split across packets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) if (data_pkt[0] == 0x88 && data_pkt[1] == 0x88 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) data_pkt[2] == 0x88 && data_pkt[3] == 0x88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) /* Continuation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) data_pkt += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) data_len -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) } else if (data_pkt[0] == 0x33 && data_pkt[1] == 0x95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) /* Field start (VBI mode) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) v4l2->capture_type = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) v4l2->vbi_read = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) em28xx_isocdbg("VBI START HEADER !!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) v4l2->top_field = !(data_pkt[2] & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) data_pkt += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) data_len -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) } else if (data_pkt[0] == 0x22 && data_pkt[1] == 0x5a) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) /* Field start (VBI disabled) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) v4l2->capture_type = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) em28xx_isocdbg("VIDEO START HEADER !!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) v4l2->top_field = !(data_pkt[2] & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) data_pkt += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) data_len -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) * NOTE: With bulk transfers, intermediate data packets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) * have no continuation header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (v4l2->capture_type == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) vbi_buf = finish_field_prepare_next(dev, vbi_buf, vbi_dma_q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) dev->usb_ctl.vbi_buf = vbi_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) v4l2->capture_type = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (v4l2->capture_type == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) int vbi_size = v4l2->vbi_width * v4l2->vbi_height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) int vbi_data_len = ((v4l2->vbi_read + data_len) > vbi_size) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) (vbi_size - v4l2->vbi_read) : data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) /* Copy VBI data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) if (vbi_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) em28xx_copy_vbi(dev, vbi_buf, data_pkt, vbi_data_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) v4l2->vbi_read += vbi_data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) if (vbi_data_len < data_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) /* Continue with copying video data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) v4l2->capture_type = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) data_pkt += vbi_data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) data_len -= vbi_data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (v4l2->capture_type == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) buf = finish_field_prepare_next(dev, buf, dma_q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) dev->usb_ctl.vid_buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) v4l2->capture_type = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (v4l2->capture_type == 3 && buf && data_len > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) em28xx_copy_video(dev, buf, data_pkt, data_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * Process data packet according to the em25xx/em276x/7x/8x frame data format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) static inline void process_frame_data_em25xx(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) unsigned char *data_pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) unsigned int data_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) struct em28xx_buffer *buf = dev->usb_ctl.vid_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) struct em28xx_dmaqueue *dmaq = &dev->vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) bool frame_end = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) /* Check for header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) * NOTE: at least with bulk transfers, only the first packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) * has a header and has always set the FRAME_END bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) if (data_len >= 2) { /* em25xx header is only 2 bytes long */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if ((data_pkt[0] == EM25XX_FRMDATAHDR_BYTE1) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) ((data_pkt[1] & ~EM25XX_FRMDATAHDR_BYTE2_MASK) == 0x00)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) v4l2->top_field = !(data_pkt[1] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) EM25XX_FRMDATAHDR_BYTE2_FRAME_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) frame_end = data_pkt[1] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) EM25XX_FRMDATAHDR_BYTE2_FRAME_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) data_pkt += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) data_len -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) /* Finish field and prepare next (BULK only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) if (dev->analog_xfer_bulk && frame_end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) buf = finish_field_prepare_next(dev, buf, dmaq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) dev->usb_ctl.vid_buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * NOTE: in ISOC mode when a new frame starts and buf==NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) * we COULD already prepare a buffer here to avoid skipping the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) * first frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) /* Copy data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if (buf && data_len > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) em28xx_copy_video(dev, buf, data_pkt, data_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) /* Finish frame (ISOC only) => avoids lag of 1 frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) if (!dev->analog_xfer_bulk && frame_end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) buf = finish_field_prepare_next(dev, buf, dmaq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) dev->usb_ctl.vid_buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) * NOTES:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) * 1) Tested with USB bulk transfers only !
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * The wording in the datasheet suggests that isoc might work different.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) * The current code assumes that with isoc transfers each packet has a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) * header like with the other em28xx devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) * 2) Support for interlaced mode is pure theory. It has not been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) * tested and it is unknown if these devices actually support it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) /* Processes and copies the URB data content (video and VBI data) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) static inline int em28xx_urb_data_copy(struct em28xx *dev, struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) int xfer_bulk, num_packets, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) unsigned char *usb_data_pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) unsigned int usb_data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (dev->disconnected)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) if (urb->status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) print_err_status(dev, -1, urb->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) xfer_bulk = usb_pipebulk(urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) if (xfer_bulk) /* bulk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) num_packets = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) else /* isoc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) num_packets = urb->number_of_packets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) for (i = 0; i < num_packets; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if (xfer_bulk) { /* bulk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) usb_data_len = urb->actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) usb_data_pkt = urb->transfer_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) } else { /* isoc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (urb->iso_frame_desc[i].status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) print_err_status(dev, i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) urb->iso_frame_desc[i].status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) if (urb->iso_frame_desc[i].status != -EPROTO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) usb_data_len = urb->iso_frame_desc[i].actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) if (usb_data_len > dev->max_pkt_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) em28xx_isocdbg("packet bigger than packet size");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) usb_data_pkt = urb->transfer_buffer +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) urb->iso_frame_desc[i].offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) if (usb_data_len == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) /* NOTE: happens very often with isoc transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) /* em28xx_usbdbg("packet %d is empty",i); - spammy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) if (dev->is_em25xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) process_frame_data_em25xx(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) usb_data_pkt, usb_data_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) process_frame_data_em28xx(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) usb_data_pkt, usb_data_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static int get_resource(enum v4l2_buf_type f_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) switch (f_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) case V4L2_BUF_TYPE_VIDEO_CAPTURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) return EM28XX_RESOURCE_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) case V4L2_BUF_TYPE_VBI_CAPTURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) return EM28XX_RESOURCE_VBI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) WARN_ON(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) return -1; /* Indicate that device is busy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) /* Usage lock check functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static int res_get(struct em28xx *dev, enum v4l2_buf_type f_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) int res_type = get_resource(f_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) /* is it free? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) if (dev->resources & res_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) /* no, someone else uses it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) /* it's free, grab it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) dev->resources |= res_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) em28xx_videodbg("res: get %d\n", res_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) static void res_free(struct em28xx *dev, enum v4l2_buf_type f_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) int res_type = get_resource(f_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) dev->resources &= ~res_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) em28xx_videodbg("res: put %d\n", res_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) static void em28xx_v4l2_media_release(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) #ifdef CONFIG_MEDIA_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) for (i = 0; i < MAX_EM28XX_INPUT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) if (!INPUT(i)->type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) media_device_unregister_entity(&dev->input_ent[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) * Media Controller helper functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) static int em28xx_enable_analog_tuner(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) #ifdef CONFIG_MEDIA_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) struct media_device *mdev = dev->media_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) struct media_entity *source;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) struct media_link *link, *found_link = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) int ret, active_links = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) if (!mdev || !v4l2->decoder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) * This will find the tuner that is connected into the decoder.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) * Technically, this is not 100% correct, as the device may be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) * using an analog input instead of the tuner. However, as we can't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) * do DVB streaming while the DMA engine is being used for V4L2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) * this should be enough for the actual needs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) list_for_each_entry(link, &v4l2->decoder->links, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) if (link->sink->entity == v4l2->decoder) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) found_link = link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (link->flags & MEDIA_LNK_FL_ENABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) active_links++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (active_links == 1 || !found_link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) source = found_link->source->entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) list_for_each_entry(link, &source->links, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) struct media_entity *sink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) int flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) sink = link->sink->entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) if (sink == v4l2->decoder)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) flags = MEDIA_LNK_FL_ENABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) ret = media_entity_setup_link(link, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) "Couldn't change link %s->%s to %s. Error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) source->name, sink->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) flags ? "enabled" : "disabled",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) em28xx_videodbg("link %s->%s was %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) source->name, sink->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) flags ? "ENABLED" : "disabled");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) static const char * const iname[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) [EM28XX_VMUX_COMPOSITE] = "Composite",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) [EM28XX_VMUX_SVIDEO] = "S-Video",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) [EM28XX_VMUX_TELEVISION] = "Television",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) [EM28XX_RADIO] = "Radio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) static void em28xx_v4l2_create_entities(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) #if defined(CONFIG_MEDIA_CONTROLLER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) /* Initialize Video, VBI and Radio pads */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) v4l2->video_pad.flags = MEDIA_PAD_FL_SINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) ret = media_entity_pads_init(&v4l2->vdev.entity, 1, &v4l2->video_pad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) "failed to initialize video media entity!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) if (em28xx_vbi_supported(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) v4l2->vbi_pad.flags = MEDIA_PAD_FL_SINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) ret = media_entity_pads_init(&v4l2->vbi_dev.entity, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) &v4l2->vbi_pad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) "failed to initialize vbi media entity!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) /* Webcams don't have input connectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) if (dev->is_webcam)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) /* Create entities for each input connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) for (i = 0; i < MAX_EM28XX_INPUT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) struct media_entity *ent = &dev->input_ent[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) if (!INPUT(i)->type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) ent->name = iname[INPUT(i)->type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) ent->flags = MEDIA_ENT_FL_CONNECTOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) dev->input_pad[i].flags = MEDIA_PAD_FL_SOURCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) switch (INPUT(i)->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) case EM28XX_VMUX_COMPOSITE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) ent->function = MEDIA_ENT_F_CONN_COMPOSITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) case EM28XX_VMUX_SVIDEO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) ent->function = MEDIA_ENT_F_CONN_SVIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) default: /* EM28XX_VMUX_TELEVISION or EM28XX_RADIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) if (dev->tuner_type != TUNER_ABSENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) ent->function = MEDIA_ENT_F_CONN_RF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) ret = media_entity_pads_init(ent, 1, &dev->input_pad[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) "failed to initialize input pad[%d]!\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) ret = media_device_register_entity(dev->media_dev, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) "failed to register input entity %d!\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) * Videobuf2 operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) static int queue_setup(struct vb2_queue *vq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) unsigned int *nbuffers, unsigned int *nplanes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) unsigned int sizes[], struct device *alloc_devs[])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) struct em28xx *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) unsigned long size =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) (v4l2->width * v4l2->height * v4l2->format->depth + 7) >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) if (*nplanes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) return sizes[0] < size ? -EINVAL : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) *nplanes = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) sizes[0] = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) em28xx_enable_analog_tuner(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) buffer_prepare(struct vb2_buffer *vb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) struct em28xx *dev = vb2_get_drv_priv(vb->vb2_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) unsigned long size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) em28xx_videodbg("%s, field=%d\n", __func__, vbuf->field);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) size = (v4l2->width * v4l2->height * v4l2->format->depth + 7) >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) if (vb2_plane_size(vb, 0) < size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) em28xx_videodbg("%s data will not fit into plane (%lu < %lu)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) __func__, vb2_plane_size(vb, 0), size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) vb2_set_plane_payload(vb, 0, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) int em28xx_start_analog_streaming(struct vb2_queue *vq, unsigned int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) struct em28xx *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) struct v4l2_frequency f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) struct v4l2_fh *owner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) em28xx_videodbg("%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) dev->v4l2->field_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) * Make sure streaming is not already in progress for this type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) * of filehandle (e.g. video, vbi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) rc = res_get(dev, vq->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) if (v4l2->streaming_users == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) /* First active streaming user, so allocate all the URBs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) /* Allocate the USB bandwidth */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) em28xx_set_alternate(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) * Needed, since GPIO might have disabled power of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) * some i2c device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) em28xx_wake_i2c(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) v4l2->capture_type = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) rc = em28xx_init_usb_xfer(dev, EM28XX_ANALOG_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) dev->analog_xfer_bulk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) EM28XX_NUM_BUFS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) dev->max_pkt_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) dev->packet_multiplier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) em28xx_urb_data_copy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) * djh: it's not clear whether this code is still needed. I'm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) * leaving it in here for now entirely out of concern for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) * backward compatibility (the old code did it)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) /* Ask tuner to go to analog or radio mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) memset(&f, 0, sizeof(f));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) f.frequency = v4l2->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) owner = (struct v4l2_fh *)vq->owner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) if (owner && owner->vdev->vfl_type == VFL_TYPE_RADIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) f.type = V4L2_TUNER_RADIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) f.type = V4L2_TUNER_ANALOG_TV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) v4l2_device_call_all(&v4l2->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) 0, tuner, s_frequency, &f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) /* Enable video stream at TV decoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) v4l2_device_call_all(&v4l2->v4l2_dev, 0, video, s_stream, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) v4l2->streaming_users++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) static void em28xx_stop_streaming(struct vb2_queue *vq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) struct em28xx *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) struct em28xx_dmaqueue *vidq = &dev->vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) em28xx_videodbg("%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) res_free(dev, vq->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) if (v4l2->streaming_users-- == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) /* Disable video stream at TV decoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) v4l2_device_call_all(&v4l2->v4l2_dev, 0, video, s_stream, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) /* Last active user, so shutdown all the URBS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) em28xx_uninit_usb_xfer(dev, EM28XX_ANALOG_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) spin_lock_irqsave(&dev->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) if (dev->usb_ctl.vid_buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) vb2_buffer_done(&dev->usb_ctl.vid_buf->vb.vb2_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) VB2_BUF_STATE_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) dev->usb_ctl.vid_buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) while (!list_empty(&vidq->active)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) struct em28xx_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) buf = list_entry(vidq->active.next, struct em28xx_buffer, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) list_del(&buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) spin_unlock_irqrestore(&dev->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) void em28xx_stop_vbi_streaming(struct vb2_queue *vq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) struct em28xx *dev = vb2_get_drv_priv(vq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) struct em28xx_dmaqueue *vbiq = &dev->vbiq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) em28xx_videodbg("%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) res_free(dev, vq->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) if (v4l2->streaming_users-- == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) /* Disable video stream at TV decoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) v4l2_device_call_all(&v4l2->v4l2_dev, 0, video, s_stream, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) /* Last active user, so shutdown all the URBS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) em28xx_uninit_usb_xfer(dev, EM28XX_ANALOG_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) spin_lock_irqsave(&dev->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) if (dev->usb_ctl.vbi_buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) vb2_buffer_done(&dev->usb_ctl.vbi_buf->vb.vb2_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) VB2_BUF_STATE_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) dev->usb_ctl.vbi_buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) while (!list_empty(&vbiq->active)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) struct em28xx_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) buf = list_entry(vbiq->active.next, struct em28xx_buffer, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) list_del(&buf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) spin_unlock_irqrestore(&dev->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) buffer_queue(struct vb2_buffer *vb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) struct em28xx *dev = vb2_get_drv_priv(vb->vb2_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) struct em28xx_buffer *buf =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) container_of(vbuf, struct em28xx_buffer, vb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) struct em28xx_dmaqueue *vidq = &dev->vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) em28xx_videodbg("%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) buf->mem = vb2_plane_vaddr(vb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) buf->length = vb2_plane_size(vb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) spin_lock_irqsave(&dev->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) list_add_tail(&buf->list, &vidq->active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) spin_unlock_irqrestore(&dev->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) static const struct vb2_ops em28xx_video_qops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) .queue_setup = queue_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) .buf_prepare = buffer_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) .buf_queue = buffer_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) .start_streaming = em28xx_start_analog_streaming,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) .stop_streaming = em28xx_stop_streaming,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) .wait_prepare = vb2_ops_wait_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) .wait_finish = vb2_ops_wait_finish,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) static int em28xx_vb2_setup(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) struct vb2_queue *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) /* Setup Videobuf2 for Video capture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) q = &v4l2->vb_vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) q->io_modes = VB2_READ | VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) q->drv_priv = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) q->buf_struct_size = sizeof(struct em28xx_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) q->ops = &em28xx_video_qops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) q->mem_ops = &vb2_vmalloc_memops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) rc = vb2_queue_init(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) /* Setup Videobuf2 for VBI capture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) q = &v4l2->vb_vbiq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) q->io_modes = VB2_READ | VB2_MMAP | VB2_USERPTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) q->drv_priv = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) q->buf_struct_size = sizeof(struct em28xx_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) q->ops = &em28xx_vbi_qops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) q->mem_ops = &vb2_vmalloc_memops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) rc = vb2_queue_init(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) * v4l2 interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) static void video_mux(struct em28xx *dev, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) struct v4l2_device *v4l2_dev = &dev->v4l2->v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) dev->ctl_input = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) dev->ctl_ainput = INPUT(index)->amux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) dev->ctl_aoutput = INPUT(index)->aout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) if (!dev->ctl_aoutput)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) dev->ctl_aoutput = EM28XX_AOUT_MASTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) v4l2_device_call_all(v4l2_dev, 0, video, s_routing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) INPUT(index)->vmux, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) if (dev->has_msp34xx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) if (dev->i2s_speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) v4l2_device_call_all(v4l2_dev, 0, audio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) s_i2s_clock_freq, dev->i2s_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) /* Note: this is msp3400 specific */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) v4l2_device_call_all(v4l2_dev, 0, audio, s_routing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) dev->ctl_ainput,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) MSP_OUTPUT(MSP_SC_IN_DSP_SCART1), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) if (dev->board.adecoder != EM28XX_NOADECODER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) v4l2_device_call_all(v4l2_dev, 0, audio, s_routing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) dev->ctl_ainput, dev->ctl_aoutput, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) em28xx_audio_analog_set(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) static void em28xx_ctrl_notify(struct v4l2_ctrl *ctrl, void *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) struct em28xx *dev = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) * In the case of non-AC97 volume controls, we still need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) * to do some setups at em28xx, in order to mute/unmute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) * and to adjust audio volume. However, the value ranges
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) * should be checked by the corresponding V4L subdriver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) case V4L2_CID_AUDIO_MUTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) dev->mute = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) em28xx_audio_analog_set(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) case V4L2_CID_AUDIO_VOLUME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) dev->volume = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) em28xx_audio_analog_set(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) static int em28xx_s_ctrl(struct v4l2_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) struct em28xx_v4l2 *v4l2 =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) container_of(ctrl->handler, struct em28xx_v4l2, ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) struct em28xx *dev = v4l2->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) int ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) switch (ctrl->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) case V4L2_CID_AUDIO_MUTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) dev->mute = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) ret = em28xx_audio_analog_set(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) case V4L2_CID_AUDIO_VOLUME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) dev->volume = ctrl->val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) ret = em28xx_audio_analog_set(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) case V4L2_CID_CONTRAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) ret = em28xx_write_reg(dev, EM28XX_R20_YGAIN, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) case V4L2_CID_BRIGHTNESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) ret = em28xx_write_reg(dev, EM28XX_R21_YOFFSET, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) case V4L2_CID_SATURATION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) ret = em28xx_write_reg(dev, EM28XX_R22_UVGAIN, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) case V4L2_CID_BLUE_BALANCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) ret = em28xx_write_reg(dev, EM28XX_R23_UOFFSET, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) case V4L2_CID_RED_BALANCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) ret = em28xx_write_reg(dev, EM28XX_R24_VOFFSET, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) case V4L2_CID_SHARPNESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) ret = em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, ctrl->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) return (ret < 0) ? ret : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) static const struct v4l2_ctrl_ops em28xx_ctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) .s_ctrl = em28xx_s_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) static void size_to_scale(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) unsigned int width, unsigned int height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) unsigned int *hscale, unsigned int *vscale)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) unsigned int maxw = norm_maxw(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) unsigned int maxh = norm_maxh(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) *hscale = (((unsigned long)maxw) << 12) / width - 4096L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) if (*hscale > EM28XX_HVSCALE_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) *hscale = EM28XX_HVSCALE_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) *vscale = (((unsigned long)maxh) << 12) / height - 4096L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) if (*vscale > EM28XX_HVSCALE_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) *vscale = EM28XX_HVSCALE_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) static void scale_to_size(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) unsigned int hscale, unsigned int vscale,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) unsigned int *width, unsigned int *height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) unsigned int maxw = norm_maxw(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) unsigned int maxh = norm_maxh(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) *width = (((unsigned long)maxw) << 12) / (hscale + 4096L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) *height = (((unsigned long)maxh) << 12) / (vscale + 4096L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) /* Don't let width or height to be zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) if (*width < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) *width = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) if (*height < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) *height = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) * IOCTL vidioc handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) f->fmt.pix.width = v4l2->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) f->fmt.pix.height = v4l2->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) f->fmt.pix.pixelformat = v4l2->format->fourcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) f->fmt.pix.bytesperline = (v4l2->width * v4l2->format->depth + 7) >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * v4l2->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) /* FIXME: TOP? NONE? BOTTOM? ALTENATE? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) if (v4l2->progressive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) f->fmt.pix.field = V4L2_FIELD_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) f->fmt.pix.field = v4l2->interlaced_fieldmode ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) V4L2_FIELD_INTERLACED : V4L2_FIELD_TOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) static struct em28xx_fmt *format_by_fourcc(unsigned int fourcc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) for (i = 0; i < ARRAY_SIZE(format); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) if (format[i].fourcc == fourcc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) return &format[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) unsigned int width = f->fmt.pix.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) unsigned int height = f->fmt.pix.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) unsigned int maxw = norm_maxw(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) unsigned int maxh = norm_maxh(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) unsigned int hscale, vscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) struct em28xx_fmt *fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) fmt = format_by_fourcc(f->fmt.pix.pixelformat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) if (!fmt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) fmt = &format[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) em28xx_videodbg("Fourcc format (%08x) invalid. Using default (%08x).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) f->fmt.pix.pixelformat, fmt->fourcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) if (dev->board.is_em2800) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) /* the em2800 can only scale down to 50% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) height = height > (3 * maxh / 4) ? maxh : maxh / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) width = width > (3 * maxw / 4) ? maxw : maxw / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) * MaxPacketSize for em2800 is too small to capture at full
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) * resolution use half of maxw as the scaler can only scale
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) * to 50%
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) if (width == maxw && height == maxh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) width /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) * width must even because of the YUYV format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) * height must be even because of interlacing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) v4l_bound_align_image(&width, 48, maxw, 1, &height, 32, maxh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) /* Avoid division by zero at size_to_scale */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) if (width < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) width = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) if (height < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) height = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) size_to_scale(dev, width, height, &hscale, &vscale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) scale_to_size(dev, hscale, vscale, &width, &height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) f->fmt.pix.width = width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) f->fmt.pix.height = height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) f->fmt.pix.pixelformat = fmt->fourcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) f->fmt.pix.bytesperline = (width * fmt->depth + 7) >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) if (v4l2->progressive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) f->fmt.pix.field = V4L2_FIELD_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) f->fmt.pix.field = v4l2->interlaced_fieldmode ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) V4L2_FIELD_INTERLACED : V4L2_FIELD_TOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) static int em28xx_set_video_format(struct em28xx *dev, unsigned int fourcc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) unsigned int width, unsigned int height)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) struct em28xx_fmt *fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) fmt = format_by_fourcc(fourcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) if (!fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) v4l2->format = fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) v4l2->width = width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) v4l2->height = height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) /* set new image size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) size_to_scale(dev, v4l2->width, v4l2->height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) &v4l2->hscale, &v4l2->vscale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) em28xx_resolution_set(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) struct v4l2_format *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) if (vb2_is_busy(&v4l2->vb_vidq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) vidioc_try_fmt_vid_cap(file, priv, f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) return em28xx_set_video_format(dev, f->fmt.pix.pixelformat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) f->fmt.pix.width, f->fmt.pix.height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *norm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) *norm = dev->v4l2->norm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *norm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) v4l2_device_call_all(&dev->v4l2->v4l2_dev, 0, video, querystd, norm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id norm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) struct v4l2_format f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) if (norm == v4l2->norm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) if (v4l2->streaming_users > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) v4l2->norm = norm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) /* Adjusts width/height, if needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) f.fmt.pix.width = 720;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) f.fmt.pix.height = (norm & V4L2_STD_525_60) ? 480 : 576;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) vidioc_try_fmt_vid_cap(file, priv, &f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) /* set new image size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) v4l2->width = f.fmt.pix.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) v4l2->height = f.fmt.pix.height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) size_to_scale(dev, v4l2->width, v4l2->height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) &v4l2->hscale, &v4l2->vscale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) em28xx_resolution_set(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) v4l2_device_call_all(&v4l2->v4l2_dev, 0, video, s_std, v4l2->norm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) static int vidioc_g_parm(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) struct v4l2_streamparm *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) struct v4l2_subdev_frame_interval ival = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) if (p->type != V4L2_BUF_TYPE_VIDEO_CAPTURE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) p->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) p->parm.capture.readbuffers = EM28XX_MIN_BUF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) p->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) if (dev->is_webcam) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) rc = v4l2_device_call_until_err(&v4l2->v4l2_dev, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) video, g_frame_interval, &ival);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) if (!rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) p->parm.capture.timeperframe = ival.interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) v4l2_video_std_frame_period(v4l2->norm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) &p->parm.capture.timeperframe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) static int vidioc_s_parm(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) struct v4l2_streamparm *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) struct v4l2_subdev_frame_interval ival = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) p->parm.capture.timeperframe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) if (!dev->is_webcam)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) return -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) if (p->type != V4L2_BUF_TYPE_VIDEO_CAPTURE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) p->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) memset(&p->parm, 0, sizeof(p->parm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) p->parm.capture.readbuffers = EM28XX_MIN_BUF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) p->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) rc = v4l2_device_call_until_err(&dev->v4l2->v4l2_dev, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) video, s_frame_interval, &ival);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) if (!rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) p->parm.capture.timeperframe = ival.interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) static int vidioc_enum_input(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) struct v4l2_input *i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) unsigned int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) n = i->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) if (n >= MAX_EM28XX_INPUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) if (!INPUT(n)->type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) i->type = V4L2_INPUT_TYPE_CAMERA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) strscpy(i->name, iname[INPUT(n)->type], sizeof(i->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) if (INPUT(n)->type == EM28XX_VMUX_TELEVISION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) i->type = V4L2_INPUT_TYPE_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) i->std = dev->v4l2->vdev.tvnorms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) /* webcams do not have the STD API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) if (dev->is_webcam)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) i->capabilities = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) /* Dynamically generates an audioset bitmask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) i->audioset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) for (j = 0; j < MAX_EM28XX_INPUT; j++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) if (dev->amux_map[j] != EM28XX_AMUX_UNUSED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) i->audioset |= 1 << j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) *i = dev->ctl_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) if (i >= MAX_EM28XX_INPUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) if (!INPUT(i)->type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) video_mux(dev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) static int em28xx_fill_audio_input(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) const char *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) struct v4l2_audio *a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) unsigned int idx = dev->amux_map[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) * With msp3400, almost all mappings use the default (amux = 0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) * The only one may use a different value is WinTV USB2, where it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) * can also be SCART1 input.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) * As it is very doubtful that we would see new boards with msp3400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) * let's just reuse the existing switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) if (dev->has_msp34xx && idx != EM28XX_AMUX_UNUSED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) idx = EM28XX_AMUX_LINE_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) switch (idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) case EM28XX_AMUX_VIDEO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) strscpy(a->name, "Television", sizeof(a->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) case EM28XX_AMUX_LINE_IN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) strscpy(a->name, "Line In", sizeof(a->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) case EM28XX_AMUX_VIDEO2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) strscpy(a->name, "Television alt", sizeof(a->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) case EM28XX_AMUX_PHONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) strscpy(a->name, "Phone", sizeof(a->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) case EM28XX_AMUX_MIC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) strscpy(a->name, "Mic", sizeof(a->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) case EM28XX_AMUX_CD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) strscpy(a->name, "CD", sizeof(a->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) case EM28XX_AMUX_AUX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) strscpy(a->name, "Aux", sizeof(a->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) case EM28XX_AMUX_PCM_OUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) strscpy(a->name, "PCM", sizeof(a->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) case EM28XX_AMUX_UNUSED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) a->index = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) a->capability = V4L2_AUDCAP_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) em28xx_videodbg("%s: audio input index %d is '%s'\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) s, a->index, a->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) static int vidioc_enumaudio(struct file *file, void *fh, struct v4l2_audio *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) if (a->index >= MAX_EM28XX_INPUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) return em28xx_fill_audio_input(dev, __func__, a, a->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) static int vidioc_g_audio(struct file *file, void *priv, struct v4l2_audio *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) for (i = 0; i < MAX_EM28XX_INPUT; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) if (dev->ctl_ainput == dev->amux_map[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) return em28xx_fill_audio_input(dev, __func__, a, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) /* Should never happen! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) static int vidioc_s_audio(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) const struct v4l2_audio *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) int idx, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) if (a->index >= MAX_EM28XX_INPUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) idx = dev->amux_map[a->index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) if (idx == EM28XX_AMUX_UNUSED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) dev->ctl_ainput = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) * FIXME: This is wrong, as different inputs at em28xx_cards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) * may have different audio outputs. So, the right thing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) * to do is to implement VIDIOC_G_AUDOUT/VIDIOC_S_AUDOUT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) * With the current board definitions, this would work fine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) * as, currently, all boards fit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) for (i = 0; i < MAX_EM28XX_INPUT; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) if (idx == dev->amux_map[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) if (i == MAX_EM28XX_INPUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) dev->ctl_aoutput = INPUT(i)->aout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) if (!dev->ctl_aoutput)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) dev->ctl_aoutput = EM28XX_AOUT_MASTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) em28xx_videodbg("%s: set audio input to %d\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) dev->ctl_ainput);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) static int vidioc_g_tuner(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) struct v4l2_tuner *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) if (t->index != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) strscpy(t->name, "Tuner", sizeof(t->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) v4l2_device_call_all(&dev->v4l2->v4l2_dev, 0, tuner, g_tuner, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) static int vidioc_s_tuner(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) const struct v4l2_tuner *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) if (t->index != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) v4l2_device_call_all(&dev->v4l2->v4l2_dev, 0, tuner, s_tuner, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) static int vidioc_g_frequency(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) struct v4l2_frequency *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) if (f->tuner != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) f->frequency = v4l2->frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) static int vidioc_s_frequency(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) const struct v4l2_frequency *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) struct v4l2_frequency new_freq = *f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) if (f->tuner != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) v4l2_device_call_all(&v4l2->v4l2_dev, 0, tuner, s_frequency, f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) v4l2_device_call_all(&v4l2->v4l2_dev, 0, tuner, g_frequency, &new_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) v4l2->frequency = new_freq.frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) #ifdef CONFIG_VIDEO_ADV_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) static int vidioc_g_chip_info(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) struct v4l2_dbg_chip_info *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) if (chip->match.addr > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) if (chip->match.addr == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) strscpy(chip->name, "ac97", sizeof(chip->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) strscpy(chip->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) dev->v4l2->v4l2_dev.name, sizeof(chip->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) static int em28xx_reg_len(int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) case EM28XX_R40_AC97LSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) case EM28XX_R30_HSCALELOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) case EM28XX_R32_VSCALELOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) return 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) static int vidioc_g_register(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) struct v4l2_dbg_register *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) if (reg->match.addr > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) if (reg->match.addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) ret = em28xx_read_ac97(dev, reg->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) reg->val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) reg->size = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) /* Match host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) reg->size = em28xx_reg_len(reg->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) if (reg->size == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) ret = em28xx_read_reg(dev, reg->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) reg->val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) __le16 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) ret = dev->em28xx_read_reg_req_len(dev, USB_REQ_GET_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) reg->reg, (char *)&val, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) reg->val = le16_to_cpu(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) static int vidioc_s_register(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) const struct v4l2_dbg_register *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) __le16 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) if (reg->match.addr > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) if (reg->match.addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) return em28xx_write_ac97(dev, reg->reg, reg->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) /* Match host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) buf = cpu_to_le16(reg->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) return em28xx_write_regs(dev, reg->reg, (char *)&buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) em28xx_reg_len(reg->reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) static int vidioc_querycap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) struct v4l2_capability *cap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) struct usb_device *udev = interface_to_usbdev(dev->intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) strscpy(cap->driver, "em28xx", sizeof(cap->driver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) strscpy(cap->card, em28xx_boards[dev->model].name, sizeof(cap->card));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) usb_make_path(udev, cap->bus_info, sizeof(cap->bus_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_READWRITE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) if (dev->int_audio_type != EM28XX_INT_AUDIO_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) cap->capabilities |= V4L2_CAP_AUDIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) if (dev->tuner_type != TUNER_ABSENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) cap->capabilities |= V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) if (video_is_registered(&v4l2->vbi_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) cap->capabilities |= V4L2_CAP_VBI_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) if (video_is_registered(&v4l2->radio_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) cap->capabilities |= V4L2_CAP_RADIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) struct v4l2_fmtdesc *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) if (unlikely(f->index >= ARRAY_SIZE(format)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) f->pixelformat = format[f->index].fourcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) static int vidioc_enum_framesizes(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) struct v4l2_frmsizeenum *fsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) struct em28xx_fmt *fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) unsigned int maxw = norm_maxw(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) unsigned int maxh = norm_maxh(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) fmt = format_by_fourcc(fsize->pixel_format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) if (!fmt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) em28xx_videodbg("Fourcc format (%08x) invalid.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) fsize->pixel_format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) if (dev->board.is_em2800) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) if (fsize->index > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) fsize->discrete.width = maxw / (1 + fsize->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) fsize->discrete.height = maxh / (1 + fsize->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) if (fsize->index != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) /* Report a continuous range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) scale_to_size(dev, EM28XX_HVSCALE_MAX, EM28XX_HVSCALE_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) &fsize->stepwise.min_width, &fsize->stepwise.min_height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) if (fsize->stepwise.min_width < 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) fsize->stepwise.min_width = 48;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) if (fsize->stepwise.min_height < 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) fsize->stepwise.min_height = 38;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) fsize->stepwise.max_width = maxw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) fsize->stepwise.max_height = maxh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) fsize->stepwise.step_width = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) fsize->stepwise.step_height = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) /* RAW VBI ioctls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) struct v4l2_format *format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) format->fmt.vbi.samples_per_line = v4l2->vbi_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) format->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) format->fmt.vbi.offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) format->fmt.vbi.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) format->fmt.vbi.sampling_rate = 6750000 * 4 / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) format->fmt.vbi.count[0] = v4l2->vbi_height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) format->fmt.vbi.count[1] = v4l2->vbi_height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) memset(format->fmt.vbi.reserved, 0, sizeof(format->fmt.vbi.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) /* Varies by video standard (NTSC, PAL, etc.) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) if (v4l2->norm & V4L2_STD_525_60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) /* NTSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) format->fmt.vbi.start[0] = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) format->fmt.vbi.start[1] = 273;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) } else if (v4l2->norm & V4L2_STD_625_50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) /* PAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) format->fmt.vbi.start[0] = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) format->fmt.vbi.start[1] = 318;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) * RADIO ESPECIFIC IOCTLS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) static int radio_g_tuner(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) struct v4l2_tuner *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) if (unlikely(t->index > 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) strscpy(t->name, "Radio", sizeof(t->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) v4l2_device_call_all(&dev->v4l2->v4l2_dev, 0, tuner, g_tuner, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) static int radio_s_tuner(struct file *file, void *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) const struct v4l2_tuner *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) struct em28xx *dev = video_drvdata(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) if (t->index != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) v4l2_device_call_all(&dev->v4l2->v4l2_dev, 0, tuner, s_tuner, t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) * em28xx_free_v4l2() - Free struct em28xx_v4l2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) * @ref: struct kref for struct em28xx_v4l2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) * Called when all users of struct em28xx_v4l2 are gone
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) static void em28xx_free_v4l2(struct kref *ref)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) struct em28xx_v4l2 *v4l2 = container_of(ref, struct em28xx_v4l2, ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) v4l2->dev->v4l2 = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) kfree(v4l2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) * em28xx_v4l2_open()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) * inits the device and starts isoc transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) static int em28xx_v4l2_open(struct file *filp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) struct video_device *vdev = video_devdata(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) struct em28xx *dev = video_drvdata(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) enum v4l2_buf_type fh_type = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) switch (vdev->vfl_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) case VFL_TYPE_VIDEO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) case VFL_TYPE_VBI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) case VFL_TYPE_RADIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) em28xx_videodbg("open dev=%s type=%s users=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) video_device_node_name(vdev), v4l2_type_names[fh_type],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) v4l2->users);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) if (mutex_lock_interruptible(&dev->lock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) return -ERESTARTSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) ret = v4l2_fh_open(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) "%s: v4l2_fh_open() returned error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) if (v4l2->users == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) em28xx_set_mode(dev, EM28XX_ANALOG_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) if (vdev->vfl_type != VFL_TYPE_RADIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) em28xx_resolution_set(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) * Needed, since GPIO might have disabled power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) * of some i2c devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) em28xx_wake_i2c(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) if (vdev->vfl_type == VFL_TYPE_RADIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) em28xx_videodbg("video_open: setting radio device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) v4l2_device_call_all(&v4l2->v4l2_dev, 0, tuner, s_radio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) kref_get(&dev->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) kref_get(&v4l2->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) v4l2->users++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) * em28xx_v4l2_fini()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) * unregisters the v4l2,i2c and usb devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) * called when the device gets disconnected or at module unload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) static int em28xx_v4l2_fini(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) if (dev->is_audio_only) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) /* Shouldn't initialize IR for this interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) if (!dev->has_video) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) /* This device does not support the v4l2 extension */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) if (!v4l2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) dev_info(&dev->intf->dev, "Closing video extension\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) mutex_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) v4l2_device_disconnect(&v4l2->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) em28xx_uninit_usb_xfer(dev, EM28XX_ANALOG_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) em28xx_v4l2_media_release(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) if (video_is_registered(&v4l2->radio_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) dev_info(&dev->intf->dev, "V4L2 device %s deregistered\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) video_device_node_name(&v4l2->radio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) video_unregister_device(&v4l2->radio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) if (video_is_registered(&v4l2->vbi_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) dev_info(&dev->intf->dev, "V4L2 device %s deregistered\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) video_device_node_name(&v4l2->vbi_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) video_unregister_device(&v4l2->vbi_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) if (video_is_registered(&v4l2->vdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) dev_info(&dev->intf->dev, "V4L2 device %s deregistered\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) video_device_node_name(&v4l2->vdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) video_unregister_device(&v4l2->vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) v4l2_ctrl_handler_free(&v4l2->ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) v4l2_device_unregister(&v4l2->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) kref_put(&v4l2->ref, em28xx_free_v4l2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) kref_put(&dev->ref, em28xx_free_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) static int em28xx_v4l2_suspend(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) if (dev->is_audio_only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) if (!dev->has_video)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) dev_info(&dev->intf->dev, "Suspending video extension\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) em28xx_stop_urbs(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) static int em28xx_v4l2_resume(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) if (dev->is_audio_only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) if (!dev->has_video)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) dev_info(&dev->intf->dev, "Resuming video extension\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) /* what do we do here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) * em28xx_v4l2_close()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) * stops streaming and deallocates all resources allocated by the v4l2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) * calls and ioctls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) static int em28xx_v4l2_close(struct file *filp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) struct em28xx *dev = video_drvdata(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) struct usb_device *udev = interface_to_usbdev(dev->intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) em28xx_videodbg("users=%d\n", v4l2->users);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) vb2_fop_release(filp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) mutex_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) if (v4l2->users == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) /* No sense to try to write to the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) if (dev->disconnected)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) /* Save some power by putting tuner to sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) v4l2_device_call_all(&v4l2->v4l2_dev, 0, tuner, standby);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) /* do this before setting alternate! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) em28xx_set_mode(dev, EM28XX_SUSPEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) /* set alternate 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) dev->alt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) em28xx_videodbg("setting alternate 0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) err = usb_set_interface(udev, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) "cannot change alternate number to 0 (error=%i)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) v4l2->users--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) kref_put(&v4l2->ref, em28xx_free_v4l2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) kref_put(&dev->ref, em28xx_free_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) static const struct v4l2_file_operations em28xx_v4l_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) .open = em28xx_v4l2_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) .release = em28xx_v4l2_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) .read = vb2_fop_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) .poll = vb2_fop_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) .mmap = vb2_fop_mmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) .unlocked_ioctl = video_ioctl2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) static const struct v4l2_ioctl_ops video_ioctl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) .vidioc_querycap = vidioc_querycap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) .vidioc_g_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) .vidioc_try_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) .vidioc_s_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) .vidioc_enum_framesizes = vidioc_enum_framesizes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) .vidioc_enumaudio = vidioc_enumaudio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) .vidioc_g_audio = vidioc_g_audio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) .vidioc_s_audio = vidioc_s_audio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) .vidioc_reqbufs = vb2_ioctl_reqbufs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) .vidioc_create_bufs = vb2_ioctl_create_bufs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) .vidioc_querybuf = vb2_ioctl_querybuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) .vidioc_qbuf = vb2_ioctl_qbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) .vidioc_dqbuf = vb2_ioctl_dqbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) .vidioc_g_std = vidioc_g_std,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) .vidioc_querystd = vidioc_querystd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) .vidioc_s_std = vidioc_s_std,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) .vidioc_g_parm = vidioc_g_parm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) .vidioc_s_parm = vidioc_s_parm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) .vidioc_enum_input = vidioc_enum_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) .vidioc_g_input = vidioc_g_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) .vidioc_s_input = vidioc_s_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) .vidioc_streamon = vb2_ioctl_streamon,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) .vidioc_streamoff = vb2_ioctl_streamoff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) .vidioc_g_tuner = vidioc_g_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) .vidioc_s_tuner = vidioc_s_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) .vidioc_g_frequency = vidioc_g_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) .vidioc_s_frequency = vidioc_s_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) #ifdef CONFIG_VIDEO_ADV_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) .vidioc_g_chip_info = vidioc_g_chip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) .vidioc_g_register = vidioc_g_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) .vidioc_s_register = vidioc_s_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) static const struct video_device em28xx_video_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) .fops = &em28xx_v4l_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) .ioctl_ops = &video_ioctl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) .release = video_device_release_empty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) .tvnorms = V4L2_STD_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) static const struct v4l2_file_operations radio_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) .open = em28xx_v4l2_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) .release = em28xx_v4l2_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) .unlocked_ioctl = video_ioctl2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) static const struct v4l2_ioctl_ops radio_ioctl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) .vidioc_querycap = vidioc_querycap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) .vidioc_g_tuner = radio_g_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) .vidioc_s_tuner = radio_s_tuner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) .vidioc_g_frequency = vidioc_g_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) .vidioc_s_frequency = vidioc_s_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) #ifdef CONFIG_VIDEO_ADV_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) .vidioc_g_chip_info = vidioc_g_chip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) .vidioc_g_register = vidioc_g_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) .vidioc_s_register = vidioc_s_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) static struct video_device em28xx_radio_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) .fops = &radio_fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) .ioctl_ops = &radio_ioctl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) .release = video_device_release_empty,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) /* I2C possible address to saa7115, tvp5150, msp3400, tvaudio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) static unsigned short saa711x_addrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) 0x4a >> 1, 0x48 >> 1, /* SAA7111, SAA7111A and SAA7113 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) 0x42 >> 1, 0x40 >> 1, /* SAA7114, SAA7115 and SAA7118 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) I2C_CLIENT_END };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) static unsigned short tvp5150_addrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) 0xb8 >> 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) 0xba >> 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) I2C_CLIENT_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) static unsigned short msp3400_addrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) 0x80 >> 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) 0x88 >> 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) I2C_CLIENT_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) /******************************** usb interface ******************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) static void em28xx_vdev_init(struct em28xx *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) struct video_device *vfd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) const struct video_device *template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) const char *type_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) *vfd = *template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) vfd->v4l2_dev = &dev->v4l2->v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) vfd->lock = &dev->lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) if (dev->is_webcam)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) vfd->tvnorms = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) snprintf(vfd->name, sizeof(vfd->name), "%s %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) dev_name(&dev->intf->dev), type_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) video_set_drvdata(vfd, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) static void em28xx_tuner_setup(struct em28xx *dev, unsigned short tuner_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) struct em28xx_v4l2 *v4l2 = dev->v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) struct v4l2_device *v4l2_dev = &v4l2->v4l2_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) struct tuner_setup tun_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) struct v4l2_frequency f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) memset(&tun_setup, 0, sizeof(tun_setup));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) tun_setup.mode_mask = T_ANALOG_TV | T_RADIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) tun_setup.tuner_callback = em28xx_tuner_callback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) if (dev->board.radio.type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) tun_setup.type = dev->board.radio.type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) tun_setup.addr = dev->board.radio_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) v4l2_device_call_all(v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) 0, tuner, s_type_addr, &tun_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) if (dev->tuner_type != TUNER_ABSENT && dev->tuner_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) tun_setup.type = dev->tuner_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) tun_setup.addr = tuner_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) v4l2_device_call_all(v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) 0, tuner, s_type_addr, &tun_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) if (dev->board.tda9887_conf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) struct v4l2_priv_tun_config tda9887_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) tda9887_cfg.tuner = TUNER_TDA9887;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) tda9887_cfg.priv = &dev->board.tda9887_conf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) v4l2_device_call_all(v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) 0, tuner, s_config, &tda9887_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) if (dev->tuner_type == TUNER_XC2028) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) struct v4l2_priv_tun_config xc2028_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) struct xc2028_ctrl ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) memset(&xc2028_cfg, 0, sizeof(xc2028_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) memset(&ctl, 0, sizeof(ctl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) em28xx_setup_xc3028(dev, &ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) xc2028_cfg.tuner = TUNER_XC2028;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) xc2028_cfg.priv = &ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) v4l2_device_call_all(v4l2_dev, 0, tuner, s_config, &xc2028_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) /* configure tuner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) f.tuner = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) f.type = V4L2_TUNER_ANALOG_TV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) f.frequency = 9076; /* just a magic number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) v4l2->frequency = f.frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) v4l2_device_call_all(v4l2_dev, 0, tuner, s_frequency, &f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) static int em28xx_v4l2_init(struct em28xx *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) unsigned int maxw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) struct v4l2_ctrl_handler *hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) struct em28xx_v4l2 *v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) if (dev->is_audio_only) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) /* Shouldn't initialize IR for this interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) if (!dev->has_video) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) /* This device does not support the v4l2 extension */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) dev_info(&dev->intf->dev, "Registering V4L2 extension\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) mutex_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) v4l2 = kzalloc(sizeof(*v4l2), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) if (!v4l2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) kref_init(&v4l2->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) v4l2->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) dev->v4l2 = v4l2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) #ifdef CONFIG_MEDIA_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) v4l2->v4l2_dev.mdev = dev->media_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) ret = v4l2_device_register(&dev->intf->dev, &v4l2->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) "Call to v4l2_device_register() failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) hdl = &v4l2->ctrl_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) v4l2_ctrl_handler_init(hdl, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) v4l2->v4l2_dev.ctrl_handler = hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) if (dev->is_webcam)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) v4l2->progressive = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) * Default format, used for tvp5150 or saa711x output formats
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) v4l2->vinmode = EM28XX_VINMODE_YUV422_CbYCrY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) v4l2->vinctl = EM28XX_VINCTRL_INTERLACED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) EM28XX_VINCTRL_CCIR656_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) /* request some modules */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) if (dev->has_msp34xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) v4l2_i2c_new_subdev(&v4l2->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) &dev->i2c_adap[dev->def_i2c_bus],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) "msp3400", 0, msp3400_addrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) if (dev->board.decoder == EM28XX_SAA711X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) v4l2_i2c_new_subdev(&v4l2->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) &dev->i2c_adap[dev->def_i2c_bus],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) "saa7115_auto", 0, saa711x_addrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) if (dev->board.decoder == EM28XX_TVP5150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) v4l2_i2c_new_subdev(&v4l2->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) &dev->i2c_adap[dev->def_i2c_bus],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) "tvp5150", 0, tvp5150_addrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) if (dev->board.adecoder == EM28XX_TVAUDIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) v4l2_i2c_new_subdev(&v4l2->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) &dev->i2c_adap[dev->def_i2c_bus],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) "tvaudio", dev->board.tvaudio_addr, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) /* Initialize tuner and camera */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) if (dev->board.tuner_type != TUNER_ABSENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) unsigned short tuner_addr = dev->board.tuner_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) int has_demod = (dev->board.tda9887_conf & TDA9887_PRESENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) if (dev->board.radio.type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) v4l2_i2c_new_subdev(&v4l2->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) &dev->i2c_adap[dev->def_i2c_bus],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) "tuner", dev->board.radio_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) if (has_demod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) v4l2_i2c_new_subdev(&v4l2->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) &dev->i2c_adap[dev->def_i2c_bus],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) "tuner", 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) v4l2_i2c_tuner_addrs(ADDRS_DEMOD));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) if (tuner_addr == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) enum v4l2_i2c_tuner_type type =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) has_demod ? ADDRS_TV_WITH_DEMOD : ADDRS_TV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) struct v4l2_subdev *sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) sd = v4l2_i2c_new_subdev(&v4l2->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) &dev->i2c_adap[dev->def_i2c_bus],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) "tuner", 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) v4l2_i2c_tuner_addrs(type));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) if (sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) tuner_addr = v4l2_i2c_subdev_addr(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) v4l2_i2c_new_subdev(&v4l2->v4l2_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) &dev->i2c_adap[dev->def_i2c_bus],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) "tuner", tuner_addr, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) em28xx_tuner_setup(dev, tuner_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) if (dev->em28xx_sensor != EM28XX_NOSENSOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) em28xx_init_camera(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) /* Configure audio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) ret = em28xx_audio_setup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) "%s: Error while setting audio - error [%d]!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) v4l2_ctrl_new_std(hdl, &em28xx_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) V4L2_CID_AUDIO_MUTE, 0, 1, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) v4l2_ctrl_new_std(hdl, &em28xx_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) V4L2_CID_AUDIO_VOLUME, 0, 0x1f, 1, 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) /* install the em28xx notify callback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) v4l2_ctrl_notify(v4l2_ctrl_find(hdl, V4L2_CID_AUDIO_MUTE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) em28xx_ctrl_notify, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) v4l2_ctrl_notify(v4l2_ctrl_find(hdl, V4L2_CID_AUDIO_VOLUME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) em28xx_ctrl_notify, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) /* wake i2c devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) em28xx_wake_i2c(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) /* init video dma queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) INIT_LIST_HEAD(&dev->vidq.active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) INIT_LIST_HEAD(&dev->vbiq.active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) if (dev->has_msp34xx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) /* Send a reset to other chips via gpio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) ret = em28xx_write_reg(dev, EM2820_R08_GPIO_CTRL, 0xf7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) "%s: em28xx_write_reg - msp34xx(1) failed! error [%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) ret = em28xx_write_reg(dev, EM2820_R08_GPIO_CTRL, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) "%s: em28xx_write_reg - msp34xx(2) failed! error [%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) usleep_range(10000, 11000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) /* set default norm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) v4l2->norm = V4L2_STD_PAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) v4l2_device_call_all(&v4l2->v4l2_dev, 0, video, s_std, v4l2->norm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) v4l2->interlaced_fieldmode = EM28XX_INTERLACED_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) /* Analog specific initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) v4l2->format = &format[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) maxw = norm_maxw(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) * MaxPacketSize for em2800 is too small to capture at full resolution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) * use half of maxw as the scaler can only scale to 50%
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) if (dev->board.is_em2800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) maxw /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) em28xx_set_video_format(dev, format[0].fourcc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) maxw, norm_maxh(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) video_mux(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) /* Audio defaults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) dev->mute = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) dev->volume = 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) /* em28xx_write_reg(dev, EM28XX_R0E_AUDIOSRC, 0xc0); audio register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) val = (u8)em28xx_read_reg(dev, EM28XX_R0F_XCLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) em28xx_write_reg(dev, EM28XX_R0F_XCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) (EM28XX_XCLK_AUDIO_UNMUTE | val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) em28xx_set_outfmt(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) /* Add image controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) * NOTE: at this point, the subdevices are already registered, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) * bridge controls are only added/enabled when no subdevice provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) * them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) if (!v4l2_ctrl_find(hdl, V4L2_CID_CONTRAST))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) v4l2_ctrl_new_std(hdl, &em28xx_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) V4L2_CID_CONTRAST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) 0, 0x1f, 1, CONTRAST_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) if (!v4l2_ctrl_find(hdl, V4L2_CID_BRIGHTNESS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) v4l2_ctrl_new_std(hdl, &em28xx_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) V4L2_CID_BRIGHTNESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) -0x80, 0x7f, 1, BRIGHTNESS_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) if (!v4l2_ctrl_find(hdl, V4L2_CID_SATURATION))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) v4l2_ctrl_new_std(hdl, &em28xx_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) V4L2_CID_SATURATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) 0, 0x1f, 1, SATURATION_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) if (!v4l2_ctrl_find(hdl, V4L2_CID_BLUE_BALANCE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) v4l2_ctrl_new_std(hdl, &em28xx_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) V4L2_CID_BLUE_BALANCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) -0x30, 0x30, 1, BLUE_BALANCE_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) if (!v4l2_ctrl_find(hdl, V4L2_CID_RED_BALANCE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) v4l2_ctrl_new_std(hdl, &em28xx_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) V4L2_CID_RED_BALANCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) -0x30, 0x30, 1, RED_BALANCE_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) if (!v4l2_ctrl_find(hdl, V4L2_CID_SHARPNESS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) v4l2_ctrl_new_std(hdl, &em28xx_ctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) V4L2_CID_SHARPNESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) 0, 0x0f, 1, SHARPNESS_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) /* Reset image controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) em28xx_colorlevels_set_default(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) v4l2_ctrl_handler_setup(hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) ret = hdl->error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) /* allocate and fill video video_device struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) em28xx_vdev_init(dev, &v4l2->vdev, &em28xx_video_template, "video");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) mutex_init(&v4l2->vb_queue_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) mutex_init(&v4l2->vb_vbi_queue_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) v4l2->vdev.queue = &v4l2->vb_vidq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) v4l2->vdev.queue->lock = &v4l2->vb_queue_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) v4l2->vdev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_VIDEO_CAPTURE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) V4L2_CAP_STREAMING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) if (dev->int_audio_type != EM28XX_INT_AUDIO_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) v4l2->vdev.device_caps |= V4L2_CAP_AUDIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) if (dev->tuner_type != TUNER_ABSENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) v4l2->vdev.device_caps |= V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) /* disable inapplicable ioctls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) if (dev->is_webcam) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_QUERYSTD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_G_STD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_S_STD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_S_PARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) if (dev->tuner_type == TUNER_ABSENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_G_TUNER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_S_TUNER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_G_FREQUENCY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_S_FREQUENCY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_G_AUDIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) v4l2_disable_ioctl(&v4l2->vdev, VIDIOC_S_AUDIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) /* register v4l2 video video_device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) ret = video_register_device(&v4l2->vdev, VFL_TYPE_VIDEO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) video_nr[dev->devno]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) "unable to register video device (error=%i).\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) /* Allocate and fill vbi video_device struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) if (em28xx_vbi_supported(dev) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) em28xx_vdev_init(dev, &v4l2->vbi_dev, &em28xx_video_template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) "vbi");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) v4l2->vbi_dev.queue = &v4l2->vb_vbiq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) v4l2->vbi_dev.queue->lock = &v4l2->vb_vbi_queue_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) v4l2->vbi_dev.device_caps = V4L2_CAP_STREAMING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) V4L2_CAP_READWRITE | V4L2_CAP_VBI_CAPTURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) if (dev->tuner_type != TUNER_ABSENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) v4l2->vbi_dev.device_caps |= V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) /* disable inapplicable ioctls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) v4l2_disable_ioctl(&v4l2->vbi_dev, VIDIOC_S_PARM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) if (dev->tuner_type == TUNER_ABSENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) v4l2_disable_ioctl(&v4l2->vbi_dev, VIDIOC_G_TUNER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) v4l2_disable_ioctl(&v4l2->vbi_dev, VIDIOC_S_TUNER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) v4l2_disable_ioctl(&v4l2->vbi_dev, VIDIOC_G_FREQUENCY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) v4l2_disable_ioctl(&v4l2->vbi_dev, VIDIOC_S_FREQUENCY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) v4l2_disable_ioctl(&v4l2->vbi_dev, VIDIOC_G_AUDIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) v4l2_disable_ioctl(&v4l2->vbi_dev, VIDIOC_S_AUDIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) /* register v4l2 vbi video_device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) ret = video_register_device(&v4l2->vbi_dev, VFL_TYPE_VBI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) vbi_nr[dev->devno]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) "unable to register vbi device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) if (em28xx_boards[dev->model].radio.type == EM28XX_RADIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) em28xx_vdev_init(dev, &v4l2->radio_dev, &em28xx_radio_template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) "radio");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) v4l2->radio_dev.device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) ret = video_register_device(&v4l2->radio_dev, VFL_TYPE_RADIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) radio_nr[dev->devno]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) "can't register radio device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) dev_info(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) "Registered radio device as %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) video_device_node_name(&v4l2->radio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) /* Init entities at the Media Controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) em28xx_v4l2_create_entities(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) #ifdef CONFIG_MEDIA_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) ret = v4l2_mc_create_media_graph(dev->media_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) dev_err(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) "failed to create media graph\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) em28xx_v4l2_media_release(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) goto unregister_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) dev_info(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) "V4L2 video device registered as %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) video_device_node_name(&v4l2->vdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) if (video_is_registered(&v4l2->vbi_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) dev_info(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) "V4L2 VBI device registered as %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) video_device_node_name(&v4l2->vbi_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) /* Save some power by putting tuner to sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) v4l2_device_call_all(&v4l2->v4l2_dev, 0, tuner, standby);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) /* initialize videobuf2 stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) em28xx_vb2_setup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) dev_info(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) "V4L2 extension successfully initialized\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) kref_get(&dev->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) unregister_dev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) if (video_is_registered(&v4l2->radio_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) dev_info(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) "V4L2 device %s deregistered\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) video_device_node_name(&v4l2->radio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) video_unregister_device(&v4l2->radio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) if (video_is_registered(&v4l2->vbi_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) dev_info(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) "V4L2 device %s deregistered\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) video_device_node_name(&v4l2->vbi_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) video_unregister_device(&v4l2->vbi_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) if (video_is_registered(&v4l2->vdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) dev_info(&dev->intf->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) "V4L2 device %s deregistered\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) video_device_node_name(&v4l2->vdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) video_unregister_device(&v4l2->vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) v4l2_ctrl_handler_free(&v4l2->ctrl_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) v4l2_device_unregister(&v4l2->v4l2_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) dev->v4l2 = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) kref_put(&v4l2->ref, em28xx_free_v4l2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) mutex_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) static struct em28xx_ops v4l2_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) .id = EM28XX_V4L2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) .name = "Em28xx v4l2 Extension",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) .init = em28xx_v4l2_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) .fini = em28xx_v4l2_fini,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) .suspend = em28xx_v4l2_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) .resume = em28xx_v4l2_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) static int __init em28xx_video_register(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) return em28xx_register_extension(&v4l2_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) static void __exit em28xx_video_unregister(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) em28xx_unregister_extension(&v4l2_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) module_init(em28xx_video_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) module_exit(em28xx_video_unregister);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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