Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /* Common header-file of the Linux driver for the TwinhanDTV Alpha/MagicBoxII
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * USB2.0 DVB-T receiver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Thanks to Twinhan who kindly provided hardware and information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef _DVB_USB_VP7045_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define _DVB_USB_VP7045_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define DVB_USB_LOG_PREFIX "vp7045"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "dvb-usb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* vp7045 commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Twinhan Vendor requests */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define TH_COMMAND_IN                     0xC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define TH_COMMAND_OUT                    0xC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* command bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define TUNER_REG_READ                    0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define TUNER_REG_WRITE                   0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RC_VAL_READ                       0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  #define RC_NO_KEY                        0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define SET_TUNER_POWER                   0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define CHECK_TUNER_POWER                 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  #define Tuner_Power_ON                   1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  #define Tuner_Power_OFF                  0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define GET_USB_SPEED                     0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define LOCK_TUNER_COMMAND                0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define TUNER_SIGNAL_READ                 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* FX2 eeprom */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define SET_EE_VALUE                      0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define GET_EE_VALUE                      0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)  #define FX2_ID_ADDR                      0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)  #define VID_MSB_ADDR                     0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)  #define VID_LSB_ADDR                     0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)  #define PID_MSB_ADDR                     0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)  #define PID_LSB_ADDR                     0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)  #define MAC_0_ADDR                       0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)  #define MAC_1_ADDR                       0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)  #define MAC_2_ADDR                       0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)  #define MAC_3_ADDR                       0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)  #define MAC_4_ADDR                       0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)  #define MAC_5_ADDR                       0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define RESET_FX2                         0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define FW_VERSION_READ                   0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define VENDOR_STRING_READ                0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PRODUCT_STRING_READ               0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define FW_BCD_VERSION_READ               0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) extern struct dvb_frontend * vp7045_fe_attach(struct dvb_usb_device *d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) extern int vp7045_usb_op(struct dvb_usb_device *d, u8 cmd, u8 *out, int outlen, u8 *in, int inlen,int msec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) extern u8 vp7045_read_reg(struct dvb_usb_device *d, u8 reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #endif