^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* DVB USB framework compliant Linux driver for the Opera1 DVB-S Card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2006 Mario Hlawitschka (dh1pa@amsat.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2006 Marco Gittler (g.marco@freenet.de)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define DVB_USB_LOG_PREFIX "opera"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "dvb-usb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "stv0299.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define OPERA_READ_MSG 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define OPERA_WRITE_MSG 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define OPERA_I2C_TUNER 0xd1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define READ_FX2_REG_REQ 0xba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define READ_MAC_ADDR 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define OPERA_WRITE_FX2 0xbb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define OPERA_TUNER_REQ 0xb1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define REG_1F_SYMBOLRATE_BYTE0 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define REG_20_SYMBOLRATE_BYTE1 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define REG_21_SYMBOLRATE_BYTE2 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define ADDR_B600_VOLTAGE_13V (0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ADDR_B601_VOLTAGE_18V (0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ADDR_B1A6_STREAM_CTRL (0x04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ADDR_B880_READ_REMOTE (0x05)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct opera1_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u32 last_key_pressed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct rc_map_opera_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u32 keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u32 event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static int dvb_usb_opera1_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) module_param_named(debug, dvb_usb_opera1_debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MODULE_PARM_DESC(debug,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) "set debugging level (1=info,xfer=2,pll=4,ts=8,err=16,rc=32,fw=64 (or-able))."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) DVB_USB_DEBUG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int opera1_xilinx_rw(struct usb_device *dev, u8 request, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u8 * data, u16 len, int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned int pipe = (flags == OPERA_READ_MSG) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) usb_rcvctrlpipe(dev,0) : usb_sndctrlpipe(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u8 request_type = (flags == OPERA_READ_MSG) ? USB_DIR_IN : USB_DIR_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) buf = kmalloc(len, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (flags == OPERA_WRITE_MSG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) memcpy(buf, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ret = usb_control_msg(dev, pipe, request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) request_type | USB_TYPE_VENDOR, value, 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) buf, len, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (request == OPERA_TUNER_REQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) tmp = buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) OPERA_TUNER_REQ, USB_DIR_IN | USB_TYPE_VENDOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0x01, 0x0, buf, 1, 2000) < 1 || buf[0] != 0x08) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) buf[0] = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (flags == OPERA_READ_MSG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) memcpy(data, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static int opera1_usb_i2c_msgxfer(struct dvb_usb_device *dev, u16 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) u8 * buf, u16 len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u8 request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) u16 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) info("no usb_device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (mutex_lock_interruptible(&dev->usb_mutex) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) switch (addr>>1){
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) case ADDR_B600_VOLTAGE_13V:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) request=0xb6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) value=0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) case ADDR_B601_VOLTAGE_18V:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) request=0xb6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) value=0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) case ADDR_B1A6_STREAM_CTRL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) request=0xb1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) value=0xa6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) case ADDR_B880_READ_REMOTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) request=0xb8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) value=0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) request=0xb1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) value=addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ret = opera1_xilinx_rw(dev->udev, request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) value, buf, len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) addr&0x01?OPERA_READ_MSG:OPERA_WRITE_MSG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) mutex_unlock(&dev->usb_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int opera1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct dvb_usb_device *d = i2c_get_adapdata(adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int i = 0, tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (!d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) for (i = 0; i < num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if ((tmp = opera1_usb_i2c_msgxfer(d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) (msg[i].addr<<1)|(msg[i].flags&I2C_M_RD?0x01:0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) msg[i].buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) msg[i].len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) )) != msg[i].len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (dvb_usb_opera1_debug & 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) info("sending i2c message %d %d", tmp, msg[i].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) mutex_unlock(&d->i2c_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static u32 opera1_i2c_func(struct i2c_adapter *adapter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return I2C_FUNC_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static struct i2c_algorithm opera1_i2c_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .master_xfer = opera1_i2c_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .functionality = opera1_i2c_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static int opera1_set_voltage(struct dvb_frontend *fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) enum fe_sec_voltage voltage)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static u8 command_13v[1]={0x00};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static u8 command_18v[1]={0x01};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {.addr = ADDR_B600_VOLTAGE_13V,.flags = 0,.buf = command_13v,.len = 1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct dvb_usb_adapter *udev_adap =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) (struct dvb_usb_adapter *)(fe->dvb->priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (voltage == SEC_VOLTAGE_18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) msg[0].addr = ADDR_B601_VOLTAGE_18V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) msg[0].buf = command_18v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) i2c_transfer(&udev_adap->dev->i2c_adap, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static int opera1_stv0299_set_symbol_rate(struct dvb_frontend *fe, u32 srate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) u32 ratio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) stv0299_writereg(fe, 0x13, 0x98);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) stv0299_writereg(fe, 0x14, 0x95);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) stv0299_writereg(fe, REG_1F_SYMBOLRATE_BYTE0, (ratio >> 16) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) stv0299_writereg(fe, REG_20_SYMBOLRATE_BYTE1, (ratio >> 8) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) stv0299_writereg(fe, REG_21_SYMBOLRATE_BYTE2, (ratio) & 0xf0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static u8 opera1_inittab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 0x00, 0xa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 0x01, 0x15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 0x02, 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 0x03, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 0x04, 0x7d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 0x05, 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 0x06, 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 0x07, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 0x0b, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 0x0c, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 0x0d, 0x81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 0x0e, 0x44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 0x0f, 0x19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 0x10, 0x3f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 0x11, 0x84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 0x12, 0xda,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 0x13, 0x98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 0x14, 0x95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 0x15, 0xc9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 0x16, 0xeb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 0x17, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 0x18, 0x19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 0x19, 0x8b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 0x1a, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 0x1b, 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 0x1c, 0x7f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 0x1d, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 0x1e, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) REG_1F_SYMBOLRATE_BYTE0, 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) REG_20_SYMBOLRATE_BYTE1, 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) REG_21_SYMBOLRATE_BYTE2, 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 0x22, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 0x23, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 0x24, 0x37,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 0x25, 0xbc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 0x26, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 0x27, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 0x28, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 0x29, 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 0x2a, 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 0x2b, 0x1f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 0x2c, 0x09,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 0x2d, 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 0x2e, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 0x2f, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 0x30, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 0x31, 0x1f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 0x32, 0x19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 0x33, 0xfc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 0x34, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 0xff, 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static struct stv0299_config opera1_stv0299_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .demod_address = 0xd0>>1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .min_delay_ms = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .mclk = 88000000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .invert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .skip_reinit = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .lock_output = STV0299_LOCKOUTPUT_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .volt13_op0_op1 = STV0299_VOLT13_OP0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .inittab = opera1_inittab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .set_symbol_rate = opera1_stv0299_set_symbol_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static int opera1_frontend_attach(struct dvb_usb_adapter *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) d->fe_adap[0].fe = dvb_attach(stv0299_attach, &opera1_stv0299_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) &d->dev->i2c_adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if ((d->fe_adap[0].fe) != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) d->fe_adap[0].fe->ops.set_voltage = opera1_set_voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) info("not attached stv0299");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static int opera1_tuner_attach(struct dvb_usb_adapter *adap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dvb_attach(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) dvb_pll_attach, adap->fe_adap[0].fe, 0xc0>>1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) &adap->dev->i2c_adap, DVB_PLL_OPERA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static int opera1_power_ctrl(struct dvb_usb_device *d, int onoff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) u8 val = onoff ? 0x01 : 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (dvb_usb_opera1_debug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) info("power %s", onoff ? "on" : "off");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return opera1_xilinx_rw(d->udev, 0xb7, val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) &val, 1, OPERA_WRITE_MSG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static int opera1_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static u8 buf_start[2] = { 0xff, 0x03 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static u8 buf_stop[2] = { 0xff, 0x00 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct i2c_msg start_tuner[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {.addr = ADDR_B1A6_STREAM_CTRL,.buf = onoff ? buf_start : buf_stop,.len = 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (dvb_usb_opera1_debug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) info("streaming %s", onoff ? "on" : "off");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) i2c_transfer(&adap->dev->i2c_adap, start_tuner, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static int opera1_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) int onoff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) u8 b_pid[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {.addr = ADDR_B1A6_STREAM_CTRL,.buf = b_pid,.len = 3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (dvb_usb_opera1_debug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) info("pidfilter index: %d pid: %d %s", index, pid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) onoff ? "on" : "off");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) b_pid[0] = (2 * index) + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) b_pid[1] = onoff ? (pid & 0xff) : (0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) b_pid[2] = onoff ? ((pid >> 8) & 0xff) : (0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) i2c_transfer(&adap->dev->i2c_adap, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static int opera1_pid_filter_control(struct dvb_usb_adapter *adap, int onoff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) int u = 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u8 b_pid[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {.addr = ADDR_B1A6_STREAM_CTRL,.buf = b_pid,.len = 3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (dvb_usb_opera1_debug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) info("%s hw-pidfilter", onoff ? "enable" : "disable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) for (; u < 0x7e; u += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) b_pid[0] = u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) b_pid[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) b_pid[2] = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) i2c_transfer(&adap->dev->i2c_adap, msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static struct rc_map_table rc_map_opera1_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {0x5fa0, KEY_1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {0x51af, KEY_2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {0x5da2, KEY_3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {0x41be, KEY_4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {0x0bf5, KEY_5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {0x43bd, KEY_6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {0x47b8, KEY_7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {0x49b6, KEY_8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {0x05fa, KEY_9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {0x45ba, KEY_0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {0x09f6, KEY_CHANNELUP}, /*chanup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {0x1be5, KEY_CHANNELDOWN}, /*chandown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {0x5da3, KEY_VOLUMEDOWN}, /*voldown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {0x5fa1, KEY_VOLUMEUP}, /*volup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {0x07f8, KEY_SPACE}, /*tab */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {0x1fe1, KEY_OK}, /*play ok */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {0x1be4, KEY_ZOOM}, /*zoom */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {0x59a6, KEY_MUTE}, /*mute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {0x5ba5, KEY_RADIO}, /*tv/f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {0x19e7, KEY_RECORD}, /*rec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {0x01fe, KEY_STOP}, /*Stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) {0x03fd, KEY_PAUSE}, /*pause */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {0x03fc, KEY_SCREEN}, /*<- -> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {0x07f9, KEY_CAMERA}, /*capture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {0x47b9, KEY_ESC}, /*exit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) {0x43bc, KEY_POWER2}, /*power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static int opera1_rc_query(struct dvb_usb_device *dev, u32 * event, int *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct opera1_state *opst = dev->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u8 rcbuffer[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) const u16 startmarker1 = 0x10ed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) const u16 startmarker2 = 0x11ec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) struct i2c_msg read_remote[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {.addr = ADDR_B880_READ_REMOTE,.buf = rcbuffer,.flags = I2C_M_RD,.len = 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) u32 send_key = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (i2c_transfer(&dev->i2c_adap, read_remote, 1) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) for (i = 0; i < 32; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (rcbuffer[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) send_key |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (i < 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) send_key = send_key << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (send_key & 0x8000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) send_key = (send_key << 1) | (send_key >> 15 & 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) if (send_key == 0xffff && opst->last_key_pressed != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) *state = REMOTE_KEY_REPEAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) *event = opst->last_key_pressed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) for (; send_key != 0;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (send_key >> 16 == startmarker2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) } else if (send_key >> 16 == startmarker1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) send_key =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) (send_key & 0xfffeffff) | (startmarker1 << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) send_key >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (send_key == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) send_key = (send_key & 0xffff) | 0x0100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) for (i = 0; i < ARRAY_SIZE(rc_map_opera1_table); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (rc5_scan(&rc_map_opera1_table[i]) == (send_key & 0xffff)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) *state = REMOTE_KEY_PRESSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) *event = rc_map_opera1_table[i].keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) opst->last_key_pressed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) rc_map_opera1_table[i].keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) opst->last_key_pressed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) *state = REMOTE_NO_KEY_PRESSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static struct usb_device_id opera1_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {USB_DEVICE(USB_VID_CYPRESS, USB_PID_OPERA1_COLD)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {USB_DEVICE(USB_VID_OPERA1, USB_PID_OPERA1_WARM)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) MODULE_DEVICE_TABLE(usb, opera1_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static int opera1_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) u8 command[] = { READ_MAC_ADDR };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) opera1_xilinx_rw(d->udev, 0xb1, 0xa0, command, 1, OPERA_WRITE_MSG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) opera1_xilinx_rw(d->udev, 0xb1, 0xa1, mac, 6, OPERA_READ_MSG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static int opera1_xilinx_load_firmware(struct usb_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) const char *filename)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) const struct firmware *fw = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) u8 *b, *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) int ret = 0, i,fpgasize=40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) u8 testval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) info("start downloading fpga firmware %s",filename);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if ((ret = request_firmware(&fw, filename, &dev->dev)) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) filename);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) p = kmalloc(fw->size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) opera1_xilinx_rw(dev, 0xbc, 0x00, &testval, 1, OPERA_READ_MSG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (p != NULL && testval != 0x67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) u8 reset = 0, fpga_command = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) memcpy(p, fw->data, fw->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /* clear fpga ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) opera1_xilinx_rw(dev, 0xbc, 0xaa, &fpga_command, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) OPERA_WRITE_MSG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) for (i = 0; i < fw->size;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if ( (fw->size - i) <fpgasize){
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) fpgasize=fw->size-i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) b = (u8 *) p + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (opera1_xilinx_rw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) (dev, OPERA_WRITE_FX2, 0x0, b , fpgasize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) OPERA_WRITE_MSG) != fpgasize
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) err("error while transferring firmware");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) i = i + fpgasize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* restart the CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) if (ret || opera1_xilinx_rw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) (dev, 0xa0, 0xe600, &reset, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) OPERA_WRITE_MSG) != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) err("could not restart the USB controller CPU.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) kfree(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static struct dvb_usb_device_properties opera1_properties = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .caps = DVB_USB_IS_AN_I2C_ADAPTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .usb_ctrl = CYPRESS_FX2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .firmware = "dvb-usb-opera-01.fw",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .size_of_priv = sizeof(struct opera1_state),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .power_ctrl = opera1_power_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .i2c_algo = &opera1_i2c_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .rc.legacy = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .rc_map_table = rc_map_opera1_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .rc_map_size = ARRAY_SIZE(rc_map_opera1_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .rc_interval = 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .rc_query = opera1_rc_query,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .read_mac_address = opera1_read_mac_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .generic_bulk_ctrl_endpoint = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) /* parameter for the MPEG2-data transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .num_adapters = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .adapter = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .num_frontends = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .fe = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .frontend_attach = opera1_frontend_attach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .streaming_ctrl = opera1_streaming_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) .tuner_attach = opera1_tuner_attach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) .caps =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) DVB_USB_ADAP_HAS_PID_FILTER |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .pid_filter = opera1_pid_filter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .pid_filter_ctrl = opera1_pid_filter_control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .pid_filter_count = 252,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .stream = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .type = USB_BULK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .count = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .endpoint = 0x82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) .u = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .bulk = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .buffersize = 4096,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .num_device_descs = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .devices = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) {"Opera1 DVB-S USB2.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) {&opera1_table[0], NULL},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {&opera1_table[1], NULL},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static int opera1_probe(struct usb_interface *intf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) const struct usb_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct usb_device *udev = interface_to_usbdev(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (le16_to_cpu(udev->descriptor.idProduct) == USB_PID_OPERA1_WARM &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) le16_to_cpu(udev->descriptor.idVendor) == USB_VID_OPERA1 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) opera1_xilinx_load_firmware(udev, "dvb-usb-opera1-fpga-01.fw") != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (0 != dvb_usb_device_init(intf, &opera1_properties,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) THIS_MODULE, NULL, adapter_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) static struct usb_driver opera1_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) .name = "opera1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) .probe = opera1_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .disconnect = dvb_usb_device_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .id_table = opera1_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) module_usb_driver(opera1_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) MODULE_AUTHOR("Mario Hlawitschka (c) dh1pa@amsat.org");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) MODULE_AUTHOR("Marco Gittler (c) g.marco@freenet.de");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) MODULE_DESCRIPTION("Driver for Opera1 DVB-S device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) MODULE_VERSION("0.1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) MODULE_LICENSE("GPL");